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Searched refs:mask (Results 1 – 25 of 192) sorted by relevance

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/wlan-driver/fw-api/hw/qca6290/v1/
Dwbm_reg_seq_hwioreg.h52 #define HWIO_WBM_R0_GENERAL_ENABLE_INM(x, mask) \ argument
53 in_dword_masked ( HWIO_WBM_R0_GENERAL_ENABLE_ADDR(x), mask)
56 #define HWIO_WBM_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
59 …out_dword_masked_ns(HWIO_WBM_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_WBM_R0_GENERAL_ENABLE_IN(x…
95 #define HWIO_WBM_R0_RELEASE_RING_ENABLE_INM(x, mask) \ argument
96 in_dword_masked ( HWIO_WBM_R0_RELEASE_RING_ENABLE_ADDR(x), mask)
99 #define HWIO_WBM_R0_RELEASE_RING_ENABLE_OUTM(x, mask, val) \ argument
102 …out_dword_masked_ns(HWIO_WBM_R0_RELEASE_RING_ENABLE_ADDR(x), mask, val, HWIO_WBM_R0_RELEASE_RING_E…
117 #define HWIO_WBM_R0_MSDU_BUFFER_RING_ENABLE_INM(x, mask) \ argument
118 in_dword_masked ( HWIO_WBM_R0_MSDU_BUFFER_RING_ENABLE_ADDR(x), mask)
[all …]
Dmac_tcl_reg_seq_hwioreg.h52 #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_INM(x, mask) \ argument
53 in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), mask)
56 #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_OUTM(x, mask, val) \ argument
59 …out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CTR…
77 #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_INM(x, mask) \ argument
78 in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), mask)
81 #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_OUTM(x, mask, val) \ argument
84 …out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CTR…
102 #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_INM(x, mask) \ argument
103 in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), mask)
[all …]
/wlan-driver/fw-api/hw/qca8074/v1/
Dwbm_reg_seq_hwioreg.h52 #define HWIO_WBM_R0_GENERAL_ENABLE_INM(x, mask) \ argument
53 in_dword_masked ( HWIO_WBM_R0_GENERAL_ENABLE_ADDR(x), mask)
56 #define HWIO_WBM_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
59 …out_dword_masked_ns(HWIO_WBM_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_WBM_R0_GENERAL_ENABLE_IN(x…
95 #define HWIO_WBM_R0_RELEASE_RING_ENABLE_INM(x, mask) \ argument
96 in_dword_masked ( HWIO_WBM_R0_RELEASE_RING_ENABLE_ADDR(x), mask)
99 #define HWIO_WBM_R0_RELEASE_RING_ENABLE_OUTM(x, mask, val) \ argument
102 …out_dword_masked_ns(HWIO_WBM_R0_RELEASE_RING_ENABLE_ADDR(x), mask, val, HWIO_WBM_R0_RELEASE_RING_E…
117 #define HWIO_WBM_R0_MSDU_BUFFER_RING_ENABLE_INM(x, mask) \ argument
118 in_dword_masked ( HWIO_WBM_R0_MSDU_BUFFER_RING_ENABLE_ADDR(x), mask)
[all …]
Dmac_tcl_reg_seq_hwioreg.h52 #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_INM(x, mask) \ argument
53 in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), mask)
56 #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_OUTM(x, mask, val) \ argument
59 …out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CTR…
77 #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_INM(x, mask) \ argument
78 in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), mask)
81 #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_OUTM(x, mask, val) \ argument
84 …out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CTR…
102 #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_INM(x, mask) \ argument
103 in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), mask)
[all …]
/wlan-driver/fw-api/hw/qca6490/v1/
Dreo_reg_seq_hwioreg.h52 #define HWIO_REO_R0_GENERAL_ENABLE_INM(x, mask) \ argument
53 in_dword_masked ( HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask)
56 #define HWIO_REO_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
59 …out_dword_masked_ns(HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_REO_R0_GENERAL_ENABLE_IN(x…
140 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_INM(x, mask) \ argument
141 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask)
144 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUTM(x, mask, val) \ argument
147 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
183 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_INM(x, mask) \ argument
184 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), mask)
[all …]
Dwbm_reg_seq_hwioreg.h52 #define HWIO_WBM_R0_GENERAL_ENABLE_INM(x, mask) \ argument
53 in_dword_masked ( HWIO_WBM_R0_GENERAL_ENABLE_ADDR(x), mask)
56 #define HWIO_WBM_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
59 …out_dword_masked_ns(HWIO_WBM_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_WBM_R0_GENERAL_ENABLE_IN(x…
95 #define HWIO_WBM_R0_RELEASE_RING_ENABLE_INM(x, mask) \ argument
96 in_dword_masked ( HWIO_WBM_R0_RELEASE_RING_ENABLE_ADDR(x), mask)
99 #define HWIO_WBM_R0_RELEASE_RING_ENABLE_OUTM(x, mask, val) \ argument
102 …out_dword_masked_ns(HWIO_WBM_R0_RELEASE_RING_ENABLE_ADDR(x), mask, val, HWIO_WBM_R0_RELEASE_RING_E…
138 #define HWIO_WBM_R0_MSDU_BUFFER_RING_ENABLE_INM(x, mask) \ argument
139 in_dword_masked ( HWIO_WBM_R0_MSDU_BUFFER_RING_ENABLE_ADDR(x), mask)
[all …]
Dmac_tcl_reg_seq_hwioreg.h52 #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_INM(x, mask) \ argument
53 in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), mask)
56 #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_OUTM(x, mask, val) \ argument
59 …out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CTR…
77 #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_INM(x, mask) \ argument
78 in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), mask)
81 #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_OUTM(x, mask, val) \ argument
84 …out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CTR…
102 #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_INM(x, mask) \ argument
103 in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), mask)
[all …]
/wlan-driver/fw-api/hw/qca6750/v1/
Dreo_reg_seq_hwioreg.h52 #define HWIO_REO_R0_GENERAL_ENABLE_INM(x, mask) \ argument
53 in_dword_masked ( HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask)
56 #define HWIO_REO_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
59 …out_dword_masked_ns(HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_REO_R0_GENERAL_ENABLE_IN(x…
143 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_INM(x, mask) \ argument
144 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask)
147 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUTM(x, mask, val) \ argument
150 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
186 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_INM(x, mask) \ argument
187 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), mask)
[all …]
Dwbm_reg_seq_hwioreg.h52 #define HWIO_WBM_R0_GENERAL_ENABLE_INM(x, mask) \ argument
53 in_dword_masked ( HWIO_WBM_R0_GENERAL_ENABLE_ADDR(x), mask)
56 #define HWIO_WBM_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
59 …out_dword_masked_ns(HWIO_WBM_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_WBM_R0_GENERAL_ENABLE_IN(x…
95 #define HWIO_WBM_R0_RELEASE_RING_ENABLE_INM(x, mask) \ argument
96 in_dword_masked ( HWIO_WBM_R0_RELEASE_RING_ENABLE_ADDR(x), mask)
99 #define HWIO_WBM_R0_RELEASE_RING_ENABLE_OUTM(x, mask, val) \ argument
102 …out_dword_masked_ns(HWIO_WBM_R0_RELEASE_RING_ENABLE_ADDR(x), mask, val, HWIO_WBM_R0_RELEASE_RING_E…
138 #define HWIO_WBM_R0_MSDU_BUFFER_RING_ENABLE_INM(x, mask) \ argument
139 in_dword_masked ( HWIO_WBM_R0_MSDU_BUFFER_RING_ENABLE_ADDR(x), mask)
[all …]
/wlan-driver/fw-api/hw/qca6390/v1/
Dwfss_ce_reg_seq_hwioreg.h43 #define HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_INM(x, mask) \ argument
44 in_dword_masked ( HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR(x), mask)
47 #define HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_OUTM(x, mask, val) \ argument
50 …out_dword_masked_ns(HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR(x), mask, val, HWIO_WFSS_C…
65 #define HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_INM(x, mask) \ argument
66 in_dword_masked ( HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_ADDR(x), mask)
69 #define HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_OUTM(x, mask, val) \ argument
72 …out_dword_masked_ns(HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_ADDR(x), mask, val, HWIO_WFSS_C…
90 #define HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_INM(x, mask) \ argument
91 in_dword_masked ( HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_ADDR(x), mask)
[all …]
Dwbm_reg_seq_hwioreg.h43 #define HWIO_WBM_R0_GENERAL_ENABLE_INM(x, mask) \ argument
44 in_dword_masked ( HWIO_WBM_R0_GENERAL_ENABLE_ADDR(x), mask)
47 #define HWIO_WBM_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
50 …out_dword_masked_ns(HWIO_WBM_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_WBM_R0_GENERAL_ENABLE_IN(x…
86 #define HWIO_WBM_R0_RELEASE_RING_ENABLE_INM(x, mask) \ argument
87 in_dword_masked ( HWIO_WBM_R0_RELEASE_RING_ENABLE_ADDR(x), mask)
90 #define HWIO_WBM_R0_RELEASE_RING_ENABLE_OUTM(x, mask, val) \ argument
93 …out_dword_masked_ns(HWIO_WBM_R0_RELEASE_RING_ENABLE_ADDR(x), mask, val, HWIO_WBM_R0_RELEASE_RING_E…
129 #define HWIO_WBM_R0_MSDU_BUFFER_RING_ENABLE_INM(x, mask) \ argument
130 in_dword_masked ( HWIO_WBM_R0_MSDU_BUFFER_RING_ENABLE_ADDR(x), mask)
[all …]
Dreo_reg_seq_hwioreg.h43 #define HWIO_REO_R0_GENERAL_ENABLE_INM(x, mask) \ argument
44 in_dword_masked ( HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask)
47 #define HWIO_REO_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
50 …out_dword_masked_ns(HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_REO_R0_GENERAL_ENABLE_IN(x…
128 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_INM(x, mask) \ argument
129 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask)
132 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUTM(x, mask, val) \ argument
135 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
171 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_INM(x, mask) \ argument
172 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), mask)
[all …]
/wlan-driver/fw-api/hw/qcn9000/
Dreo_reg_seq_hwioreg.h49 #define HWIO_REO_R0_GENERAL_ENABLE_INM(x, mask) \ argument
50 in_dword_masked ( HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask)
53 #define HWIO_REO_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
56 …out_dword_masked_ns(HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_REO_R0_GENERAL_ENABLE_IN(x…
137 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_INM(x, mask) \ argument
138 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask)
141 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUTM(x, mask, val) \ argument
144 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
180 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_INM(x, mask) \ argument
181 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), mask)
[all …]
Dwbm_reg_seq_hwioreg.h41 #define HWIO_WBM_R0_GENERAL_ENABLE_INM(x, mask) \ argument
42 in_dword_masked ( HWIO_WBM_R0_GENERAL_ENABLE_ADDR(x), mask)
45 #define HWIO_WBM_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
48 …out_dword_masked_ns(HWIO_WBM_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_WBM_R0_GENERAL_ENABLE_IN(x…
84 #define HWIO_WBM_R0_RELEASE_RING_ENABLE_INM(x, mask) \ argument
85 in_dword_masked ( HWIO_WBM_R0_RELEASE_RING_ENABLE_ADDR(x), mask)
88 #define HWIO_WBM_R0_RELEASE_RING_ENABLE_OUTM(x, mask, val) \ argument
91 …out_dword_masked_ns(HWIO_WBM_R0_RELEASE_RING_ENABLE_ADDR(x), mask, val, HWIO_WBM_R0_RELEASE_RING_E…
127 #define HWIO_WBM_R0_MSDU_BUFFER_RING_ENABLE_INM(x, mask) \ argument
128 in_dword_masked ( HWIO_WBM_R0_MSDU_BUFFER_RING_ENABLE_ADDR(x), mask)
[all …]
/wlan-driver/fw-api/hw/qca5018/
Dwbm_reg_seq_hwioreg.h50 #define HWIO_WBM_R0_GENERAL_ENABLE_INM(x, mask) \ argument
51 in_dword_masked ( HWIO_WBM_R0_GENERAL_ENABLE_ADDR(x), mask)
54 #define HWIO_WBM_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
57 …out_dword_masked_ns(HWIO_WBM_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_WBM_R0_GENERAL_ENABLE_IN(x…
93 #define HWIO_WBM_R0_RELEASE_RING_ENABLE_INM(x, mask) \ argument
94 in_dword_masked ( HWIO_WBM_R0_RELEASE_RING_ENABLE_ADDR(x), mask)
97 #define HWIO_WBM_R0_RELEASE_RING_ENABLE_OUTM(x, mask, val) \ argument
100 …out_dword_masked_ns(HWIO_WBM_R0_RELEASE_RING_ENABLE_ADDR(x), mask, val, HWIO_WBM_R0_RELEASE_RING_E…
136 #define HWIO_WBM_R0_MSDU_BUFFER_RING_ENABLE_INM(x, mask) \ argument
137 in_dword_masked ( HWIO_WBM_R0_MSDU_BUFFER_RING_ENABLE_ADDR(x), mask)
[all …]
Dreo_reg_seq_hwioreg.h50 #define HWIO_REO_R0_GENERAL_ENABLE_INM(x, mask) \ argument
51 in_dword_masked ( HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask)
54 #define HWIO_REO_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
57 …out_dword_masked_ns(HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_REO_R0_GENERAL_ENABLE_IN(x…
141 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_INM(x, mask) \ argument
142 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask)
145 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUTM(x, mask, val) \ argument
148 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
184 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_INM(x, mask) \ argument
185 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), mask)
[all …]
/wlan-driver/fw-api/hw/qcn6122/
Dwbm_reg_seq_hwioreg.h41 #define HWIO_WBM_R0_GENERAL_ENABLE_INM(x, mask) \ argument
42 in_dword_masked ( HWIO_WBM_R0_GENERAL_ENABLE_ADDR(x), mask)
45 #define HWIO_WBM_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
48 …out_dword_masked_ns(HWIO_WBM_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_WBM_R0_GENERAL_ENABLE_IN(x…
84 #define HWIO_WBM_R0_RELEASE_RING_ENABLE_INM(x, mask) \ argument
85 in_dword_masked ( HWIO_WBM_R0_RELEASE_RING_ENABLE_ADDR(x), mask)
88 #define HWIO_WBM_R0_RELEASE_RING_ENABLE_OUTM(x, mask, val) \ argument
91 …out_dword_masked_ns(HWIO_WBM_R0_RELEASE_RING_ENABLE_ADDR(x), mask, val, HWIO_WBM_R0_RELEASE_RING_E…
127 #define HWIO_WBM_R0_MSDU_BUFFER_RING_ENABLE_INM(x, mask) \ argument
128 in_dword_masked ( HWIO_WBM_R0_MSDU_BUFFER_RING_ENABLE_ADDR(x), mask)
[all …]
Dreo_reg_seq_hwioreg.h41 #define HWIO_REO_R0_GENERAL_ENABLE_INM(x, mask) \ argument
42 in_dword_masked ( HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask)
45 #define HWIO_REO_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
48 …out_dword_masked_ns(HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_REO_R0_GENERAL_ENABLE_IN(x…
132 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_INM(x, mask) \ argument
133 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask)
136 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUTM(x, mask, val) \ argument
139 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
175 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_INM(x, mask) \ argument
176 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), mask)
[all …]
/wlan-driver/fw-api/hw/qca9574/
Dwbm_reg_seq_hwioreg.h50 #define HWIO_WBM_R0_GENERAL_ENABLE_INM(x, mask) \ argument
51 in_dword_masked ( HWIO_WBM_R0_GENERAL_ENABLE_ADDR(x), mask)
54 #define HWIO_WBM_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
57 …out_dword_masked_ns(HWIO_WBM_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_WBM_R0_GENERAL_ENABLE_IN(x…
93 #define HWIO_WBM_R0_RELEASE_RING_ENABLE_INM(x, mask) \ argument
94 in_dword_masked ( HWIO_WBM_R0_RELEASE_RING_ENABLE_ADDR(x), mask)
97 #define HWIO_WBM_R0_RELEASE_RING_ENABLE_OUTM(x, mask, val) \ argument
100 …out_dword_masked_ns(HWIO_WBM_R0_RELEASE_RING_ENABLE_ADDR(x), mask, val, HWIO_WBM_R0_RELEASE_RING_E…
136 #define HWIO_WBM_R0_MSDU_BUFFER_RING_ENABLE_INM(x, mask) \ argument
137 in_dword_masked ( HWIO_WBM_R0_MSDU_BUFFER_RING_ENABLE_ADDR(x), mask)
[all …]
Dwfss_ce_reg_seq_hwioreg.h50 #define HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_INM(x, mask) \ argument
51 in_dword_masked ( HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR(x), mask)
54 #define HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_OUTM(x, mask, val) \ argument
57 …out_dword_masked_ns(HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR(x), mask, val, HWIO_WFSS_C…
72 #define HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_INM(x, mask) \ argument
73 in_dword_masked ( HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_ADDR(x), mask)
76 #define HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_OUTM(x, mask, val) \ argument
79 …out_dword_masked_ns(HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_ADDR(x), mask, val, HWIO_WFSS_C…
97 #define HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_INM(x, mask) \ argument
98 in_dword_masked ( HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_ADDR(x), mask)
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Dreo_reg_seq_hwioreg.h50 #define HWIO_REO_R0_GENERAL_ENABLE_INM(x, mask) \ argument
51 in_dword_masked ( HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask)
54 #define HWIO_REO_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
57 …out_dword_masked_ns(HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_REO_R0_GENERAL_ENABLE_IN(x…
138 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_INM(x, mask) \ argument
139 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask)
142 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUTM(x, mask, val) \ argument
145 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
181 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_INM(x, mask) \ argument
182 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), mask)
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/wlan-driver/fw-api/hw/qca8074/v2/
Dwbm_reg_seq_hwioreg.h50 #define HWIO_WBM_R0_GENERAL_ENABLE_INM(x, mask) \ argument
51 in_dword_masked ( HWIO_WBM_R0_GENERAL_ENABLE_ADDR(x), mask)
54 #define HWIO_WBM_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
57 …out_dword_masked_ns(HWIO_WBM_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_WBM_R0_GENERAL_ENABLE_IN(x…
93 #define HWIO_WBM_R0_RELEASE_RING_ENABLE_INM(x, mask) \ argument
94 in_dword_masked ( HWIO_WBM_R0_RELEASE_RING_ENABLE_ADDR(x), mask)
97 #define HWIO_WBM_R0_RELEASE_RING_ENABLE_OUTM(x, mask, val) \ argument
100 …out_dword_masked_ns(HWIO_WBM_R0_RELEASE_RING_ENABLE_ADDR(x), mask, val, HWIO_WBM_R0_RELEASE_RING_E…
136 #define HWIO_WBM_R0_MSDU_BUFFER_RING_ENABLE_INM(x, mask) \ argument
137 in_dword_masked ( HWIO_WBM_R0_MSDU_BUFFER_RING_ENABLE_ADDR(x), mask)
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Dwfss_ce_reg_seq_hwioreg.h50 #define HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_INM(x, mask) \ argument
51 in_dword_masked ( HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR(x), mask)
54 #define HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_OUTM(x, mask, val) \ argument
57 …out_dword_masked_ns(HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR(x), mask, val, HWIO_WFSS_C…
72 #define HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_INM(x, mask) \ argument
73 in_dword_masked ( HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_ADDR(x), mask)
76 #define HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_OUTM(x, mask, val) \ argument
79 …out_dword_masked_ns(HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_ADDR(x), mask, val, HWIO_WFSS_C…
97 #define HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_INM(x, mask) \ argument
98 in_dword_masked ( HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_ADDR(x), mask)
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Dreo_reg_seq_hwioreg.h50 #define HWIO_REO_R0_GENERAL_ENABLE_INM(x, mask) \ argument
51 in_dword_masked ( HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask)
54 #define HWIO_REO_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
57 …out_dword_masked_ns(HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_REO_R0_GENERAL_ENABLE_IN(x…
138 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_INM(x, mask) \ argument
139 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask)
142 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUTM(x, mask, val) \ argument
145 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
181 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_INM(x, mask) \ argument
182 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), mask)
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/wlan-driver/fw-api/hw/qca6290/v2/
Dmac_tcl_reg_seq_hwioreg.h52 #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_INM(x, mask) \ argument
53 in_dword_masked ( HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), mask)
56 #define HWIO_TCL_R0_SW2TCL1_RING_CTRL_OUTM(x, mask, val) \ argument
59 …out_dword_masked_ns(HWIO_TCL_R0_SW2TCL1_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL1_RING_CTR…
77 #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_INM(x, mask) \ argument
78 in_dword_masked ( HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), mask)
81 #define HWIO_TCL_R0_SW2TCL2_RING_CTRL_OUTM(x, mask, val) \ argument
84 …out_dword_masked_ns(HWIO_TCL_R0_SW2TCL2_RING_CTRL_ADDR(x), mask, val, HWIO_TCL_R0_SW2TCL2_RING_CTR…
102 #define HWIO_TCL_R0_SW2TCL3_RING_CTRL_INM(x, mask) \ argument
103 in_dword_masked ( HWIO_TCL_R0_SW2TCL3_RING_CTRL_ADDR(x), mask)
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