Lines Matching refs:mask
41 #define HWIO_REO_R0_GENERAL_ENABLE_INM(x, mask) \ argument
42 in_dword_masked ( HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask)
45 #define HWIO_REO_R0_GENERAL_ENABLE_OUTM(x, mask, val) \ argument
48 …out_dword_masked_ns(HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_REO_R0_GENERAL_ENABLE_IN(x…
132 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_INM(x, mask) \ argument
133 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask)
136 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUTM(x, mask, val) \ argument
139 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
175 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_INM(x, mask) \ argument
176 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), mask)
179 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_OUTM(x, mask, val) \ argument
182 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
218 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_INM(x, mask) \ argument
219 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x), mask)
222 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_OUTM(x, mask, val) \ argument
225 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
261 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_INM(x, mask) \ argument
262 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x), mask)
265 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_OUTM(x, mask, val) \ argument
268 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
304 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_INM(x, mask) \ argument
305 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x), mask)
308 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_OUTM(x, mask, val) \ argument
311 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DES…
347 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_INM(x, mask) \ argument
348 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x), mask)
351 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_OUTM(x, mask, val) \ argument
354 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x), mask, val, HWIO_REO_R0_DES…
390 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_INM(x, mask) \ argument
391 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x), mask)
394 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_OUTM(x, mask, val) \ argument
397 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x), mask, val, HWIO_REO_R0_DES…
433 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_INM(x, mask) \ argument
434 in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x), mask)
437 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_OUTM(x, mask, val) \ argument
440 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x), mask, val, HWIO_REO_R0_DES…
476 #define HWIO_REO_R0_TIMESTAMP_INM(x, mask) \ argument
477 in_dword_masked ( HWIO_REO_R0_TIMESTAMP_ADDR(x), mask)
480 #define HWIO_REO_R0_TIMESTAMP_OUTM(x, mask, val) \ argument
483 out_dword_masked_ns(HWIO_REO_R0_TIMESTAMP_ADDR(x), mask, val, HWIO_REO_R0_TIMESTAMP_IN(x)); \
498 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_INM(x, mask) \ argument
499 in_dword_masked ( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x), mask)
502 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_OUTM(x, mask, val) \ argument
505 …out_dword_masked_ns(HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x), mask, val, HWIO_REO_R0_ERR…
541 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_INM(x, mask) \ argument
542 in_dword_masked ( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x), mask)
545 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_OUTM(x, mask, val) \ argument
548 …out_dword_masked_ns(HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x), mask, val, HWIO_REO_R0_ERR…
584 #define HWIO_REO_R0_IDLE_REQ_CTRL_INM(x, mask) \ argument
585 in_dword_masked ( HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x), mask)
588 #define HWIO_REO_R0_IDLE_REQ_CTRL_OUTM(x, mask, val) \ argument
591 …out_dword_masked_ns(HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x), mask, val, HWIO_REO_R0_IDLE_REQ_CTRL_IN(x))…
609 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_INM(x, mask) \ argument
610 in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x), mask)
613 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_OUTM(x, mask, val) \ argument
616 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO…
631 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_INM(x, mask) \ argument
632 in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x), mask)
635 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_OUTM(x, mask, val) \ argument
638 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO…
656 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_INM(x, mask) \ argument
657 in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x), mask)
660 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_OUTM(x, mask, val) \ argument
663 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING…
678 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_INM(x, mask) \ argument
679 in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x), mask)
682 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_OUTM(x, mask, val) \ argument
685 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_…
703 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_INM(x, mask) \ argument
704 in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x), mask)
707 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_OUTM(x, mask, val) \ argument
710 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RI…
755 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_INM(x, mask) \ argument
756 in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x), mask)
759 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
762 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2…
777 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_INM(x, mask) \ argument
778 in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x), mask)
781 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
784 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2…
799 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
800 in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask)
803 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
806 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_RE…
827 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
828 in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask)
831 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
834 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_RE…
849 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
850 in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x), mask)
853 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
856 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R…
877 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
878 in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask)
881 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
884 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_RE…
899 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
900 in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask)
903 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
906 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_R…
921 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
922 in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask)
925 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
928 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_…
946 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
947 in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x), mask)
950 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
953 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDM…
968 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
969 in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x), mask)
972 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
975 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDM…
993 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_INM(x, mask) \ argument
994 in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x), mask)
997 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
1000 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2RE…
1015 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
1016 in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x), mask)
1019 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
1022 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_RX…
1037 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_INM(x, mask) \ argument
1038 in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x), mask)
1041 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_OUTM(x, mask, val) \ argument
1044 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO…
1059 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_INM(x, mask) \ argument
1060 in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x), mask)
1063 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_OUTM(x, mask, val) \ argument
1066 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO…
1084 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_INM(x, mask) \ argument
1085 in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x), mask)
1088 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_OUTM(x, mask, val) \ argument
1091 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_…
1106 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_INM(x, mask) \ argument
1107 in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x), mask)
1110 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_OUTM(x, mask, val) \ argument
1113 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_L…
1131 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_INM(x, mask) \ argument
1132 in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x), mask)
1135 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_OUTM(x, mask, val) \ argument
1138 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LIN…
1183 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_INM(x, mask) \ argument
1184 in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x), mask)
1187 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
1190 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2…
1205 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_INM(x, mask) \ argument
1206 in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x), mask)
1209 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
1212 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2…
1227 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
1228 in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask)
1231 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
1234 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_…
1255 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
1256 in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask)
1259 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
1262 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_…
1277 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
1278 in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x), mask)
1281 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
1284 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO…
1305 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
1306 in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask)
1309 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
1312 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_…
1327 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
1328 in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask)
1331 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
1334 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO…
1349 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
1350 in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask)
1353 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
1356 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWI…
1374 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
1375 in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_ADDR(x), mask)
1378 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
1381 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_WB…
1396 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
1397 in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_ADDR(x), mask)
1400 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
1403 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_WB…
1421 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_INM(x, mask) \ argument
1422 in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_ADDR(x), mask)
1425 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
1428 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_WBM2RE…
1443 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
1444 in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x), mask)
1447 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
1450 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_…
1465 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_INM(x, mask) \ argument
1466 in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x), mask)
1469 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_OUTM(x, mask, val) \ argument
1472 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING…
1487 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_INM(x, mask) \ argument
1488 in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x), mask)
1491 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_OUTM(x, mask, val) \ argument
1494 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING…
1512 #define HWIO_REO_R0_REO_CMD_RING_ID_INM(x, mask) \ argument
1513 in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x), mask)
1516 #define HWIO_REO_R0_REO_CMD_RING_ID_OUTM(x, mask, val) \ argument
1519 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_ID_IN…
1534 #define HWIO_REO_R0_REO_CMD_RING_STATUS_INM(x, mask) \ argument
1535 in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x), mask)
1538 #define HWIO_REO_R0_REO_CMD_RING_STATUS_OUTM(x, mask, val) \ argument
1541 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_S…
1559 #define HWIO_REO_R0_REO_CMD_RING_MISC_INM(x, mask) \ argument
1560 in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x), mask)
1563 #define HWIO_REO_R0_REO_CMD_RING_MISC_OUTM(x, mask, val) \ argument
1566 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_MIS…
1611 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_INM(x, mask) \ argument
1612 in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x), mask)
1615 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
1618 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_R…
1633 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_INM(x, mask) \ argument
1634 in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x), mask)
1637 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
1640 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_R…
1655 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
1656 in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask)
1659 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
1662 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R…
1683 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
1684 in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask)
1687 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
1690 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R…
1705 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
1706 in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), mask)
1709 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
1712 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
1733 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
1734 in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask)
1737 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
1740 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R…
1755 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
1756 in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask)
1759 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
1762 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_…
1777 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
1778 in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask)
1781 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
1784 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO…
1802 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
1803 in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x), mask)
1806 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
1809 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD…
1824 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
1825 in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x), mask)
1828 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
1831 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD…
1849 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_INM(x, mask) \ argument
1850 in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x), mask)
1853 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
1856 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RIN…
1871 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
1872 in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), mask)
1875 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
1878 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO_C…
1893 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_INM(x, mask) \ argument
1894 in_dword_masked ( HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x), mask)
1897 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_OUTM(x, mask, val) \ argument
1900 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_B…
1915 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_INM(x, mask) \ argument
1916 in_dword_masked ( HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x), mask)
1919 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_OUTM(x, mask, val) \ argument
1922 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_B…
1940 #define HWIO_REO_R0_SW2REO_RING_ID_INM(x, mask) \ argument
1941 in_dword_masked ( HWIO_REO_R0_SW2REO_RING_ID_ADDR(x), mask)
1944 #define HWIO_REO_R0_SW2REO_RING_ID_OUTM(x, mask, val) \ argument
1947 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_ID_IN(x…
1962 #define HWIO_REO_R0_SW2REO_RING_STATUS_INM(x, mask) \ argument
1963 in_dword_masked ( HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x), mask)
1966 #define HWIO_REO_R0_SW2REO_RING_STATUS_OUTM(x, mask, val) \ argument
1969 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_STA…
1987 #define HWIO_REO_R0_SW2REO_RING_MISC_INM(x, mask) \ argument
1988 in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x), mask)
1991 #define HWIO_REO_R0_SW2REO_RING_MISC_OUTM(x, mask, val) \ argument
1994 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_MISC_…
2039 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_INM(x, mask) \ argument
2040 in_dword_masked ( HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x), mask)
2043 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
2046 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RIN…
2061 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_INM(x, mask) \ argument
2062 in_dword_masked ( HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x), mask)
2065 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
2068 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RIN…
2083 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
2084 in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask)
2087 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
2090 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R0…
2111 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
2112 in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask)
2115 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
2118 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R0…
2133 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
2134 in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x), mask)
2137 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
2140 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW…
2161 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
2162 in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask)
2165 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
2168 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
2183 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
2184 in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask)
2187 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
2190 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_R…
2205 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
2206 in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask)
2209 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
2212 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO_…
2230 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
2231 in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x), mask)
2234 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
2237 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_R…
2252 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
2253 in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x), mask)
2256 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
2259 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_R…
2277 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_INM(x, mask) \ argument
2278 in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x), mask)
2281 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
2284 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_…
2299 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
2300 in_dword_masked ( HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x), mask)
2303 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
2306 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_SW2REO…
2321 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_INM(x, mask) \ argument
2322 in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x), mask)
2325 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_OUTM(x, mask, val) \ argument
2328 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING…
2343 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_INM(x, mask) \ argument
2344 in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x), mask)
2347 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_OUTM(x, mask, val) \ argument
2350 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING…
2368 #define HWIO_REO_R0_SW2REO1_RING_ID_INM(x, mask) \ argument
2369 in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x), mask)
2372 #define HWIO_REO_R0_SW2REO1_RING_ID_OUTM(x, mask, val) \ argument
2375 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_ID_IN…
2390 #define HWIO_REO_R0_SW2REO1_RING_STATUS_INM(x, mask) \ argument
2391 in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x), mask)
2394 #define HWIO_REO_R0_SW2REO1_RING_STATUS_OUTM(x, mask, val) \ argument
2397 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_S…
2415 #define HWIO_REO_R0_SW2REO1_RING_MISC_INM(x, mask) \ argument
2416 in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x), mask)
2419 #define HWIO_REO_R0_SW2REO1_RING_MISC_OUTM(x, mask, val) \ argument
2422 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_MIS…
2467 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_INM(x, mask) \ argument
2468 in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x), mask)
2471 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_OUTM(x, mask, val) \ argument
2474 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_R…
2489 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_INM(x, mask) \ argument
2490 in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x), mask)
2493 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_OUTM(x, mask, val) \ argument
2496 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_R…
2511 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \ argument
2512 in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask)
2515 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \ argument
2518 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R…
2539 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \ argument
2540 in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask)
2543 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \ argument
2546 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R…
2561 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_INM(x, mask) \ argument
2562 in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), mask)
2565 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \ argument
2568 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_S…
2589 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \ argument
2590 in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask)
2593 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \ argument
2596 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R…
2611 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \ argument
2612 in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask)
2615 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \ argument
2618 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_…
2633 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \ argument
2634 in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask)
2637 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \ argument
2640 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO…
2658 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
2659 in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x), mask)
2662 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
2665 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1…
2680 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
2681 in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x), mask)
2684 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
2687 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1…
2705 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_INM(x, mask) \ argument
2706 in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x), mask)
2709 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
2712 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RIN…
2727 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
2728 in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), mask)
2731 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
2734 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_SW2RE…
2749 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_INM(x, mask) \ argument
2750 in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x), mask)
2753 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_OUTM(x, mask, val) \ argument
2756 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING…
2771 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_INM(x, mask) \ argument
2772 in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x), mask)
2775 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_OUTM(x, mask, val) \ argument
2778 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING…
2796 #define HWIO_REO_R0_REO2SW1_RING_ID_INM(x, mask) \ argument
2797 in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x), mask)
2800 #define HWIO_REO_R0_REO2SW1_RING_ID_OUTM(x, mask, val) \ argument
2803 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_ID_IN…
2821 #define HWIO_REO_R0_REO2SW1_RING_STATUS_INM(x, mask) \ argument
2822 in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x), mask)
2825 #define HWIO_REO_R0_REO2SW1_RING_STATUS_OUTM(x, mask, val) \ argument
2828 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_S…
2846 #define HWIO_REO_R0_REO2SW1_RING_MISC_INM(x, mask) \ argument
2847 in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x), mask)
2850 #define HWIO_REO_R0_REO2SW1_RING_MISC_OUTM(x, mask, val) \ argument
2853 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_MIS…
2901 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_INM(x, mask) \ argument
2902 in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x), mask)
2905 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
2908 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_R…
2923 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_INM(x, mask) \ argument
2924 in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x), mask)
2927 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
2930 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_R…
2945 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
2946 in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x), mask)
2949 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
2952 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
2973 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
2974 in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x), mask)
2977 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
2980 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
3001 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
3002 in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask)
3005 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
3008 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
3023 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
3024 in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x), mask)
3027 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
3030 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1…
3045 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
3046 in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x), mask)
3049 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
3052 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1…
3070 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_INM(x, mask) \ argument
3071 in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x), mask)
3074 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
3077 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RIN…
3092 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
3093 in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x), mask)
3096 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
3099 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2S…
3114 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_INM(x, mask) \ argument
3115 in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x), mask)
3118 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_OUTM(x, mask, val) \ argument
3121 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING…
3136 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_INM(x, mask) \ argument
3137 in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x), mask)
3140 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_OUTM(x, mask, val) \ argument
3143 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING…
3161 #define HWIO_REO_R0_REO2SW2_RING_ID_INM(x, mask) \ argument
3162 in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x), mask)
3165 #define HWIO_REO_R0_REO2SW2_RING_ID_OUTM(x, mask, val) \ argument
3168 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_ID_IN…
3186 #define HWIO_REO_R0_REO2SW2_RING_STATUS_INM(x, mask) \ argument
3187 in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x), mask)
3190 #define HWIO_REO_R0_REO2SW2_RING_STATUS_OUTM(x, mask, val) \ argument
3193 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_S…
3211 #define HWIO_REO_R0_REO2SW2_RING_MISC_INM(x, mask) \ argument
3212 in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x), mask)
3215 #define HWIO_REO_R0_REO2SW2_RING_MISC_OUTM(x, mask, val) \ argument
3218 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_MIS…
3266 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_INM(x, mask) \ argument
3267 in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x), mask)
3270 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
3273 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_R…
3288 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_INM(x, mask) \ argument
3289 in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x), mask)
3292 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
3295 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_R…
3310 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
3311 in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x), mask)
3314 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
3317 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
3338 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
3339 in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x), mask)
3342 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
3345 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
3366 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
3367 in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask)
3370 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
3373 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
3388 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
3389 in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x), mask)
3392 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
3395 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2…
3410 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
3411 in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x), mask)
3414 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
3417 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2…
3435 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_INM(x, mask) \ argument
3436 in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x), mask)
3439 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
3442 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RIN…
3457 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
3458 in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x), mask)
3461 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
3464 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2S…
3479 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_INM(x, mask) \ argument
3480 in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x), mask)
3483 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_OUTM(x, mask, val) \ argument
3486 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING…
3501 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_INM(x, mask) \ argument
3502 in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x), mask)
3505 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_OUTM(x, mask, val) \ argument
3508 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING…
3526 #define HWIO_REO_R0_REO2SW3_RING_ID_INM(x, mask) \ argument
3527 in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x), mask)
3530 #define HWIO_REO_R0_REO2SW3_RING_ID_OUTM(x, mask, val) \ argument
3533 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_ID_IN…
3551 #define HWIO_REO_R0_REO2SW3_RING_STATUS_INM(x, mask) \ argument
3552 in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x), mask)
3555 #define HWIO_REO_R0_REO2SW3_RING_STATUS_OUTM(x, mask, val) \ argument
3558 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_S…
3576 #define HWIO_REO_R0_REO2SW3_RING_MISC_INM(x, mask) \ argument
3577 in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x), mask)
3580 #define HWIO_REO_R0_REO2SW3_RING_MISC_OUTM(x, mask, val) \ argument
3583 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_MIS…
3631 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_INM(x, mask) \ argument
3632 in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x), mask)
3635 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
3638 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_R…
3653 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_INM(x, mask) \ argument
3654 in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x), mask)
3657 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
3660 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_R…
3675 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
3676 in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x), mask)
3679 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
3682 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
3703 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
3704 in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x), mask)
3707 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
3710 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
3731 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
3732 in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask)
3735 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
3738 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
3753 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
3754 in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x), mask)
3757 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
3760 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3…
3775 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
3776 in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x), mask)
3779 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
3782 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3…
3800 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_INM(x, mask) \ argument
3801 in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x), mask)
3804 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
3807 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RIN…
3822 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
3823 in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x), mask)
3826 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
3829 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2S…
3844 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_INM(x, mask) \ argument
3845 in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x), mask)
3848 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_OUTM(x, mask, val) \ argument
3851 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING…
3866 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_INM(x, mask) \ argument
3867 in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x), mask)
3870 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_OUTM(x, mask, val) \ argument
3873 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING…
3891 #define HWIO_REO_R0_REO2SW4_RING_ID_INM(x, mask) \ argument
3892 in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x), mask)
3895 #define HWIO_REO_R0_REO2SW4_RING_ID_OUTM(x, mask, val) \ argument
3898 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_ID_IN…
3916 #define HWIO_REO_R0_REO2SW4_RING_STATUS_INM(x, mask) \ argument
3917 in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x), mask)
3920 #define HWIO_REO_R0_REO2SW4_RING_STATUS_OUTM(x, mask, val) \ argument
3923 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_S…
3941 #define HWIO_REO_R0_REO2SW4_RING_MISC_INM(x, mask) \ argument
3942 in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x), mask)
3945 #define HWIO_REO_R0_REO2SW4_RING_MISC_OUTM(x, mask, val) \ argument
3948 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_MIS…
3996 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_INM(x, mask) \ argument
3997 in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x), mask)
4000 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
4003 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_R…
4018 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_INM(x, mask) \ argument
4019 in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x), mask)
4022 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
4025 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_R…
4040 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
4041 in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x), mask)
4044 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
4047 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
4068 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
4069 in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x), mask)
4072 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
4075 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
4096 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
4097 in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask)
4100 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
4103 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
4118 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
4119 in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x), mask)
4122 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
4125 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4…
4140 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
4141 in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x), mask)
4144 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
4147 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4…
4165 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_INM(x, mask) \ argument
4166 in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x), mask)
4169 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
4172 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RIN…
4187 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
4188 in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x), mask)
4191 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
4194 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2S…
4209 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_INM(x, mask) \ argument
4210 in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x), mask)
4213 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_OUTM(x, mask, val) \ argument
4216 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING…
4231 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_INM(x, mask) \ argument
4232 in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x), mask)
4235 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_OUTM(x, mask, val) \ argument
4238 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING…
4256 #define HWIO_REO_R0_REO2TCL_RING_ID_INM(x, mask) \ argument
4257 in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x), mask)
4260 #define HWIO_REO_R0_REO2TCL_RING_ID_OUTM(x, mask, val) \ argument
4263 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_ID_IN…
4281 #define HWIO_REO_R0_REO2TCL_RING_STATUS_INM(x, mask) \ argument
4282 in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x), mask)
4285 #define HWIO_REO_R0_REO2TCL_RING_STATUS_OUTM(x, mask, val) \ argument
4288 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_S…
4306 #define HWIO_REO_R0_REO2TCL_RING_MISC_INM(x, mask) \ argument
4307 in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x), mask)
4310 #define HWIO_REO_R0_REO2TCL_RING_MISC_OUTM(x, mask, val) \ argument
4313 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_MIS…
4361 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_INM(x, mask) \ argument
4362 in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x), mask)
4365 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
4368 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_R…
4383 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_INM(x, mask) \ argument
4384 in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x), mask)
4387 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
4390 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_R…
4405 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
4406 in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x), mask)
4409 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
4412 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
4433 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
4434 in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x), mask)
4437 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
4440 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
4461 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
4462 in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask)
4465 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
4468 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
4483 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
4484 in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x), mask)
4487 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
4490 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL…
4505 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
4506 in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x), mask)
4509 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
4512 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL…
4530 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_INM(x, mask) \ argument
4531 in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x), mask)
4534 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
4537 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RIN…
4552 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
4553 in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x), mask)
4556 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
4559 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2T…
4574 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_INM(x, mask) \ argument
4575 in_dword_masked ( HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x), mask)
4578 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_OUTM(x, mask, val) \ argument
4581 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_B…
4596 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_INM(x, mask) \ argument
4597 in_dword_masked ( HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x), mask)
4600 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_OUTM(x, mask, val) \ argument
4603 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_B…
4621 #define HWIO_REO_R0_REO2FW_RING_ID_INM(x, mask) \ argument
4622 in_dword_masked ( HWIO_REO_R0_REO2FW_RING_ID_ADDR(x), mask)
4625 #define HWIO_REO_R0_REO2FW_RING_ID_OUTM(x, mask, val) \ argument
4628 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_ID_IN(x…
4646 #define HWIO_REO_R0_REO2FW_RING_STATUS_INM(x, mask) \ argument
4647 in_dword_masked ( HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x), mask)
4650 #define HWIO_REO_R0_REO2FW_RING_STATUS_OUTM(x, mask, val) \ argument
4653 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_STA…
4671 #define HWIO_REO_R0_REO2FW_RING_MISC_INM(x, mask) \ argument
4672 in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x), mask)
4675 #define HWIO_REO_R0_REO2FW_RING_MISC_OUTM(x, mask, val) \ argument
4678 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_MISC_…
4726 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_INM(x, mask) \ argument
4727 in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x), mask)
4730 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
4733 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RIN…
4748 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_INM(x, mask) \ argument
4749 in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x), mask)
4752 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
4755 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RIN…
4770 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
4771 in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask)
4774 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
4777 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO…
4798 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
4799 in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask)
4802 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
4805 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RE…
4826 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
4827 in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask)
4830 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
4833 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_…
4848 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
4849 in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x), mask)
4852 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
4855 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_R…
4870 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
4871 in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x), mask)
4874 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
4877 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_R…
4895 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_INM(x, mask) \ argument
4896 in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x), mask)
4899 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
4902 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_…
4917 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
4918 in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask)
4921 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
4924 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2FW…
4939 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_INM(x, mask) \ argument
4940 in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x), mask)
4943 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_OUTM(x, mask, val) \ argument
4946 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELE…
4961 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_INM(x, mask) \ argument
4962 in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x), mask)
4965 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_OUTM(x, mask, val) \ argument
4968 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELE…
4986 #define HWIO_REO_R0_REO_RELEASE_RING_ID_INM(x, mask) \ argument
4987 in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x), mask)
4990 #define HWIO_REO_R0_REO_RELEASE_RING_ID_OUTM(x, mask, val) \ argument
4993 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RI…
5011 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_INM(x, mask) \ argument
5012 in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x), mask)
5015 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_OUTM(x, mask, val) \ argument
5018 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEAS…
5036 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_INM(x, mask) \ argument
5037 in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x), mask)
5040 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_OUTM(x, mask, val) \ argument
5043 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_…
5091 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_INM(x, mask) \ argument
5092 in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x), mask)
5095 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
5098 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_R…
5113 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_INM(x, mask) \ argument
5114 in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x), mask)
5117 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
5120 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_R…
5135 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
5136 in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x), mask)
5139 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
5142 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R…
5163 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
5164 in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x), mask)
5167 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
5170 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_…
5191 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
5192 in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask)
5195 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
5198 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_RE…
5213 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
5214 in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_ADDR(x), mask)
5217 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
5220 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO…
5235 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
5236 in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_ADDR(x), mask)
5239 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
5242 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO…
5260 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_INM(x, mask) \ argument
5261 in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_ADDR(x), mask)
5264 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
5267 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO_REL…
5282 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
5283 in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x), mask)
5286 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
5289 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_R…
5304 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_INM(x, mask) \ argument
5305 in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x), mask)
5308 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_OUTM(x, mask, val) \ argument
5311 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATU…
5326 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_INM(x, mask) \ argument
5327 in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x), mask)
5330 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_OUTM(x, mask, val) \ argument
5333 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATU…
5351 #define HWIO_REO_R0_REO_STATUS_RING_ID_INM(x, mask) \ argument
5352 in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x), mask)
5355 #define HWIO_REO_R0_REO_STATUS_RING_ID_OUTM(x, mask, val) \ argument
5358 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING…
5376 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_INM(x, mask) \ argument
5377 in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x), mask)
5380 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_OUTM(x, mask, val) \ argument
5383 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_…
5401 #define HWIO_REO_R0_REO_STATUS_RING_MISC_INM(x, mask) \ argument
5402 in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x), mask)
5405 #define HWIO_REO_R0_REO_STATUS_RING_MISC_OUTM(x, mask, val) \ argument
5408 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RI…
5456 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_INM(x, mask) \ argument
5457 in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x), mask)
5460 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_OUTM(x, mask, val) \ argument
5463 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_ST…
5478 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_INM(x, mask) \ argument
5479 in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x), mask)
5482 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_OUTM(x, mask, val) \ argument
5485 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_ST…
5500 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_INM(x, mask) \ argument
5501 in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x), mask)
5504 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \ argument
5507 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0…
5528 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_INM(x, mask) \ argument
5529 in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x), mask)
5532 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \ argument
5535 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R…
5556 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \ argument
5557 in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask)
5560 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \ argument
5563 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO…
5578 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_INM(x, mask) \ argument
5579 in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x), mask)
5582 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \ argument
5585 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_…
5600 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_INM(x, mask) \ argument
5601 in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x), mask)
5604 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \ argument
5607 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_…
5625 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_INM(x, mask) \ argument
5626 in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x), mask)
5629 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_OUTM(x, mask, val) \ argument
5632 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO_STAT…
5647 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_INM(x, mask) \ argument
5648 in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x), mask)
5651 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \ argument
5654 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_RE…
5669 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_INM(x, mask) \ argument
5670 in_dword_masked ( HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x), mask)
5673 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_OUTM(x, mask, val) \ argument
5676 …out_dword_masked_ns(HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x), mask, val, HWIO_REO_R0_WATCHDOG_TIMEOUT_…
5694 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_INM(x, mask) \ argument
5695 in_dword_masked ( HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x), mask)
5698 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_OUTM(x, mask, val) \ argument
5701 …out_dword_masked_ns(HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x), mask, val, HWIO_REO_R0_INTERR…
5716 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_INM(x, mask) \ argument
5717 in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x), mask)
5720 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_OUTM(x, mask, val) \ argument
5723 …out_dword_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHO…
5738 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_INM(x, mask) \ argument
5739 in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x), mask)
5742 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_OUTM(x, mask, val) \ argument
5745 …out_dword_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHO…
5760 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_INM(x, mask) \ argument
5761 in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x), mask)
5764 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_OUTM(x, mask, val) \ argument
5767 …out_dword_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHO…
5782 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_INM(x, mask) \ argument
5783 in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x), mask)
5786 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_OUTM(x, mask, val) \ argument
5789 …out_dword_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHO…
5804 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_INM(x, mask) \ argument
5805 in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x), mask)
5808 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_OUTM(x, mask, val) \ argument
5811 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
5826 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_INM(x, mask) \ argument
5827 in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x), mask)
5830 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_OUTM(x, mask, val) \ argument
5833 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
5848 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_INM(x, mask) \ argument
5849 in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x), mask)
5852 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_OUTM(x, mask, val) \ argument
5855 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
5870 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_INM(x, mask) \ argument
5871 in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x), mask)
5874 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_OUTM(x, mask, val) \ argument
5877 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
5892 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_INM(x, mask) \ argument
5893 in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x), mask)
5896 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_OUTM(x, mask, val) \ argument
5899 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
5914 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_INM(x, mask) \ argument
5915 in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x), mask)
5918 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_OUTM(x, mask, val) \ argument
5921 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
5936 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_INM(x, mask) \ argument
5937 in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x), mask)
5940 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_OUTM(x, mask, val) \ argument
5943 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
5958 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_INM(x, mask) \ argument
5959 in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x), mask)
5962 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_OUTM(x, mask, val) \ argument
5965 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
5980 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_INM(x, mask) \ argument
5981 in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x), mask)
5984 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_OUTM(x, mask, val) \ argument
5987 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6002 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_INM(x, mask) \ argument
6003 in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x), mask)
6006 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_OUTM(x, mask, val) \ argument
6009 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6024 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_INM(x, mask) \ argument
6025 in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x), mask)
6028 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_OUTM(x, mask, val) \ argument
6031 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6046 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_INM(x, mask) \ argument
6047 in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x), mask)
6050 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_OUTM(x, mask, val) \ argument
6053 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6068 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_INM(x, mask) \ argument
6069 in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x), mask)
6072 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_OUTM(x, mask, val) \ argument
6075 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6090 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_INM(x, mask) \ argument
6091 in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x), mask)
6094 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_OUTM(x, mask, val) \ argument
6097 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6112 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_INM(x, mask) \ argument
6113 in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x), mask)
6116 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_OUTM(x, mask, val) \ argument
6119 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6134 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_INM(x, mask) \ argument
6135 in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x), mask)
6138 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_OUTM(x, mask, val) \ argument
6141 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6156 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_INM(x, mask) \ argument
6157 in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x), mask)
6160 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_OUTM(x, mask, val) \ argument
6163 …out_dword_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QU…
6178 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_INM(x, mask) \ argument
6179 in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x), mask)
6182 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_OUTM(x, mask, val) \ argument
6185 …out_dword_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QU…
6200 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_INM(x, mask) \ argument
6201 in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x), mask)
6204 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_OUTM(x, mask, val) \ argument
6207 …out_dword_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QU…
6222 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_INM(x, mask) \ argument
6223 in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x), mask)
6226 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_OUTM(x, mask, val) \ argument
6229 …out_dword_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QU…
6244 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_INM(x, mask) \ argument
6245 in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x), mask)
6248 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_OUTM(x, mask, val) \ argument
6251 …out_dword_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTA…
6266 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_INM(x, mask) \ argument
6267 in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x), mask)
6270 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_OUTM(x, mask, val) \ argument
6273 …out_dword_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTA…
6288 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_INM(x, mask) \ argument
6289 in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x), mask)
6292 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_OUTM(x, mask, val) \ argument
6295 …out_dword_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTA…
6310 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_INM(x, mask) \ argument
6311 in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x), mask)
6314 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_OUTM(x, mask, val) \ argument
6317 …out_dword_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTA…
6332 #define HWIO_REO_R0_AGING_CONTROL_INM(x, mask) \ argument
6333 in_dword_masked ( HWIO_REO_R0_AGING_CONTROL_ADDR(x), mask)
6336 #define HWIO_REO_R0_AGING_CONTROL_OUTM(x, mask, val) \ argument
6339 …out_dword_masked_ns(HWIO_REO_R0_AGING_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_AGING_CONTROL_IN(x))…
6354 #define HWIO_REO_R0_MISC_CTL_INM(x, mask) \ argument
6355 in_dword_masked ( HWIO_REO_R0_MISC_CTL_ADDR(x), mask)
6358 #define HWIO_REO_R0_MISC_CTL_OUTM(x, mask, val) \ argument
6361 out_dword_masked_ns(HWIO_REO_R0_MISC_CTL_ADDR(x), mask, val, HWIO_REO_R0_MISC_CTL_IN(x)); \
6385 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_INM(x, mask) \ argument
6386 in_dword_masked ( HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x), mask)
6389 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_OUTM(x, mask, val) \ argument
6392 …out_dword_masked_ns(HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x), mask, val, HWIO_REO_R0_HIGH_MEMORY_…
6407 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_INM(x, mask) \ argument
6408 in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x), mask)
6411 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_OUTM(x, mask, val) \ argument
6414 …out_dword_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_US…
6429 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_INM(x, mask) \ argument
6430 in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x), mask)
6433 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_OUTM(x, mask, val) \ argument
6436 …out_dword_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_US…
6451 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_INM(x, mask) \ argument
6452 in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x), mask)
6455 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_OUTM(x, mask, val) \ argument
6458 …out_dword_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_US…
6473 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_INM(x, mask) \ argument
6474 in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x), mask)
6477 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_OUTM(x, mask, val) \ argument
6480 …out_dword_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_US…
6495 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_INM(x, mask) \ argument
6496 in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x), mask)
6499 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_OUTM(x, mask, val) \ argument
6502 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x), mask, val, HWIO_REO_R0…
6517 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_INM(x, mask) \ argument
6518 in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x), mask)
6521 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_OUTM(x, mask, val) \ argument
6524 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x), mask, val, HWIO_REO_R0…
6539 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_INM(x, mask) \ argument
6540 in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x), mask)
6543 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_OUTM(x, mask, val) \ argument
6546 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x), mask, val, HWIO_REO_R0…
6561 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_INM(x, mask) \ argument
6562 in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x), mask)
6565 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_OUTM(x, mask, val) \ argument
6568 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x), mask, val, HWIO_REO_R…
6583 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_INM(x, mask) \ argument
6584 in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x), mask)
6587 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_OUTM(x, mask, val) \ argument
6590 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL…
6605 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_INM(x, mask) \ argument
6606 in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x), mask)
6609 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_OUTM(x, mask, val) \ argument
6612 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL…
6627 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_INM(x, mask) \ argument
6628 in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x), mask)
6631 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_OUTM(x, mask, val) \ argument
6634 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL…
6649 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_INM(x, mask) \ argument
6650 in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x), mask)
6653 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_OUTM(x, mask, val) \ argument
6656 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL…
6671 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_INM(x, mask) \ argument
6672 in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x), mask)
6675 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_OUTM(x, mask, val) \ argument
6678 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
6693 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_INM(x, mask) \ argument
6694 in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x), mask)
6697 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_OUTM(x, mask, val) \ argument
6700 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
6715 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_INM(x, mask) \ argument
6716 in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x), mask)
6719 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_OUTM(x, mask, val) \ argument
6722 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
6737 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_INM(x, mask) \ argument
6738 in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x), mask)
6741 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_OUTM(x, mask, val) \ argument
6744 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
6759 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_INM(x, mask) \ argument
6760 in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x), mask)
6763 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_OUTM(x, mask, val) \ argument
6766 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
6781 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_INM(x, mask) \ argument
6782 in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x), mask)
6785 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_OUTM(x, mask, val) \ argument
6788 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
6803 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_INM(x, mask) \ argument
6804 in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x), mask)
6807 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_OUTM(x, mask, val) \ argument
6810 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
6825 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_INM(x, mask) \ argument
6826 in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x), mask)
6829 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_OUTM(x, mask, val) \ argument
6832 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
6847 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_INM(x, mask) \ argument
6848 in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x), mask)
6851 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_OUTM(x, mask, val) \ argument
6854 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_B…
6872 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_INM(x, mask) \ argument
6873 in_dword_masked ( HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x), mask)
6876 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_OUTM(x, mask, val) \ argument
6879 …out_dword_masked_ns(HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x), mask, val, HWIO_REO_R0_GXI_TESTBUS_LOWE…
6894 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_INM(x, mask) \ argument
6895 in_dword_masked ( HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x), mask)
6898 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_OUTM(x, mask, val) \ argument
6901 …out_dword_masked_ns(HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x), mask, val, HWIO_REO_R0_GXI_TESTBUS_UPPE…
6916 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_INM(x, mask) \ argument
6917 in_dword_masked ( HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x), mask)
6920 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_OUTM(x, mask, val) \ argument
6923 …out_dword_masked_ns(HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GXI_SM_STATES_I…
6944 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_INM(x, mask) \ argument
6945 in_dword_masked ( HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask)
6948 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_OUTM(x, mask, val) \ argument
6951 …out_dword_masked_ns(HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_REO_R0_GXI_END_OF_T…
6966 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_INM(x, mask) \ argument
6967 in_dword_masked ( HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask)
6970 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_OUTM(x, mask, val) \ argument
6973 …out_dword_masked_ns(HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask, val, HWIO_REO_R0_GXI_CLOCK_G…
7024 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_INM(x, mask) \ argument
7025 in_dword_masked ( HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x), mask)
7028 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_OUTM(x, mask, val) \ argument
7031 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_ERR_INTS_…
7055 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_INM(x, mask) \ argument
7056 in_dword_masked ( HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x), mask)
7059 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_OUTM(x, mask, val) \ argument
7062 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_ERR_STAT…
7083 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_INM(x, mask) \ argument
7084 in_dword_masked ( HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask)
7087 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_OUTM(x, mask, val) \ argument
7090 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_DE…
7114 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_INM(x, mask) \ argument
7115 in_dword_masked ( HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask)
7118 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_OUTM(x, mask, val) \ argument
7121 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_RE…
7145 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_INM(x, mask) \ argument
7146 in_dword_masked ( HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask)
7149 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_OUTM(x, mask, val) \ argument
7152 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_MISC_…
7194 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_INM(x, mask) \ argument
7195 in_dword_masked ( HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask)
7198 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_OUTM(x, mask, val) \ argument
7201 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WDOG_…
7219 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_INM(x, mask) \ argument
7220 in_dword_masked ( HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask)
7223 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_OUTM(x, mask, val) \ argument
7226 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WDOG_S…
7241 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_INM(x, mask) \ argument
7242 in_dword_masked ( HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask)
7245 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_OUTM(x, mask, val) \ argument
7248 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_IDLE…
7266 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_INM(x, mask) \ argument
7267 in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask)
7270 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_OUTM(x, mask, val) \ argument
7273 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_RD…
7294 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_INM(x, mask) \ argument
7295 in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask)
7298 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_OUTM(x, mask, val) \ argument
7301 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WR…
7322 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_INM(x, mask) \ argument
7323 in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), mask)
7326 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \ argument
7329 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), mask, val, HWIO_REO_R0_…
7344 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_INM(x, mask) \ argument
7345 in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), mask)
7348 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \ argument
7351 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), mask, val, HWIO_REO_R0_…
7366 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_INM(x, mask) \ argument
7367 in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), mask)
7370 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \ argument
7373 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), mask, val, HWIO_REO_R0_…
7388 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_INM(x, mask) \ argument
7389 in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), mask)
7392 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \ argument
7395 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), mask, val, HWIO_REO_R0_…
7410 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_INM(x, mask) \ argument
7411 in_dword_masked ( HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), mask)
7414 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUTM(x, mask, val) \ argument
7417 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI…
7441 #define HWIO_REO_R0_CACHE_CTL_CONFIG_INM(x, mask) \ argument
7442 in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x), mask)
7445 #define HWIO_REO_R0_CACHE_CTL_CONFIG_OUTM(x, mask, val) \ argument
7448 …out_dword_masked_ns(HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_CONFIG_…
7490 #define HWIO_REO_R0_CACHE_CTL_CONTROL_INM(x, mask) \ argument
7491 in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x), mask)
7494 #define HWIO_REO_R0_CACHE_CTL_CONTROL_OUTM(x, mask, val) \ argument
7497 …out_dword_masked_ns(HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_CONTRO…
7515 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_INM(x, mask) \ argument
7516 in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x), mask)
7519 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_OUTM(x, mask, val) \ argument
7522 …out_dword_masked_ns(HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_CON…
7537 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_INM(x, mask) \ argument
7538 in_dword_masked ( HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x), mask)
7541 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_OUTM(x, mask, val) \ argument
7544 …out_dword_masked_ns(HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_SET_S…
7559 #define HWIO_REO_R0_CLK_GATE_CTRL_INM(x, mask) \ argument
7560 in_dword_masked ( HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x), mask)
7563 #define HWIO_REO_R0_CLK_GATE_CTRL_OUTM(x, mask, val) \ argument
7566 …out_dword_masked_ns(HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x), mask, val, HWIO_REO_R0_CLK_GATE_CTRL_IN(x))…
7608 #define HWIO_REO_R0_EVENTMASK_IX_0_INM(x, mask) \ argument
7609 in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x), mask)
7612 #define HWIO_REO_R0_EVENTMASK_IX_0_OUTM(x, mask, val) \ argument
7615 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_0_IN(x…
7630 #define HWIO_REO_R0_EVENTMASK_IX_1_INM(x, mask) \ argument
7631 in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x), mask)
7634 #define HWIO_REO_R0_EVENTMASK_IX_1_OUTM(x, mask, val) \ argument
7637 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_1_IN(x…
7652 #define HWIO_REO_R0_EVENTMASK_IX_2_INM(x, mask) \ argument
7653 in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x), mask)
7656 #define HWIO_REO_R0_EVENTMASK_IX_2_OUTM(x, mask, val) \ argument
7659 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_2_IN(x…
7674 #define HWIO_REO_R0_EVENTMASK_IX_3_INM(x, mask) \ argument
7675 in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x), mask)
7678 #define HWIO_REO_R0_EVENTMASK_IX_3_OUTM(x, mask, val) \ argument
7681 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_3_IN(x…
7696 #define HWIO_REO_R1_MISC_DEBUG_CTRL_INM(x, mask) \ argument
7697 in_dword_masked ( HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x), mask)
7700 #define HWIO_REO_R1_MISC_DEBUG_CTRL_OUTM(x, mask, val) \ argument
7703 …out_dword_masked_ns(HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x), mask, val, HWIO_REO_R1_MISC_DEBUG_CTRL_IN…
7730 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_INM(x, mask) \ argument
7731 in_dword_masked ( HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x), mask)
7734 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_OUTM(x, mask, val) \ argument
7737 …out_dword_masked_ns(HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x), mask, val, HWIO_REO_R1_MISC_PERF_DEB…
7755 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_INM(x, mask) \ argument
7756 in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x), mask)
7759 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_OUTM(x, mask, val) \ argument
7762 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_…
7786 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_INM(x, mask) \ argument
7787 in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x), mask)
7790 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_OUTM(x, mask, val) \ argument
7793 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CT…
7808 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_INM(x, mask) \ argument
7809 in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x), mask)
7812 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_OUTM(x, mask, val) \ argument
7815 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x), mask, val, HWIO_REO_R1_CACHE_C…
7830 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_INM(x, mask) \ argument
7831 in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x), mask)
7834 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_OUTM(x, mask, val) \ argument
7837 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x), mask, val, HWIO_REO_R1_CACH…
7852 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_INM(x, mask) \ argument
7853 in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x), mask)
7856 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_OUTM(x, mask, val) \ argument
7859 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x), mask, val, HWIO_REO_R1_CAC…
7874 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_INM(x, mask) \ argument
7875 in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x), mask)
7878 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_OUTM(x, mask, val) \ argument
7881 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBU…
7896 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_INM(x, mask) \ argument
7897 in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x), mask)
7900 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_OUTM(x, mask, val) \ argument
7903 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CT…
7921 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_INM(x, mask) \ argument
7922 in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x), mask)
7925 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_OUTM(x, mask, val) \ argument
7928 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x), mask, val, HWIO_REO_R1_CACHE_C…
7946 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_INM(x, mask) \ argument
7947 in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x), mask)
7950 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_OUTM(x, mask, val) \ argument
7953 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x), mask, val, HWIO_REO_R1_CACHE_C…
7971 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_INM(x, mask) \ argument
7972 in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x), mask)
7975 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_OUTM(x, mask, val) \ argument
7978 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x), mask, val, HWIO_REO_R1_CACHE_C…
7996 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_INM(x, mask) \ argument
7997 in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x), mask)
8000 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_OUTM(x, mask, val) \ argument
8003 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x), mask, val, HWIO_REO_R1_CA…
8018 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_INM(x, mask) \ argument
8019 in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x), mask)
8022 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_OUTM(x, mask, val) \ argument
8025 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x), mask, val, HWIO_REO_R1_C…
8040 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_INM(x, mask) \ argument
8041 in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x), mask)
8044 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_OUTM(x, mask, val) \ argument
8047 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x), mask, val, HWIO_REO_R1…
8065 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_INM(x, mask) \ argument
8066 in_dword_masked ( HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x), mask)
8069 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_OUTM(x, mask, val) \ argument
8072 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_REO_R1_CACHE_…
8087 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_INM(x, mask) \ argument
8088 in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_ADDR(x), mask)
8091 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_OUTM(x, mask, val) \ argument
8094 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_ADDR(x), mask, val, HWIO_REO_R1_CACH…
8118 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_INM(x, mask) \ argument
8119 in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_ADDR(x), mask)
8122 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_OUTM(x, mask, val) \ argument
8125 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_ADDR(x), mask, val, HWIO_REO_R1_CACH…
8140 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_INM(x, mask) \ argument
8141 in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_ADDR(x), mask)
8144 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_OUTM(x, mask, val) \ argument
8147 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_ADDR(x), mask, val, HWIO_REO_R1_CACH…
8162 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_INM(x, mask) \ argument
8163 in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_ADDR(x), mask)
8166 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_OUTM(x, mask, val) \ argument
8169 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_ADDR(x), mask, val, HWIO_REO_R1_CACHE…
8205 #define HWIO_REO_R1_END_OF_TEST_CHECK_INM(x, mask) \ argument
8206 in_dword_masked ( HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x), mask)
8209 #define HWIO_REO_R1_END_OF_TEST_CHECK_OUTM(x, mask, val) \ argument
8212 …out_dword_masked_ns(HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_REO_R1_END_OF_TEST_CHEC…
8227 #define HWIO_REO_R1_SM_ALL_IDLE_INM(x, mask) \ argument
8228 in_dword_masked ( HWIO_REO_R1_SM_ALL_IDLE_ADDR(x), mask)
8231 #define HWIO_REO_R1_SM_ALL_IDLE_OUTM(x, mask, val) \ argument
8234 out_dword_masked_ns(HWIO_REO_R1_SM_ALL_IDLE_ADDR(x), mask, val, HWIO_REO_R1_SM_ALL_IDLE_IN(x)); \
8255 #define HWIO_REO_R1_TESTBUS_CTRL_INM(x, mask) \ argument
8256 in_dword_masked ( HWIO_REO_R1_TESTBUS_CTRL_ADDR(x), mask)
8259 #define HWIO_REO_R1_TESTBUS_CTRL_OUTM(x, mask, val) \ argument
8262 …out_dword_masked_ns(HWIO_REO_R1_TESTBUS_CTRL_ADDR(x), mask, val, HWIO_REO_R1_TESTBUS_CTRL_IN(x)); \
8277 #define HWIO_REO_R1_TESTBUS_LOWER_INM(x, mask) \ argument
8278 in_dword_masked ( HWIO_REO_R1_TESTBUS_LOWER_ADDR(x), mask)
8281 #define HWIO_REO_R1_TESTBUS_LOWER_OUTM(x, mask, val) \ argument
8284 …out_dword_masked_ns(HWIO_REO_R1_TESTBUS_LOWER_ADDR(x), mask, val, HWIO_REO_R1_TESTBUS_LOWER_IN(x))…
8299 #define HWIO_REO_R1_TESTBUS_HIGHER_INM(x, mask) \ argument
8300 in_dword_masked ( HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x), mask)
8303 #define HWIO_REO_R1_TESTBUS_HIGHER_OUTM(x, mask, val) \ argument
8306 …out_dword_masked_ns(HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x), mask, val, HWIO_REO_R1_TESTBUS_HIGHER_IN(x…
8321 #define HWIO_REO_R1_SM_STATES_IX_0_INM(x, mask) \ argument
8322 in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_0_ADDR(x), mask)
8325 #define HWIO_REO_R1_SM_STATES_IX_0_OUTM(x, mask, val) \ argument
8328 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_0_IN(x…
8343 #define HWIO_REO_R1_SM_STATES_IX_1_INM(x, mask) \ argument
8344 in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_1_ADDR(x), mask)
8347 #define HWIO_REO_R1_SM_STATES_IX_1_OUTM(x, mask, val) \ argument
8350 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_1_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_1_IN(x…
8365 #define HWIO_REO_R1_SM_STATES_IX_2_INM(x, mask) \ argument
8366 in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_2_ADDR(x), mask)
8369 #define HWIO_REO_R1_SM_STATES_IX_2_OUTM(x, mask, val) \ argument
8372 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_2_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_2_IN(x…
8387 #define HWIO_REO_R1_SM_STATES_IX_3_INM(x, mask) \ argument
8388 in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_3_ADDR(x), mask)
8391 #define HWIO_REO_R1_SM_STATES_IX_3_OUTM(x, mask, val) \ argument
8394 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_3_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_3_IN(x…
8409 #define HWIO_REO_R1_SM_STATES_IX_4_INM(x, mask) \ argument
8410 in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_4_ADDR(x), mask)
8413 #define HWIO_REO_R1_SM_STATES_IX_4_OUTM(x, mask, val) \ argument
8416 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_4_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_4_IN(x…
8431 #define HWIO_REO_R1_SM_STATES_IX_5_INM(x, mask) \ argument
8432 in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_5_ADDR(x), mask)
8435 #define HWIO_REO_R1_SM_STATES_IX_5_OUTM(x, mask, val) \ argument
8438 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_5_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_5_IN(x…
8453 #define HWIO_REO_R1_SM_STATES_IX_6_INM(x, mask) \ argument
8454 in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_6_ADDR(x), mask)
8457 #define HWIO_REO_R1_SM_STATES_IX_6_OUTM(x, mask, val) \ argument
8460 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_6_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_6_IN(x…
8475 #define HWIO_REO_R1_IDLE_STATES_IX_0_INM(x, mask) \ argument
8476 in_dword_masked ( HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x), mask)
8479 #define HWIO_REO_R1_IDLE_STATES_IX_0_OUTM(x, mask, val) \ argument
8482 …out_dword_masked_ns(HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x), mask, val, HWIO_REO_R1_IDLE_STATES_IX_0_…
8497 #define HWIO_REO_R1_INVALID_APB_ACCESS_INM(x, mask) \ argument
8498 in_dword_masked ( HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x), mask)
8501 #define HWIO_REO_R1_INVALID_APB_ACCESS_OUTM(x, mask, val) \ argument
8504 …out_dword_masked_ns(HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x), mask, val, HWIO_REO_R1_INVALID_APB_ACC…
8522 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_INM(x, mask) \ argument
8523 in_dword_masked ( HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x), mask)
8526 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_OUTM(x, mask, val) \ argument
8529 …out_dword_masked_ns(HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO0_RING…
8544 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_INM(x, mask) \ argument
8545 in_dword_masked ( HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x), mask)
8548 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_OUTM(x, mask, val) \ argument
8551 …out_dword_masked_ns(HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO0_RING…
8566 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_INM(x, mask) \ argument
8567 in_dword_masked ( HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x), mask)
8570 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_OUTM(x, mask, val) \ argument
8573 …out_dword_masked_ns(HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_WBM2REO_LINK_…
8588 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_INM(x, mask) \ argument
8589 in_dword_masked ( HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x), mask)
8592 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_OUTM(x, mask, val) \ argument
8595 …out_dword_masked_ns(HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_WBM2REO_LINK_…
8610 #define HWIO_REO_R2_REO_CMD_RING_HP_INM(x, mask) \ argument
8611 in_dword_masked ( HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x), mask)
8614 #define HWIO_REO_R2_REO_CMD_RING_HP_OUTM(x, mask, val) \ argument
8617 …out_dword_masked_ns(HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO_CMD_RING_HP_IN…
8632 #define HWIO_REO_R2_REO_CMD_RING_TP_INM(x, mask) \ argument
8633 in_dword_masked ( HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x), mask)
8636 #define HWIO_REO_R2_REO_CMD_RING_TP_OUTM(x, mask, val) \ argument
8639 …out_dword_masked_ns(HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO_CMD_RING_TP_IN…
8654 #define HWIO_REO_R2_SW2REO_RING_HP_INM(x, mask) \ argument
8655 in_dword_masked ( HWIO_REO_R2_SW2REO_RING_HP_ADDR(x), mask)
8658 #define HWIO_REO_R2_SW2REO_RING_HP_OUTM(x, mask, val) \ argument
8661 …out_dword_masked_ns(HWIO_REO_R2_SW2REO_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO_RING_HP_IN(x…
8676 #define HWIO_REO_R2_SW2REO_RING_TP_INM(x, mask) \ argument
8677 in_dword_masked ( HWIO_REO_R2_SW2REO_RING_TP_ADDR(x), mask)
8680 #define HWIO_REO_R2_SW2REO_RING_TP_OUTM(x, mask, val) \ argument
8683 …out_dword_masked_ns(HWIO_REO_R2_SW2REO_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO_RING_TP_IN(x…
8698 #define HWIO_REO_R2_SW2REO1_RING_HP_INM(x, mask) \ argument
8699 in_dword_masked ( HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x), mask)
8702 #define HWIO_REO_R2_SW2REO1_RING_HP_OUTM(x, mask, val) \ argument
8705 …out_dword_masked_ns(HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO1_RING_HP_IN…
8720 #define HWIO_REO_R2_SW2REO1_RING_TP_INM(x, mask) \ argument
8721 in_dword_masked ( HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x), mask)
8724 #define HWIO_REO_R2_SW2REO1_RING_TP_OUTM(x, mask, val) \ argument
8727 …out_dword_masked_ns(HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO1_RING_TP_IN…
8742 #define HWIO_REO_R2_REO2SW1_RING_HP_INM(x, mask) \ argument
8743 in_dword_masked ( HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x), mask)
8746 #define HWIO_REO_R2_REO2SW1_RING_HP_OUTM(x, mask, val) \ argument
8749 …out_dword_masked_ns(HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW1_RING_HP_IN…
8764 #define HWIO_REO_R2_REO2SW1_RING_TP_INM(x, mask) \ argument
8765 in_dword_masked ( HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x), mask)
8768 #define HWIO_REO_R2_REO2SW1_RING_TP_OUTM(x, mask, val) \ argument
8771 …out_dword_masked_ns(HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW1_RING_TP_IN…
8786 #define HWIO_REO_R2_REO2SW2_RING_HP_INM(x, mask) \ argument
8787 in_dword_masked ( HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x), mask)
8790 #define HWIO_REO_R2_REO2SW2_RING_HP_OUTM(x, mask, val) \ argument
8793 …out_dword_masked_ns(HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW2_RING_HP_IN…
8808 #define HWIO_REO_R2_REO2SW2_RING_TP_INM(x, mask) \ argument
8809 in_dword_masked ( HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x), mask)
8812 #define HWIO_REO_R2_REO2SW2_RING_TP_OUTM(x, mask, val) \ argument
8815 …out_dword_masked_ns(HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW2_RING_TP_IN…
8830 #define HWIO_REO_R2_REO2SW3_RING_HP_INM(x, mask) \ argument
8831 in_dword_masked ( HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x), mask)
8834 #define HWIO_REO_R2_REO2SW3_RING_HP_OUTM(x, mask, val) \ argument
8837 …out_dword_masked_ns(HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW3_RING_HP_IN…
8852 #define HWIO_REO_R2_REO2SW3_RING_TP_INM(x, mask) \ argument
8853 in_dword_masked ( HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x), mask)
8856 #define HWIO_REO_R2_REO2SW3_RING_TP_OUTM(x, mask, val) \ argument
8859 …out_dword_masked_ns(HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW3_RING_TP_IN…
8874 #define HWIO_REO_R2_REO2SW4_RING_HP_INM(x, mask) \ argument
8875 in_dword_masked ( HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x), mask)
8878 #define HWIO_REO_R2_REO2SW4_RING_HP_OUTM(x, mask, val) \ argument
8881 …out_dword_masked_ns(HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW4_RING_HP_IN…
8896 #define HWIO_REO_R2_REO2SW4_RING_TP_INM(x, mask) \ argument
8897 in_dword_masked ( HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x), mask)
8900 #define HWIO_REO_R2_REO2SW4_RING_TP_OUTM(x, mask, val) \ argument
8903 …out_dword_masked_ns(HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW4_RING_TP_IN…
8918 #define HWIO_REO_R2_REO2TCL_RING_HP_INM(x, mask) \ argument
8919 in_dword_masked ( HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x), mask)
8922 #define HWIO_REO_R2_REO2TCL_RING_HP_OUTM(x, mask, val) \ argument
8925 …out_dword_masked_ns(HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2TCL_RING_HP_IN…
8940 #define HWIO_REO_R2_REO2TCL_RING_TP_INM(x, mask) \ argument
8941 in_dword_masked ( HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x), mask)
8944 #define HWIO_REO_R2_REO2TCL_RING_TP_OUTM(x, mask, val) \ argument
8947 …out_dword_masked_ns(HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2TCL_RING_TP_IN…
8962 #define HWIO_REO_R2_REO2FW_RING_HP_INM(x, mask) \ argument
8963 in_dword_masked ( HWIO_REO_R2_REO2FW_RING_HP_ADDR(x), mask)
8966 #define HWIO_REO_R2_REO2FW_RING_HP_OUTM(x, mask, val) \ argument
8969 …out_dword_masked_ns(HWIO_REO_R2_REO2FW_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2FW_RING_HP_IN(x…
8984 #define HWIO_REO_R2_REO2FW_RING_TP_INM(x, mask) \ argument
8985 in_dword_masked ( HWIO_REO_R2_REO2FW_RING_TP_ADDR(x), mask)
8988 #define HWIO_REO_R2_REO2FW_RING_TP_OUTM(x, mask, val) \ argument
8991 …out_dword_masked_ns(HWIO_REO_R2_REO2FW_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2FW_RING_TP_IN(x…
9006 #define HWIO_REO_R2_REO_RELEASE_RING_HP_INM(x, mask) \ argument
9007 in_dword_masked ( HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x), mask)
9010 #define HWIO_REO_R2_REO_RELEASE_RING_HP_OUTM(x, mask, val) \ argument
9013 …out_dword_masked_ns(HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO_RELEASE_RI…
9028 #define HWIO_REO_R2_REO_RELEASE_RING_TP_INM(x, mask) \ argument
9029 in_dword_masked ( HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x), mask)
9032 #define HWIO_REO_R2_REO_RELEASE_RING_TP_OUTM(x, mask, val) \ argument
9035 …out_dword_masked_ns(HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO_RELEASE_RI…
9050 #define HWIO_REO_R2_REO_STATUS_RING_HP_INM(x, mask) \ argument
9051 in_dword_masked ( HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x), mask)
9054 #define HWIO_REO_R2_REO_STATUS_RING_HP_OUTM(x, mask, val) \ argument
9057 …out_dword_masked_ns(HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO_STATUS_RING…
9072 #define HWIO_REO_R2_REO_STATUS_RING_TP_INM(x, mask) \ argument
9073 in_dword_masked ( HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x), mask)
9076 #define HWIO_REO_R2_REO_STATUS_RING_TP_OUTM(x, mask, val) \ argument
9079 …out_dword_masked_ns(HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO_STATUS_RING…