50 #define HWIO_REO_R0_GENERAL_ENABLE_INM(x, mask)                      \  argument
51 	in_dword_masked ( HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask) 
54 #define HWIO_REO_R0_GENERAL_ENABLE_OUTM(x, mask, val)                \  argument
57 …out_dword_masked_ns(HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_REO_R0_GENERAL_ENABLE_IN(x…
138 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_INM(x, mask)          \  argument
139 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask) 
142 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUTM(x, mask, val)    \  argument
145 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
181 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_INM(x, mask)          \  argument
182 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), mask) 
185 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_OUTM(x, mask, val)    \  argument
188 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
224 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_INM(x, mask)          \  argument
225 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x), mask) 
228 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_OUTM(x, mask, val)    \  argument
231 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
267 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_INM(x, mask)          \  argument
268 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x), mask) 
271 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_OUTM(x, mask, val)    \  argument
274 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
310 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_INM(x, mask)      \  argument
311 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x), mask) 
314 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_OUTM(x, mask, val) \  argument
317 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DES…
353 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_INM(x, mask)      \  argument
354 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x), mask) 
357 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_OUTM(x, mask, val) \  argument
360 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x), mask, val, HWIO_REO_R0_DES…
396 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_INM(x, mask)      \  argument
397 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x), mask) 
400 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_OUTM(x, mask, val) \  argument
403 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x), mask, val, HWIO_REO_R0_DES…
439 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_INM(x, mask)      \  argument
440 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x), mask) 
443 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_OUTM(x, mask, val) \  argument
446 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x), mask, val, HWIO_REO_R0_DES…
482 #define HWIO_REO_R0_TIMESTAMP_INM(x, mask)                           \  argument
483 	in_dword_masked ( HWIO_REO_R0_TIMESTAMP_ADDR(x), mask) 
486 #define HWIO_REO_R0_TIMESTAMP_OUTM(x, mask, val)                     \  argument
489 		out_dword_masked_ns(HWIO_REO_R0_TIMESTAMP_ADDR(x), mask, val, HWIO_REO_R0_TIMESTAMP_IN(x)); \
504 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_INM(x, mask)      \  argument
505 	in_dword_masked ( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x), mask) 
508 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_OUTM(x, mask, val) \  argument
511 …out_dword_masked_ns(HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x), mask, val, HWIO_REO_R0_ERR…
553 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_INM(x, mask)      \  argument
554 	in_dword_masked ( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x), mask) 
557 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_OUTM(x, mask, val) \  argument
560 …out_dword_masked_ns(HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x), mask, val, HWIO_REO_R0_ERR…
590 #define HWIO_REO_R0_IDLE_REQ_CTRL_INM(x, mask)                       \  argument
591 	in_dword_masked ( HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x), mask) 
594 #define HWIO_REO_R0_IDLE_REQ_CTRL_OUTM(x, mask, val)                 \  argument
597 …out_dword_masked_ns(HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x), mask, val, HWIO_REO_R0_IDLE_REQ_CTRL_IN(x))…
615 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_INM(x, mask)            \  argument
616 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x), mask) 
619 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_OUTM(x, mask, val)      \  argument
622 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO…
637 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_INM(x, mask)            \  argument
638 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x), mask) 
641 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_OUTM(x, mask, val)      \  argument
644 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO…
662 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_INM(x, mask)                  \  argument
663 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x), mask) 
666 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_OUTM(x, mask, val)            \  argument
669 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING…
684 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_INM(x, mask)              \  argument
685 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x), mask) 
688 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_OUTM(x, mask, val)        \  argument
691 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_…
709 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_INM(x, mask)                \  argument
710 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x), mask) 
713 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_OUTM(x, mask, val)          \  argument
716 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RI…
761 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_INM(x, mask)         \  argument
762 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x), mask) 
765 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_OUTM(x, mask, val)   \  argument
768 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2…
783 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_INM(x, mask)         \  argument
784 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x), mask) 
787 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_OUTM(x, mask, val)   \  argument
790 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2…
805 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
806 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
809 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
812 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_RE…
833 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
834 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
837 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
840 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_RE…
855 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_INM(x, mask) \  argument
856 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
859 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
862 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R…
883 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
884 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
887 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
890 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_RE…
905 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
906 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
909 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
912 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_R…
927 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
928 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
931 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
934 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_…
952 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_INM(x, mask)       \  argument
953 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x), mask) 
956 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \  argument
959 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDM…
974 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_INM(x, mask)       \  argument
975 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x), mask) 
978 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \  argument
981 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDM…
999 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_INM(x, mask)           \  argument
1000 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x), mask) 
1003 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_OUTM(x, mask, val)     \  argument
1006 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2RE…
1021 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_INM(x, mask)     \  argument
1022 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
1025 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
1028 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_RX…
1043 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_INM(x, mask)            \  argument
1044 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_ADDR(x), mask) 
1047 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_OUTM(x, mask, val)      \  argument
1050 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO…
1065 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_INM(x, mask)            \  argument
1066 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_ADDR(x), mask) 
1069 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_OUTM(x, mask, val)      \  argument
1072 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO…
1090 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_INM(x, mask)                  \  argument
1091 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_ID_ADDR(x), mask) 
1094 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_OUTM(x, mask, val)            \  argument
1097 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO1_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO1_RING…
1112 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_INM(x, mask)              \  argument
1113 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_STATUS_ADDR(x), mask) 
1116 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_OUTM(x, mask, val)        \  argument
1119 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO1_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO1_…
1137 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_INM(x, mask)                \  argument
1138 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_MISC_ADDR(x), mask) 
1141 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_OUTM(x, mask, val)          \  argument
1144 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO1_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO1_RI…
1189 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_INM(x, mask)         \  argument
1190 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_ADDR(x), mask) 
1193 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_OUTM(x, mask, val)   \  argument
1196 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2…
1211 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_INM(x, mask)         \  argument
1212 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_ADDR(x), mask) 
1215 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_OUTM(x, mask, val)   \  argument
1218 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2…
1233 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
1234 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
1237 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
1240 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_RE…
1261 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
1262 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
1265 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
1268 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_RE…
1283 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_INM(x, mask) \  argument
1284 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
1287 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
1290 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R…
1311 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
1312 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
1315 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
1318 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_RE…
1333 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
1334 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
1337 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
1340 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_R…
1355 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
1356 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
1359 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
1362 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_…
1380 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_INM(x, mask)       \  argument
1381 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_ADDR(x), mask) 
1384 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \  argument
1387 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDM…
1402 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_INM(x, mask)       \  argument
1403 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_ADDR(x), mask) 
1406 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \  argument
1409 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDM…
1427 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_INM(x, mask)           \  argument
1428 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_ADDR(x), mask) 
1431 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_OUTM(x, mask, val)     \  argument
1434 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2RE…
1449 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_INM(x, mask)     \  argument
1450 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
1453 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
1456 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_RX…
1471 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_INM(x, mask)            \  argument
1472 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_ADDR(x), mask) 
1475 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_OUTM(x, mask, val)      \  argument
1478 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO…
1493 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_INM(x, mask)            \  argument
1494 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_ADDR(x), mask) 
1497 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_OUTM(x, mask, val)      \  argument
1500 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO…
1518 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_INM(x, mask)                  \  argument
1519 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_ID_ADDR(x), mask) 
1522 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_OUTM(x, mask, val)            \  argument
1525 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO2_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO2_RING…
1540 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_INM(x, mask)              \  argument
1541 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_STATUS_ADDR(x), mask) 
1544 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_OUTM(x, mask, val)        \  argument
1547 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO2_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO2_…
1565 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_INM(x, mask)                \  argument
1566 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_MISC_ADDR(x), mask) 
1569 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_OUTM(x, mask, val)          \  argument
1572 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO2_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO2_RI…
1617 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_INM(x, mask)         \  argument
1618 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_ADDR(x), mask) 
1621 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_OUTM(x, mask, val)   \  argument
1624 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2…
1639 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_INM(x, mask)         \  argument
1640 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_ADDR(x), mask) 
1643 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_OUTM(x, mask, val)   \  argument
1646 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2…
1661 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
1662 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
1665 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
1668 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_RE…
1689 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
1690 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
1693 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
1696 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_RE…
1711 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_INM(x, mask) \  argument
1712 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
1715 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
1718 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R…
1739 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
1740 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
1743 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
1746 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_RE…
1761 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
1762 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
1765 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
1768 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_R…
1783 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
1784 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
1787 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
1790 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_…
1808 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_INM(x, mask)       \  argument
1809 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_ADDR(x), mask) 
1812 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \  argument
1815 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDM…
1830 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_INM(x, mask)       \  argument
1831 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_ADDR(x), mask) 
1834 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \  argument
1837 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDM…
1855 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_INM(x, mask)           \  argument
1856 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_ADDR(x), mask) 
1859 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_OUTM(x, mask, val)     \  argument
1862 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2RE…
1877 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_INM(x, mask)     \  argument
1878 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
1881 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
1884 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_RX…
1899 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_INM(x, mask)          \  argument
1900 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x), mask) 
1903 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_OUTM(x, mask, val)    \  argument
1906 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO…
1921 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_INM(x, mask)          \  argument
1922 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x), mask) 
1925 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_OUTM(x, mask, val)    \  argument
1928 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO…
1946 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_INM(x, mask)                \  argument
1947 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x), mask) 
1950 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_OUTM(x, mask, val)          \  argument
1953 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_…
1968 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_INM(x, mask)            \  argument
1969 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x), mask) 
1972 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_OUTM(x, mask, val)      \  argument
1975 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_L…
1993 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_INM(x, mask)              \  argument
1994 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x), mask) 
1997 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_OUTM(x, mask, val)        \  argument
2000 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LIN…
2045 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_INM(x, mask)       \  argument
2046 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x), mask) 
2049 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_OUTM(x, mask, val) \  argument
2052 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2…
2067 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_INM(x, mask)       \  argument
2068 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x), mask) 
2071 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_OUTM(x, mask, val) \  argument
2074 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2…
2089 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
2090 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
2093 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
2096 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_…
2117 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
2118 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
2121 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
2124 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_…
2139 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_INM(x, mask) \  argument
2140 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
2143 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
2146 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO…
2167 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
2168 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
2171 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
2174 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_…
2189 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
2190 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
2193 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
2196 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO…
2211 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
2212 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
2215 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
2218 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWI…
2236 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_INM(x, mask)   \  argument
2237 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
2240 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
2243 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_…
2258 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_INM(x, mask)               \  argument
2259 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x), mask) 
2262 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
2265 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING…
2280 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_INM(x, mask)               \  argument
2281 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x), mask) 
2284 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
2287 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING…
2305 #define HWIO_REO_R0_REO_CMD_RING_ID_INM(x, mask)                     \  argument
2306 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x), mask) 
2309 #define HWIO_REO_R0_REO_CMD_RING_ID_OUTM(x, mask, val)               \  argument
2312 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_ID_IN…
2327 #define HWIO_REO_R0_REO_CMD_RING_STATUS_INM(x, mask)                 \  argument
2328 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x), mask) 
2331 #define HWIO_REO_R0_REO_CMD_RING_STATUS_OUTM(x, mask, val)           \  argument
2334 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_S…
2352 #define HWIO_REO_R0_REO_CMD_RING_MISC_INM(x, mask)                   \  argument
2353 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x), mask) 
2356 #define HWIO_REO_R0_REO_CMD_RING_MISC_OUTM(x, mask, val)             \  argument
2359 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_MIS…
2404 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_INM(x, mask)            \  argument
2405 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x), mask) 
2408 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_OUTM(x, mask, val)      \  argument
2411 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_R…
2426 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_INM(x, mask)            \  argument
2427 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x), mask) 
2430 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_OUTM(x, mask, val)      \  argument
2433 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_R…
2448 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
2449 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
2452 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
2455 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R…
2476 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
2477 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
2480 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
2483 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R…
2498 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_INM(x, mask)    \  argument
2499 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
2502 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
2505 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
2526 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
2527 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
2530 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
2533 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R…
2548 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
2549 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
2552 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
2555 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_…
2570 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
2571 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
2574 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
2577 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO…
2595 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
2596 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x), mask) 
2599 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
2602 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD…
2617 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
2618 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x), mask) 
2621 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
2624 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD…
2642 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_INM(x, mask)              \  argument
2643 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x), mask) 
2646 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
2649 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RIN…
2664 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
2665 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
2668 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
2671 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO_C…
2686 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_INM(x, mask)                \  argument
2687 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x), mask) 
2690 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_OUTM(x, mask, val)          \  argument
2693 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_B…
2708 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_INM(x, mask)                \  argument
2709 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x), mask) 
2712 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_OUTM(x, mask, val)          \  argument
2715 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_B…
2733 #define HWIO_REO_R0_SW2REO_RING_ID_INM(x, mask)                      \  argument
2734 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_ID_ADDR(x), mask) 
2737 #define HWIO_REO_R0_SW2REO_RING_ID_OUTM(x, mask, val)                \  argument
2740 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_ID_IN(x…
2755 #define HWIO_REO_R0_SW2REO_RING_STATUS_INM(x, mask)                  \  argument
2756 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x), mask) 
2759 #define HWIO_REO_R0_SW2REO_RING_STATUS_OUTM(x, mask, val)            \  argument
2762 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_STA…
2780 #define HWIO_REO_R0_SW2REO_RING_MISC_INM(x, mask)                    \  argument
2781 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x), mask) 
2784 #define HWIO_REO_R0_SW2REO_RING_MISC_OUTM(x, mask, val)              \  argument
2787 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_MISC_…
2832 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_INM(x, mask)             \  argument
2833 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x), mask) 
2836 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_OUTM(x, mask, val)       \  argument
2839 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RIN…
2854 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_INM(x, mask)             \  argument
2855 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x), mask) 
2858 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_OUTM(x, mask, val)       \  argument
2861 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RIN…
2876 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask)  \  argument
2877 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
2880 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
2883 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R0…
2904 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask)  \  argument
2905 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
2908 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
2911 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R0…
2926 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_INM(x, mask)     \  argument
2927 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
2930 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
2933 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW…
2954 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask)  \  argument
2955 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
2958 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
2961 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
2976 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
2977 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
2980 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
2983 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_R…
2998 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
2999 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
3002 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
3005 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO_…
3023 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_INM(x, mask)           \  argument
3024 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x), mask) 
3027 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_OUTM(x, mask, val)     \  argument
3030 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_R…
3045 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_INM(x, mask)           \  argument
3046 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x), mask) 
3049 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_OUTM(x, mask, val)     \  argument
3052 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_R…
3070 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_INM(x, mask)               \  argument
3071 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x), mask) 
3074 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_OUTM(x, mask, val)         \  argument
3077 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_…
3092 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_INM(x, mask)         \  argument
3093 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
3096 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)   \  argument
3099 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_SW2REO…
3114 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_INM(x, mask)               \  argument
3115 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x), mask) 
3118 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
3121 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING…
3136 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_INM(x, mask)               \  argument
3137 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x), mask) 
3140 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
3143 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING…
3161 #define HWIO_REO_R0_SW2REO1_RING_ID_INM(x, mask)                     \  argument
3162 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x), mask) 
3165 #define HWIO_REO_R0_SW2REO1_RING_ID_OUTM(x, mask, val)               \  argument
3168 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_ID_IN…
3183 #define HWIO_REO_R0_SW2REO1_RING_STATUS_INM(x, mask)                 \  argument
3184 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x), mask) 
3187 #define HWIO_REO_R0_SW2REO1_RING_STATUS_OUTM(x, mask, val)           \  argument
3190 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_S…
3208 #define HWIO_REO_R0_SW2REO1_RING_MISC_INM(x, mask)                   \  argument
3209 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x), mask) 
3212 #define HWIO_REO_R0_SW2REO1_RING_MISC_OUTM(x, mask, val)             \  argument
3215 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_MIS…
3260 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_INM(x, mask)            \  argument
3261 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x), mask) 
3264 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_OUTM(x, mask, val)      \  argument
3267 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_R…
3282 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_INM(x, mask)            \  argument
3283 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x), mask) 
3286 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_OUTM(x, mask, val)      \  argument
3289 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_R…
3304 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
3305 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
3308 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
3311 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R…
3332 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
3333 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
3336 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
3339 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R…
3354 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_INM(x, mask)    \  argument
3355 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
3358 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
3361 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_S…
3382 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
3383 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
3386 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
3389 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R…
3404 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
3405 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
3408 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
3411 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_…
3426 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
3427 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
3430 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
3433 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO…
3451 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
3452 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x), mask) 
3455 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
3458 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1…
3473 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
3474 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x), mask) 
3477 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
3480 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1…
3498 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_INM(x, mask)              \  argument
3499 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x), mask) 
3502 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
3505 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RIN…
3520 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
3521 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
3524 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
3527 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_SW2RE…
3542 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_INM(x, mask)               \  argument
3543 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x), mask) 
3546 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
3549 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING…
3564 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_INM(x, mask)               \  argument
3565 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x), mask) 
3568 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
3571 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING…
3589 #define HWIO_REO_R0_REO2SW1_RING_ID_INM(x, mask)                     \  argument
3590 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x), mask) 
3593 #define HWIO_REO_R0_REO2SW1_RING_ID_OUTM(x, mask, val)               \  argument
3596 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_ID_IN…
3614 #define HWIO_REO_R0_REO2SW1_RING_STATUS_INM(x, mask)                 \  argument
3615 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x), mask) 
3618 #define HWIO_REO_R0_REO2SW1_RING_STATUS_OUTM(x, mask, val)           \  argument
3621 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_S…
3639 #define HWIO_REO_R0_REO2SW1_RING_MISC_INM(x, mask)                   \  argument
3640 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x), mask) 
3643 #define HWIO_REO_R0_REO2SW1_RING_MISC_OUTM(x, mask, val)             \  argument
3646 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_MIS…
3694 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
3695 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x), mask) 
3698 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
3701 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_R…
3716 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
3717 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x), mask) 
3720 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
3723 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_R…
3738 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
3739 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
3742 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
3745 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
3766 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
3767 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
3770 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
3773 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
3794 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
3795 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
3798 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
3801 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
3816 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
3817 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x), mask) 
3820 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
3823 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1…
3838 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
3839 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x), mask) 
3842 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
3845 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1…
3863 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_INM(x, mask)              \  argument
3864 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x), mask) 
3867 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
3870 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RIN…
3885 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
3886 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
3889 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
3892 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2S…
3907 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_INM(x, mask)               \  argument
3908 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x), mask) 
3911 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
3914 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING…
3929 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_INM(x, mask)               \  argument
3930 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x), mask) 
3933 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
3936 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING…
3954 #define HWIO_REO_R0_REO2SW2_RING_ID_INM(x, mask)                     \  argument
3955 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x), mask) 
3958 #define HWIO_REO_R0_REO2SW2_RING_ID_OUTM(x, mask, val)               \  argument
3961 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_ID_IN…
3979 #define HWIO_REO_R0_REO2SW2_RING_STATUS_INM(x, mask)                 \  argument
3980 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x), mask) 
3983 #define HWIO_REO_R0_REO2SW2_RING_STATUS_OUTM(x, mask, val)           \  argument
3986 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_S…
4004 #define HWIO_REO_R0_REO2SW2_RING_MISC_INM(x, mask)                   \  argument
4005 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x), mask) 
4008 #define HWIO_REO_R0_REO2SW2_RING_MISC_OUTM(x, mask, val)             \  argument
4011 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_MIS…
4059 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
4060 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x), mask) 
4063 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
4066 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_R…
4081 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
4082 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x), mask) 
4085 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
4088 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_R…
4103 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
4104 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
4107 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
4110 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
4131 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
4132 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
4135 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
4138 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
4159 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
4160 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
4163 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
4166 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
4181 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
4182 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x), mask) 
4185 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
4188 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2…
4203 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
4204 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x), mask) 
4207 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
4210 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2…
4228 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_INM(x, mask)              \  argument
4229 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x), mask) 
4232 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
4235 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RIN…
4250 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
4251 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
4254 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
4257 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2S…
4272 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_INM(x, mask)               \  argument
4273 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x), mask) 
4276 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
4279 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING…
4294 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_INM(x, mask)               \  argument
4295 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x), mask) 
4298 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
4301 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING…
4319 #define HWIO_REO_R0_REO2SW3_RING_ID_INM(x, mask)                     \  argument
4320 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x), mask) 
4323 #define HWIO_REO_R0_REO2SW3_RING_ID_OUTM(x, mask, val)               \  argument
4326 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_ID_IN…
4344 #define HWIO_REO_R0_REO2SW3_RING_STATUS_INM(x, mask)                 \  argument
4345 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x), mask) 
4348 #define HWIO_REO_R0_REO2SW3_RING_STATUS_OUTM(x, mask, val)           \  argument
4351 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_S…
4369 #define HWIO_REO_R0_REO2SW3_RING_MISC_INM(x, mask)                   \  argument
4370 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x), mask) 
4373 #define HWIO_REO_R0_REO2SW3_RING_MISC_OUTM(x, mask, val)             \  argument
4376 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_MIS…
4424 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
4425 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x), mask) 
4428 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
4431 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_R…
4446 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
4447 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x), mask) 
4450 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
4453 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_R…
4468 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
4469 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
4472 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
4475 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
4496 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
4497 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
4500 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
4503 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
4524 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
4525 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
4528 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
4531 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
4546 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
4547 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x), mask) 
4550 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
4553 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3…
4568 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
4569 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x), mask) 
4572 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
4575 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3…
4593 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_INM(x, mask)              \  argument
4594 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x), mask) 
4597 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
4600 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RIN…
4615 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
4616 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
4619 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
4622 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2S…
4637 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_INM(x, mask)               \  argument
4638 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x), mask) 
4641 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
4644 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING…
4659 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_INM(x, mask)               \  argument
4660 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x), mask) 
4663 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
4666 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING…
4684 #define HWIO_REO_R0_REO2SW4_RING_ID_INM(x, mask)                     \  argument
4685 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x), mask) 
4688 #define HWIO_REO_R0_REO2SW4_RING_ID_OUTM(x, mask, val)               \  argument
4691 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_ID_IN…
4709 #define HWIO_REO_R0_REO2SW4_RING_STATUS_INM(x, mask)                 \  argument
4710 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x), mask) 
4713 #define HWIO_REO_R0_REO2SW4_RING_STATUS_OUTM(x, mask, val)           \  argument
4716 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_S…
4734 #define HWIO_REO_R0_REO2SW4_RING_MISC_INM(x, mask)                   \  argument
4735 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x), mask) 
4738 #define HWIO_REO_R0_REO2SW4_RING_MISC_OUTM(x, mask, val)             \  argument
4741 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_MIS…
4789 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
4790 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x), mask) 
4793 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
4796 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_R…
4811 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
4812 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x), mask) 
4815 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
4818 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_R…
4833 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
4834 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
4837 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
4840 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
4861 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
4862 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
4865 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
4868 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
4889 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
4890 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
4893 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
4896 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
4911 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
4912 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x), mask) 
4915 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
4918 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4…
4933 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
4934 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x), mask) 
4937 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
4940 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4…
4958 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_INM(x, mask)              \  argument
4959 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x), mask) 
4962 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
4965 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RIN…
4980 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
4981 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
4984 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
4987 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2S…
5002 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_INM(x, mask)               \  argument
5003 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x), mask) 
5006 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
5009 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING…
5024 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_INM(x, mask)               \  argument
5025 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x), mask) 
5028 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
5031 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING…
5049 #define HWIO_REO_R0_REO2TCL_RING_ID_INM(x, mask)                     \  argument
5050 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x), mask) 
5053 #define HWIO_REO_R0_REO2TCL_RING_ID_OUTM(x, mask, val)               \  argument
5056 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_ID_IN…
5074 #define HWIO_REO_R0_REO2TCL_RING_STATUS_INM(x, mask)                 \  argument
5075 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x), mask) 
5078 #define HWIO_REO_R0_REO2TCL_RING_STATUS_OUTM(x, mask, val)           \  argument
5081 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_S…
5099 #define HWIO_REO_R0_REO2TCL_RING_MISC_INM(x, mask)                   \  argument
5100 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x), mask) 
5103 #define HWIO_REO_R0_REO2TCL_RING_MISC_OUTM(x, mask, val)             \  argument
5106 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_MIS…
5154 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
5155 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x), mask) 
5158 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
5161 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_R…
5176 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
5177 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x), mask) 
5180 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
5183 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_R…
5198 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
5199 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
5202 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
5205 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
5226 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
5227 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
5230 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
5233 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
5254 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
5255 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
5258 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
5261 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
5276 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
5277 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x), mask) 
5280 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
5283 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL…
5298 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
5299 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x), mask) 
5302 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
5305 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL…
5323 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_INM(x, mask)              \  argument
5324 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x), mask) 
5327 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
5330 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RIN…
5345 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
5346 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
5349 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
5352 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2T…
5367 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_INM(x, mask)                \  argument
5368 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x), mask) 
5371 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_OUTM(x, mask, val)          \  argument
5374 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_B…
5389 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_INM(x, mask)                \  argument
5390 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x), mask) 
5393 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_OUTM(x, mask, val)          \  argument
5396 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_B…
5414 #define HWIO_REO_R0_REO2FW_RING_ID_INM(x, mask)                      \  argument
5415 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_ID_ADDR(x), mask) 
5418 #define HWIO_REO_R0_REO2FW_RING_ID_OUTM(x, mask, val)                \  argument
5421 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_ID_IN(x…
5439 #define HWIO_REO_R0_REO2FW_RING_STATUS_INM(x, mask)                  \  argument
5440 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x), mask) 
5443 #define HWIO_REO_R0_REO2FW_RING_STATUS_OUTM(x, mask, val)            \  argument
5446 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_STA…
5464 #define HWIO_REO_R0_REO2FW_RING_MISC_INM(x, mask)                    \  argument
5465 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x), mask) 
5468 #define HWIO_REO_R0_REO2FW_RING_MISC_OUTM(x, mask, val)              \  argument
5471 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_MISC_…
5519 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_INM(x, mask)             \  argument
5520 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x), mask) 
5523 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_OUTM(x, mask, val)       \  argument
5526 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RIN…
5541 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_INM(x, mask)             \  argument
5542 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x), mask) 
5545 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_OUTM(x, mask, val)       \  argument
5548 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RIN…
5563 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_INM(x, mask)      \  argument
5564 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
5567 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
5570 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO…
5591 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_INM(x, mask)     \  argument
5592 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
5595 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
5598 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RE…
5619 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_INM(x, mask)   \  argument
5620 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
5623 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
5626 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_…
5641 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_INM(x, mask)           \  argument
5642 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x), mask) 
5645 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_OUTM(x, mask, val)     \  argument
5648 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_R…
5663 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_INM(x, mask)           \  argument
5664 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x), mask) 
5667 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_OUTM(x, mask, val)     \  argument
5670 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_R…
5688 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_INM(x, mask)               \  argument
5689 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x), mask) 
5692 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_OUTM(x, mask, val)         \  argument
5695 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_…
5710 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_INM(x, mask)         \  argument
5711 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
5714 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)   \  argument
5717 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2FW…
5732 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_INM(x, mask)           \  argument
5733 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x), mask) 
5736 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_OUTM(x, mask, val)     \  argument
5739 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELE…
5754 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_INM(x, mask)           \  argument
5755 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x), mask) 
5758 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_OUTM(x, mask, val)     \  argument
5761 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELE…
5779 #define HWIO_REO_R0_REO_RELEASE_RING_ID_INM(x, mask)                 \  argument
5780 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x), mask) 
5783 #define HWIO_REO_R0_REO_RELEASE_RING_ID_OUTM(x, mask, val)           \  argument
5786 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RI…
5804 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_INM(x, mask)             \  argument
5805 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x), mask) 
5808 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_OUTM(x, mask, val)       \  argument
5811 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEAS…
5829 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_INM(x, mask)               \  argument
5830 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x), mask) 
5833 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_OUTM(x, mask, val)         \  argument
5836 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_…
5884 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_INM(x, mask)        \  argument
5885 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x), mask) 
5888 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_OUTM(x, mask, val)  \  argument
5891 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_R…
5906 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_INM(x, mask)        \  argument
5907 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x), mask) 
5910 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_OUTM(x, mask, val)  \  argument
5913 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_R…
5928 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_INM(x, mask) \  argument
5929 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
5932 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
5935 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R…
5956 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_INM(x, mask) \  argument
5957 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
5960 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
5963 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_…
5984 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \  argument
5985 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
5988 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
5991 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_RE…
6006 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_INM(x, mask)    \  argument
6007 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
6010 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
6013 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_R…
6028 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_INM(x, mask)            \  argument
6029 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x), mask) 
6032 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_OUTM(x, mask, val)      \  argument
6035 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATU…
6050 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_INM(x, mask)            \  argument
6051 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x), mask) 
6054 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_OUTM(x, mask, val)      \  argument
6057 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATU…
6075 #define HWIO_REO_R0_REO_STATUS_RING_ID_INM(x, mask)                  \  argument
6076 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x), mask) 
6079 #define HWIO_REO_R0_REO_STATUS_RING_ID_OUTM(x, mask, val)            \  argument
6082 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING…
6100 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_INM(x, mask)              \  argument
6101 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x), mask) 
6104 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_OUTM(x, mask, val)        \  argument
6107 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_…
6125 #define HWIO_REO_R0_REO_STATUS_RING_MISC_INM(x, mask)                \  argument
6126 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x), mask) 
6129 #define HWIO_REO_R0_REO_STATUS_RING_MISC_OUTM(x, mask, val)          \  argument
6132 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RI…
6180 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_INM(x, mask)         \  argument
6181 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x), mask) 
6184 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_OUTM(x, mask, val)   \  argument
6187 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_ST…
6202 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_INM(x, mask)         \  argument
6203 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x), mask) 
6206 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_OUTM(x, mask, val)   \  argument
6209 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_ST…
6224 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_INM(x, mask)  \  argument
6225 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
6228 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
6231 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0…
6252 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_INM(x, mask) \  argument
6253 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
6256 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
6259 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R…
6280 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \  argument
6281 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
6284 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
6287 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO…
6302 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_INM(x, mask)       \  argument
6303 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x), mask) 
6306 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \  argument
6309 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_…
6324 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_INM(x, mask)       \  argument
6325 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x), mask) 
6328 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \  argument
6331 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_…
6349 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_INM(x, mask)           \  argument
6350 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x), mask) 
6353 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_OUTM(x, mask, val)     \  argument
6356 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO_STAT…
6371 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_INM(x, mask)     \  argument
6372 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
6375 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
6378 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_RE…
6393 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_INM(x, mask)                    \  argument
6394 	in_dword_masked ( HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x), mask) 
6397 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_OUTM(x, mask, val)              \  argument
6400 …out_dword_masked_ns(HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x), mask, val, HWIO_REO_R0_WATCHDOG_TIMEOUT_…
6415 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_INM(x, mask)         \  argument
6416 	in_dword_masked ( HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x), mask) 
6419 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_OUTM(x, mask, val)   \  argument
6422 …out_dword_masked_ns(HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x), mask, val, HWIO_REO_R0_INTERR…
6437 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_INM(x, mask)                \  argument
6438 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x), mask) 
6441 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_OUTM(x, mask, val)          \  argument
6444 …out_dword_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHO…
6459 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_INM(x, mask)                \  argument
6460 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x), mask) 
6463 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_OUTM(x, mask, val)          \  argument
6466 …out_dword_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHO…
6481 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_INM(x, mask)                \  argument
6482 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x), mask) 
6485 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_OUTM(x, mask, val)          \  argument
6488 …out_dword_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHO…
6503 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_INM(x, mask)                \  argument
6504 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x), mask) 
6507 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_OUTM(x, mask, val)          \  argument
6510 …out_dword_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHO…
6525 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_INM(x, mask)          \  argument
6526 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x), mask) 
6529 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_OUTM(x, mask, val)    \  argument
6532 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6547 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_INM(x, mask)          \  argument
6548 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x), mask) 
6551 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_OUTM(x, mask, val)    \  argument
6554 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6569 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_INM(x, mask)          \  argument
6570 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x), mask) 
6573 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_OUTM(x, mask, val)    \  argument
6576 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6591 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_INM(x, mask)          \  argument
6592 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x), mask) 
6595 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_OUTM(x, mask, val)    \  argument
6598 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6613 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_INM(x, mask)          \  argument
6614 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x), mask) 
6617 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_OUTM(x, mask, val)    \  argument
6620 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6635 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_INM(x, mask)          \  argument
6636 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x), mask) 
6639 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_OUTM(x, mask, val)    \  argument
6642 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6657 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_INM(x, mask)          \  argument
6658 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x), mask) 
6661 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_OUTM(x, mask, val)    \  argument
6664 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6679 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_INM(x, mask)          \  argument
6680 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x), mask) 
6683 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_OUTM(x, mask, val)    \  argument
6686 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6701 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_INM(x, mask)          \  argument
6702 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x), mask) 
6705 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_OUTM(x, mask, val)    \  argument
6708 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6723 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_INM(x, mask)          \  argument
6724 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x), mask) 
6727 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_OUTM(x, mask, val)    \  argument
6730 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6745 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_INM(x, mask)          \  argument
6746 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x), mask) 
6749 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_OUTM(x, mask, val)    \  argument
6752 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6767 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_INM(x, mask)          \  argument
6768 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x), mask) 
6771 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_OUTM(x, mask, val)    \  argument
6774 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6789 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_INM(x, mask)          \  argument
6790 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x), mask) 
6793 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_OUTM(x, mask, val)    \  argument
6796 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6811 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_INM(x, mask)          \  argument
6812 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x), mask) 
6815 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_OUTM(x, mask, val)    \  argument
6818 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6833 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_INM(x, mask)          \  argument
6834 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x), mask) 
6837 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_OUTM(x, mask, val)    \  argument
6840 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6855 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_INM(x, mask)          \  argument
6856 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x), mask) 
6859 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_OUTM(x, mask, val)    \  argument
6862 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6877 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_INM(x, mask)               \  argument
6878 	in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x), mask) 
6881 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_OUTM(x, mask, val)         \  argument
6884 …out_dword_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QU…
6899 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_INM(x, mask)               \  argument
6900 	in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x), mask) 
6903 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_OUTM(x, mask, val)         \  argument
6906 …out_dword_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QU…
6921 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_INM(x, mask)               \  argument
6922 	in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x), mask) 
6925 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_OUTM(x, mask, val)         \  argument
6928 …out_dword_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QU…
6943 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_INM(x, mask)               \  argument
6944 	in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x), mask) 
6947 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_OUTM(x, mask, val)         \  argument
6950 …out_dword_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QU…
6965 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_INM(x, mask)                \  argument
6966 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x), mask) 
6969 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_OUTM(x, mask, val)          \  argument
6972 …out_dword_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTA…
6987 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_INM(x, mask)                \  argument
6988 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x), mask) 
6991 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_OUTM(x, mask, val)          \  argument
6994 …out_dword_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTA…
7009 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_INM(x, mask)                \  argument
7010 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x), mask) 
7013 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_OUTM(x, mask, val)          \  argument
7016 …out_dword_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTA…
7031 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_INM(x, mask)                \  argument
7032 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x), mask) 
7035 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_OUTM(x, mask, val)          \  argument
7038 …out_dword_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTA…
7053 #define HWIO_REO_R0_AGING_CONTROL_INM(x, mask)                       \  argument
7054 	in_dword_masked ( HWIO_REO_R0_AGING_CONTROL_ADDR(x), mask) 
7057 #define HWIO_REO_R0_AGING_CONTROL_OUTM(x, mask, val)                 \  argument
7060 …out_dword_masked_ns(HWIO_REO_R0_AGING_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_AGING_CONTROL_IN(x))…
7075 #define HWIO_REO_R0_MISC_CTL_INM(x, mask)                            \  argument
7076 	in_dword_masked ( HWIO_REO_R0_MISC_CTL_ADDR(x), mask) 
7079 #define HWIO_REO_R0_MISC_CTL_OUTM(x, mask, val)                      \  argument
7082 		out_dword_masked_ns(HWIO_REO_R0_MISC_CTL_ADDR(x), mask, val, HWIO_REO_R0_MISC_CTL_IN(x)); \
7100 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_INM(x, mask)               \  argument
7101 	in_dword_masked ( HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x), mask) 
7104 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_OUTM(x, mask, val)         \  argument
7107 …out_dword_masked_ns(HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x), mask, val, HWIO_REO_R0_HIGH_MEMORY_…
7122 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_INM(x, mask)                \  argument
7123 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x), mask) 
7126 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_OUTM(x, mask, val)          \  argument
7129 …out_dword_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_US…
7144 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_INM(x, mask)                \  argument
7145 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x), mask) 
7148 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_OUTM(x, mask, val)          \  argument
7151 …out_dword_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_US…
7166 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_INM(x, mask)                \  argument
7167 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x), mask) 
7170 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_OUTM(x, mask, val)          \  argument
7173 …out_dword_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_US…
7188 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_INM(x, mask)                \  argument
7189 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x), mask) 
7192 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_OUTM(x, mask, val)          \  argument
7195 …out_dword_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_US…
7210 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_INM(x, mask)  \  argument
7211 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x), mask) 
7214 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_OUTM(x, mask, val) \  argument
7217 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x), mask, val, HWIO_REO_R0…
7232 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_INM(x, mask)  \  argument
7233 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x), mask) 
7236 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_OUTM(x, mask, val) \  argument
7239 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x), mask, val, HWIO_REO_R0…
7254 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_INM(x, mask)  \  argument
7255 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x), mask) 
7258 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_OUTM(x, mask, val) \  argument
7261 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x), mask, val, HWIO_REO_R0…
7276 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_INM(x, mask) \  argument
7277 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x), mask) 
7280 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_OUTM(x, mask, val) \  argument
7283 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x), mask, val, HWIO_REO_R…
7298 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_INM(x, mask)         \  argument
7299 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x), mask) 
7302 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_OUTM(x, mask, val)   \  argument
7305 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL…
7320 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_INM(x, mask)         \  argument
7321 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x), mask) 
7324 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_OUTM(x, mask, val)   \  argument
7327 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL…
7342 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_INM(x, mask)         \  argument
7343 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x), mask) 
7346 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_OUTM(x, mask, val)   \  argument
7349 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL…
7364 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_INM(x, mask)         \  argument
7365 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x), mask) 
7368 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_OUTM(x, mask, val)   \  argument
7371 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL…
7386 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_INM(x, mask)       \  argument
7387 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x), mask) 
7390 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_OUTM(x, mask, val) \  argument
7393 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7408 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_INM(x, mask)       \  argument
7409 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x), mask) 
7412 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_OUTM(x, mask, val) \  argument
7415 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7430 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_INM(x, mask)       \  argument
7431 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x), mask) 
7434 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_OUTM(x, mask, val) \  argument
7437 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7452 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_INM(x, mask)       \  argument
7453 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x), mask) 
7456 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_OUTM(x, mask, val) \  argument
7459 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7474 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_INM(x, mask)       \  argument
7475 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x), mask) 
7478 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_OUTM(x, mask, val) \  argument
7481 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7496 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_INM(x, mask)       \  argument
7497 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x), mask) 
7500 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_OUTM(x, mask, val) \  argument
7503 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7518 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_INM(x, mask)       \  argument
7519 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x), mask) 
7522 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_OUTM(x, mask, val) \  argument
7525 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7540 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_INM(x, mask)       \  argument
7541 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x), mask) 
7544 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_OUTM(x, mask, val) \  argument
7547 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7562 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_INM(x, mask)               \  argument
7563 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x), mask) 
7566 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_OUTM(x, mask, val)         \  argument
7569 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_B…
7587 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_INM(x, mask)                   \  argument
7588 	in_dword_masked ( HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x), mask) 
7591 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_OUTM(x, mask, val)             \  argument
7594 …out_dword_masked_ns(HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x), mask, val, HWIO_REO_R0_GXI_TESTBUS_LOWE…
7609 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_INM(x, mask)                   \  argument
7610 	in_dword_masked ( HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x), mask) 
7613 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_OUTM(x, mask, val)             \  argument
7616 …out_dword_masked_ns(HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x), mask, val, HWIO_REO_R0_GXI_TESTBUS_UPPE…
7631 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_INM(x, mask)                  \  argument
7632 	in_dword_masked ( HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x), mask) 
7635 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_OUTM(x, mask, val)            \  argument
7638 …out_dword_masked_ns(HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GXI_SM_STATES_I…
7659 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_INM(x, mask)               \  argument
7660 	in_dword_masked ( HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask) 
7663 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_OUTM(x, mask, val)         \  argument
7666 …out_dword_masked_ns(HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_REO_R0_GXI_END_OF_T…
7681 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_INM(x, mask)              \  argument
7682 	in_dword_masked ( HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask) 
7685 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_OUTM(x, mask, val)        \  argument
7688 …out_dword_masked_ns(HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask, val, HWIO_REO_R0_GXI_CLOCK_G…
7739 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_INM(x, mask)                    \  argument
7740 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x), mask) 
7743 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_OUTM(x, mask, val)              \  argument
7746 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_ERR_INTS_…
7770 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_INM(x, mask)                   \  argument
7771 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x), mask) 
7774 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_OUTM(x, mask, val)             \  argument
7777 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_ERR_STAT…
7798 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_INM(x, mask)             \  argument
7799 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask) 
7802 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_OUTM(x, mask, val)       \  argument
7805 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_DE…
7829 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_INM(x, mask)             \  argument
7830 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask) 
7833 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_OUTM(x, mask, val)       \  argument
7836 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_RE…
7860 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_INM(x, mask)                \  argument
7861 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask) 
7864 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_OUTM(x, mask, val)          \  argument
7867 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_MISC_…
7909 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_INM(x, mask)                \  argument
7910 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask) 
7913 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_OUTM(x, mask, val)          \  argument
7916 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WDOG_…
7934 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_INM(x, mask)                 \  argument
7935 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask) 
7938 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_OUTM(x, mask, val)           \  argument
7941 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WDOG_S…
7956 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_INM(x, mask)               \  argument
7957 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask) 
7960 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_OUTM(x, mask, val)         \  argument
7963 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_IDLE…
7981 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_INM(x, mask)             \  argument
7982 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask) 
7985 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_OUTM(x, mask, val)       \  argument
7988 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_RD…
8009 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_INM(x, mask)             \  argument
8010 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask) 
8013 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_OUTM(x, mask, val)       \  argument
8016 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WR…
8037 #define HWIO_REO_R0_CACHE_CTL_CONFIG_INM(x, mask)                    \  argument
8038 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x), mask) 
8041 #define HWIO_REO_R0_CACHE_CTL_CONFIG_OUTM(x, mask, val)              \  argument
8044 …out_dword_masked_ns(HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_CONFIG_…
8086 #define HWIO_REO_R0_CACHE_CTL_CONTROL_INM(x, mask)                   \  argument
8087 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x), mask) 
8090 #define HWIO_REO_R0_CACHE_CTL_CONTROL_OUTM(x, mask, val)             \  argument
8093 …out_dword_masked_ns(HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_CONTRO…
8108 #define HWIO_REO_R0_CLK_GATE_CTRL_INM(x, mask)                       \  argument
8109 	in_dword_masked ( HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x), mask) 
8112 #define HWIO_REO_R0_CLK_GATE_CTRL_OUTM(x, mask, val)                 \  argument
8115 …out_dword_masked_ns(HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x), mask, val, HWIO_REO_R0_CLK_GATE_CTRL_IN(x))…
8157 #define HWIO_REO_R0_EVENTMASK_IX_0_INM(x, mask)                      \  argument
8158 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x), mask) 
8161 #define HWIO_REO_R0_EVENTMASK_IX_0_OUTM(x, mask, val)                \  argument
8164 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_0_IN(x…
8179 #define HWIO_REO_R0_EVENTMASK_IX_1_INM(x, mask)                      \  argument
8180 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x), mask) 
8183 #define HWIO_REO_R0_EVENTMASK_IX_1_OUTM(x, mask, val)                \  argument
8186 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_1_IN(x…
8201 #define HWIO_REO_R0_EVENTMASK_IX_2_INM(x, mask)                      \  argument
8202 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x), mask) 
8205 #define HWIO_REO_R0_EVENTMASK_IX_2_OUTM(x, mask, val)                \  argument
8208 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_2_IN(x…
8223 #define HWIO_REO_R0_EVENTMASK_IX_3_INM(x, mask)                      \  argument
8224 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x), mask) 
8227 #define HWIO_REO_R0_EVENTMASK_IX_3_OUTM(x, mask, val)                \  argument
8230 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_3_IN(x…
8245 #define HWIO_REO_R1_MISC_DEBUG_CTRL_INM(x, mask)                     \  argument
8246 	in_dword_masked ( HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x), mask) 
8249 #define HWIO_REO_R1_MISC_DEBUG_CTRL_OUTM(x, mask, val)               \  argument
8252 …out_dword_masked_ns(HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x), mask, val, HWIO_REO_R1_MISC_DEBUG_CTRL_IN…
8276 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_INM(x, mask)                \  argument
8277 	in_dword_masked ( HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x), mask) 
8280 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_OUTM(x, mask, val)          \  argument
8283 …out_dword_masked_ns(HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x), mask, val, HWIO_REO_R1_MISC_PERF_DEB…
8301 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_INM(x, mask)             \  argument
8302 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x), mask) 
8305 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_OUTM(x, mask, val)       \  argument
8308 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_…
8332 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_INM(x, mask)           \  argument
8333 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x), mask) 
8336 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_OUTM(x, mask, val)     \  argument
8339 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CT…
8354 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_INM(x, mask)          \  argument
8355 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x), mask) 
8358 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_OUTM(x, mask, val)    \  argument
8361 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x), mask, val, HWIO_REO_R1_CACHE_C…
8376 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_INM(x, mask)       \  argument
8377 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x), mask) 
8380 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_OUTM(x, mask, val) \  argument
8383 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x), mask, val, HWIO_REO_R1_CACH…
8398 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_INM(x, mask)      \  argument
8399 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x), mask) 
8402 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_OUTM(x, mask, val) \  argument
8405 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x), mask, val, HWIO_REO_R1_CAC…
8420 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_INM(x, mask)                 \  argument
8421 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x), mask) 
8424 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_OUTM(x, mask, val)           \  argument
8427 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBU…
8442 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_INM(x, mask)           \  argument
8443 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x), mask) 
8446 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_OUTM(x, mask, val)     \  argument
8449 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CT…
8467 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_INM(x, mask)          \  argument
8468 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x), mask) 
8471 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_OUTM(x, mask, val)    \  argument
8474 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x), mask, val, HWIO_REO_R1_CACHE_C…
8492 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_INM(x, mask)         \  argument
8493 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x), mask) 
8496 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_OUTM(x, mask, val)   \  argument
8499 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_REO_R1_CACHE_…
8514 #define HWIO_REO_R1_END_OF_TEST_CHECK_INM(x, mask)                   \  argument
8515 	in_dword_masked ( HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x), mask) 
8518 #define HWIO_REO_R1_END_OF_TEST_CHECK_OUTM(x, mask, val)             \  argument
8521 …out_dword_masked_ns(HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_REO_R1_END_OF_TEST_CHEC…
8536 #define HWIO_REO_R1_SM_ALL_IDLE_INM(x, mask)                         \  argument
8537 	in_dword_masked ( HWIO_REO_R1_SM_ALL_IDLE_ADDR(x), mask) 
8540 #define HWIO_REO_R1_SM_ALL_IDLE_OUTM(x, mask, val)                   \  argument
8543 		out_dword_masked_ns(HWIO_REO_R1_SM_ALL_IDLE_ADDR(x), mask, val, HWIO_REO_R1_SM_ALL_IDLE_IN(x)); \
8564 #define HWIO_REO_R1_TESTBUS_CTRL_INM(x, mask)                        \  argument
8565 	in_dword_masked ( HWIO_REO_R1_TESTBUS_CTRL_ADDR(x), mask) 
8568 #define HWIO_REO_R1_TESTBUS_CTRL_OUTM(x, mask, val)                  \  argument
8571 …out_dword_masked_ns(HWIO_REO_R1_TESTBUS_CTRL_ADDR(x), mask, val, HWIO_REO_R1_TESTBUS_CTRL_IN(x)); \
8586 #define HWIO_REO_R1_TESTBUS_LOWER_INM(x, mask)                       \  argument
8587 	in_dword_masked ( HWIO_REO_R1_TESTBUS_LOWER_ADDR(x), mask) 
8590 #define HWIO_REO_R1_TESTBUS_LOWER_OUTM(x, mask, val)                 \  argument
8593 …out_dword_masked_ns(HWIO_REO_R1_TESTBUS_LOWER_ADDR(x), mask, val, HWIO_REO_R1_TESTBUS_LOWER_IN(x))…
8608 #define HWIO_REO_R1_TESTBUS_HIGHER_INM(x, mask)                      \  argument
8609 	in_dword_masked ( HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x), mask) 
8612 #define HWIO_REO_R1_TESTBUS_HIGHER_OUTM(x, mask, val)                \  argument
8615 …out_dword_masked_ns(HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x), mask, val, HWIO_REO_R1_TESTBUS_HIGHER_IN(x…
8630 #define HWIO_REO_R1_SM_STATES_IX_0_INM(x, mask)                      \  argument
8631 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_0_ADDR(x), mask) 
8634 #define HWIO_REO_R1_SM_STATES_IX_0_OUTM(x, mask, val)                \  argument
8637 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_0_IN(x…
8652 #define HWIO_REO_R1_SM_STATES_IX_1_INM(x, mask)                      \  argument
8653 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_1_ADDR(x), mask) 
8656 #define HWIO_REO_R1_SM_STATES_IX_1_OUTM(x, mask, val)                \  argument
8659 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_1_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_1_IN(x…
8674 #define HWIO_REO_R1_SM_STATES_IX_2_INM(x, mask)                      \  argument
8675 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_2_ADDR(x), mask) 
8678 #define HWIO_REO_R1_SM_STATES_IX_2_OUTM(x, mask, val)                \  argument
8681 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_2_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_2_IN(x…
8696 #define HWIO_REO_R1_SM_STATES_IX_3_INM(x, mask)                      \  argument
8697 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_3_ADDR(x), mask) 
8700 #define HWIO_REO_R1_SM_STATES_IX_3_OUTM(x, mask, val)                \  argument
8703 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_3_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_3_IN(x…
8718 #define HWIO_REO_R1_SM_STATES_IX_4_INM(x, mask)                      \  argument
8719 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_4_ADDR(x), mask) 
8722 #define HWIO_REO_R1_SM_STATES_IX_4_OUTM(x, mask, val)                \  argument
8725 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_4_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_4_IN(x…
8740 #define HWIO_REO_R1_SM_STATES_IX_5_INM(x, mask)                      \  argument
8741 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_5_ADDR(x), mask) 
8744 #define HWIO_REO_R1_SM_STATES_IX_5_OUTM(x, mask, val)                \  argument
8747 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_5_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_5_IN(x…
8762 #define HWIO_REO_R1_SM_STATES_IX_6_INM(x, mask)                      \  argument
8763 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_6_ADDR(x), mask) 
8766 #define HWIO_REO_R1_SM_STATES_IX_6_OUTM(x, mask, val)                \  argument
8769 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_6_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_6_IN(x…
8784 #define HWIO_REO_R1_IDLE_STATES_IX_0_INM(x, mask)                    \  argument
8785 	in_dword_masked ( HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x), mask) 
8788 #define HWIO_REO_R1_IDLE_STATES_IX_0_OUTM(x, mask, val)              \  argument
8791 …out_dword_masked_ns(HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x), mask, val, HWIO_REO_R1_IDLE_STATES_IX_0_…
8806 #define HWIO_REO_R1_INVALID_APB_ACCESS_INM(x, mask)                  \  argument
8807 	in_dword_masked ( HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x), mask) 
8810 #define HWIO_REO_R1_INVALID_APB_ACCESS_OUTM(x, mask, val)            \  argument
8813 …out_dword_masked_ns(HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x), mask, val, HWIO_REO_R1_INVALID_APB_ACC…
8831 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_INM(x, mask)                  \  argument
8832 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x), mask) 
8835 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_OUTM(x, mask, val)            \  argument
8838 …out_dword_masked_ns(HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO0_RING…
8853 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_INM(x, mask)                  \  argument
8854 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x), mask) 
8857 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_OUTM(x, mask, val)            \  argument
8860 …out_dword_masked_ns(HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO0_RING…
8875 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_INM(x, mask)                  \  argument
8876 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO1_RING_HP_ADDR(x), mask) 
8879 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_OUTM(x, mask, val)            \  argument
8882 …out_dword_masked_ns(HWIO_REO_R2_RXDMA2REO1_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO1_RING…
8897 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_INM(x, mask)                  \  argument
8898 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO1_RING_TP_ADDR(x), mask) 
8901 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_OUTM(x, mask, val)            \  argument
8904 …out_dword_masked_ns(HWIO_REO_R2_RXDMA2REO1_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO1_RING…
8919 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_INM(x, mask)                  \  argument
8920 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO2_RING_HP_ADDR(x), mask) 
8923 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_OUTM(x, mask, val)            \  argument
8926 …out_dword_masked_ns(HWIO_REO_R2_RXDMA2REO2_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO2_RING…
8941 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_INM(x, mask)                  \  argument
8942 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO2_RING_TP_ADDR(x), mask) 
8945 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_OUTM(x, mask, val)            \  argument
8948 …out_dword_masked_ns(HWIO_REO_R2_RXDMA2REO2_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO2_RING…
8963 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_INM(x, mask)                \  argument
8964 	in_dword_masked ( HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x), mask) 
8967 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_OUTM(x, mask, val)          \  argument
8970 …out_dword_masked_ns(HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_WBM2REO_LINK_…
8985 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_INM(x, mask)                \  argument
8986 	in_dword_masked ( HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x), mask) 
8989 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_OUTM(x, mask, val)          \  argument
8992 …out_dword_masked_ns(HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_WBM2REO_LINK_…
9007 #define HWIO_REO_R2_REO_CMD_RING_HP_INM(x, mask)                     \  argument
9008 	in_dword_masked ( HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x), mask) 
9011 #define HWIO_REO_R2_REO_CMD_RING_HP_OUTM(x, mask, val)               \  argument
9014 …out_dword_masked_ns(HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO_CMD_RING_HP_IN…
9029 #define HWIO_REO_R2_REO_CMD_RING_TP_INM(x, mask)                     \  argument
9030 	in_dword_masked ( HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x), mask) 
9033 #define HWIO_REO_R2_REO_CMD_RING_TP_OUTM(x, mask, val)               \  argument
9036 …out_dword_masked_ns(HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO_CMD_RING_TP_IN…
9051 #define HWIO_REO_R2_SW2REO_RING_HP_INM(x, mask)                      \  argument
9052 	in_dword_masked ( HWIO_REO_R2_SW2REO_RING_HP_ADDR(x), mask) 
9055 #define HWIO_REO_R2_SW2REO_RING_HP_OUTM(x, mask, val)                \  argument
9058 …out_dword_masked_ns(HWIO_REO_R2_SW2REO_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO_RING_HP_IN(x…
9073 #define HWIO_REO_R2_SW2REO_RING_TP_INM(x, mask)                      \  argument
9074 	in_dword_masked ( HWIO_REO_R2_SW2REO_RING_TP_ADDR(x), mask) 
9077 #define HWIO_REO_R2_SW2REO_RING_TP_OUTM(x, mask, val)                \  argument
9080 …out_dword_masked_ns(HWIO_REO_R2_SW2REO_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO_RING_TP_IN(x…
9095 #define HWIO_REO_R2_SW2REO1_RING_HP_INM(x, mask)                     \  argument
9096 	in_dword_masked ( HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x), mask) 
9099 #define HWIO_REO_R2_SW2REO1_RING_HP_OUTM(x, mask, val)               \  argument
9102 …out_dword_masked_ns(HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO1_RING_HP_IN…
9117 #define HWIO_REO_R2_SW2REO1_RING_TP_INM(x, mask)                     \  argument
9118 	in_dword_masked ( HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x), mask) 
9121 #define HWIO_REO_R2_SW2REO1_RING_TP_OUTM(x, mask, val)               \  argument
9124 …out_dword_masked_ns(HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO1_RING_TP_IN…
9139 #define HWIO_REO_R2_REO2SW1_RING_HP_INM(x, mask)                     \  argument
9140 	in_dword_masked ( HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x), mask) 
9143 #define HWIO_REO_R2_REO2SW1_RING_HP_OUTM(x, mask, val)               \  argument
9146 …out_dword_masked_ns(HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW1_RING_HP_IN…
9161 #define HWIO_REO_R2_REO2SW1_RING_TP_INM(x, mask)                     \  argument
9162 	in_dword_masked ( HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x), mask) 
9165 #define HWIO_REO_R2_REO2SW1_RING_TP_OUTM(x, mask, val)               \  argument
9168 …out_dword_masked_ns(HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW1_RING_TP_IN…
9183 #define HWIO_REO_R2_REO2SW2_RING_HP_INM(x, mask)                     \  argument
9184 	in_dword_masked ( HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x), mask) 
9187 #define HWIO_REO_R2_REO2SW2_RING_HP_OUTM(x, mask, val)               \  argument
9190 …out_dword_masked_ns(HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW2_RING_HP_IN…
9205 #define HWIO_REO_R2_REO2SW2_RING_TP_INM(x, mask)                     \  argument
9206 	in_dword_masked ( HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x), mask) 
9209 #define HWIO_REO_R2_REO2SW2_RING_TP_OUTM(x, mask, val)               \  argument
9212 …out_dword_masked_ns(HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW2_RING_TP_IN…
9227 #define HWIO_REO_R2_REO2SW3_RING_HP_INM(x, mask)                     \  argument
9228 	in_dword_masked ( HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x), mask) 
9231 #define HWIO_REO_R2_REO2SW3_RING_HP_OUTM(x, mask, val)               \  argument
9234 …out_dword_masked_ns(HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW3_RING_HP_IN…
9249 #define HWIO_REO_R2_REO2SW3_RING_TP_INM(x, mask)                     \  argument
9250 	in_dword_masked ( HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x), mask) 
9253 #define HWIO_REO_R2_REO2SW3_RING_TP_OUTM(x, mask, val)               \  argument
9256 …out_dword_masked_ns(HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW3_RING_TP_IN…
9271 #define HWIO_REO_R2_REO2SW4_RING_HP_INM(x, mask)                     \  argument
9272 	in_dword_masked ( HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x), mask) 
9275 #define HWIO_REO_R2_REO2SW4_RING_HP_OUTM(x, mask, val)               \  argument
9278 …out_dword_masked_ns(HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW4_RING_HP_IN…
9293 #define HWIO_REO_R2_REO2SW4_RING_TP_INM(x, mask)                     \  argument
9294 	in_dword_masked ( HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x), mask) 
9297 #define HWIO_REO_R2_REO2SW4_RING_TP_OUTM(x, mask, val)               \  argument
9300 …out_dword_masked_ns(HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW4_RING_TP_IN…
9315 #define HWIO_REO_R2_REO2TCL_RING_HP_INM(x, mask)                     \  argument
9316 	in_dword_masked ( HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x), mask) 
9319 #define HWIO_REO_R2_REO2TCL_RING_HP_OUTM(x, mask, val)               \  argument
9322 …out_dword_masked_ns(HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2TCL_RING_HP_IN…
9337 #define HWIO_REO_R2_REO2TCL_RING_TP_INM(x, mask)                     \  argument
9338 	in_dword_masked ( HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x), mask) 
9341 #define HWIO_REO_R2_REO2TCL_RING_TP_OUTM(x, mask, val)               \  argument
9344 …out_dword_masked_ns(HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2TCL_RING_TP_IN…
9359 #define HWIO_REO_R2_REO2FW_RING_HP_INM(x, mask)                      \  argument
9360 	in_dword_masked ( HWIO_REO_R2_REO2FW_RING_HP_ADDR(x), mask) 
9363 #define HWIO_REO_R2_REO2FW_RING_HP_OUTM(x, mask, val)                \  argument
9366 …out_dword_masked_ns(HWIO_REO_R2_REO2FW_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2FW_RING_HP_IN(x…
9381 #define HWIO_REO_R2_REO2FW_RING_TP_INM(x, mask)                      \  argument
9382 	in_dword_masked ( HWIO_REO_R2_REO2FW_RING_TP_ADDR(x), mask) 
9385 #define HWIO_REO_R2_REO2FW_RING_TP_OUTM(x, mask, val)                \  argument
9388 …out_dword_masked_ns(HWIO_REO_R2_REO2FW_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2FW_RING_TP_IN(x…
9403 #define HWIO_REO_R2_REO_RELEASE_RING_HP_INM(x, mask)                 \  argument
9404 	in_dword_masked ( HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x), mask) 
9407 #define HWIO_REO_R2_REO_RELEASE_RING_HP_OUTM(x, mask, val)           \  argument
9410 …out_dword_masked_ns(HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO_RELEASE_RI…
9425 #define HWIO_REO_R2_REO_RELEASE_RING_TP_INM(x, mask)                 \  argument
9426 	in_dword_masked ( HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x), mask) 
9429 #define HWIO_REO_R2_REO_RELEASE_RING_TP_OUTM(x, mask, val)           \  argument
9432 …out_dword_masked_ns(HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO_RELEASE_RI…
9447 #define HWIO_REO_R2_REO_STATUS_RING_HP_INM(x, mask)                  \  argument
9448 	in_dword_masked ( HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x), mask) 
9451 #define HWIO_REO_R2_REO_STATUS_RING_HP_OUTM(x, mask, val)            \  argument
9454 …out_dword_masked_ns(HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO_STATUS_RING…
9469 #define HWIO_REO_R2_REO_STATUS_RING_TP_INM(x, mask)                  \  argument
9470 	in_dword_masked ( HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x), mask) 
9473 #define HWIO_REO_R2_REO_STATUS_RING_TP_OUTM(x, mask, val)            \  argument
9476 …out_dword_masked_ns(HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO_STATUS_RING…