52 #define HWIO_REO_R0_GENERAL_ENABLE_INM(x, mask)                      \  argument
53 	in_dword_masked ( HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask) 
56 #define HWIO_REO_R0_GENERAL_ENABLE_OUTM(x, mask, val)                \  argument
59 …out_dword_masked_ns(HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_REO_R0_GENERAL_ENABLE_IN(x…
143 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_INM(x, mask)          \  argument
144 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask) 
147 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUTM(x, mask, val)    \  argument
150 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
186 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_INM(x, mask)          \  argument
187 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), mask) 
190 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_OUTM(x, mask, val)    \  argument
193 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
229 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_INM(x, mask)          \  argument
230 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x), mask) 
233 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_OUTM(x, mask, val)    \  argument
236 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
272 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_INM(x, mask)          \  argument
273 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x), mask) 
276 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_OUTM(x, mask, val)    \  argument
279 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x), mask, val, HWIO_REO_R0_DESTINA…
315 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_INM(x, mask)      \  argument
316 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x), mask) 
319 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_OUTM(x, mask, val) \  argument
322 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DES…
358 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_INM(x, mask)      \  argument
359 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x), mask) 
362 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_OUTM(x, mask, val) \  argument
365 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x), mask, val, HWIO_REO_R0_DES…
401 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_INM(x, mask)      \  argument
402 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x), mask) 
405 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_OUTM(x, mask, val) \  argument
408 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x), mask, val, HWIO_REO_R0_DES…
444 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_INM(x, mask)      \  argument
445 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x), mask) 
448 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_OUTM(x, mask, val) \  argument
451 …out_dword_masked_ns(HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x), mask, val, HWIO_REO_R0_DES…
487 #define HWIO_REO_R0_TIMESTAMP_INM(x, mask)                           \  argument
488 	in_dword_masked ( HWIO_REO_R0_TIMESTAMP_ADDR(x), mask) 
491 #define HWIO_REO_R0_TIMESTAMP_OUTM(x, mask, val)                     \  argument
494 		out_dword_masked_ns(HWIO_REO_R0_TIMESTAMP_ADDR(x), mask, val, HWIO_REO_R0_TIMESTAMP_IN(x)); \
509 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_INM(x, mask)      \  argument
510 	in_dword_masked ( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x), mask) 
513 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_OUTM(x, mask, val) \  argument
516 …out_dword_masked_ns(HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x), mask, val, HWIO_REO_R0_ERR…
552 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_INM(x, mask)      \  argument
553 	in_dword_masked ( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x), mask) 
556 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_OUTM(x, mask, val) \  argument
559 …out_dword_masked_ns(HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x), mask, val, HWIO_REO_R0_ERR…
595 #define HWIO_REO_R0_IDLE_REQ_CTRL_INM(x, mask)                       \  argument
596 	in_dword_masked ( HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x), mask) 
599 #define HWIO_REO_R0_IDLE_REQ_CTRL_OUTM(x, mask, val)                 \  argument
602 …out_dword_masked_ns(HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x), mask, val, HWIO_REO_R0_IDLE_REQ_CTRL_IN(x))…
620 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_INM(x, mask)            \  argument
621 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x), mask) 
624 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_OUTM(x, mask, val)      \  argument
627 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO…
642 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_INM(x, mask)            \  argument
643 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x), mask) 
646 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_OUTM(x, mask, val)      \  argument
649 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO…
667 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_INM(x, mask)                  \  argument
668 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x), mask) 
671 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_OUTM(x, mask, val)            \  argument
674 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING…
689 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_INM(x, mask)              \  argument
690 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x), mask) 
693 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_OUTM(x, mask, val)        \  argument
696 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_…
714 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_INM(x, mask)                \  argument
715 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x), mask) 
718 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_OUTM(x, mask, val)          \  argument
721 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RI…
766 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_INM(x, mask)         \  argument
767 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x), mask) 
770 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_OUTM(x, mask, val)   \  argument
773 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2…
788 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_INM(x, mask)         \  argument
789 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x), mask) 
792 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_OUTM(x, mask, val)   \  argument
795 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2…
810 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
811 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
814 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
817 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_RE…
838 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
839 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
842 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
845 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_RE…
860 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_INM(x, mask) \  argument
861 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
864 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
867 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R…
888 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
889 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
892 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
895 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_RE…
910 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
911 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
914 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
917 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_R…
932 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
933 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
936 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
939 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_…
957 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_INM(x, mask)       \  argument
958 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x), mask) 
961 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \  argument
964 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDM…
979 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_INM(x, mask)       \  argument
980 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x), mask) 
983 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \  argument
986 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDM…
1004 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_INM(x, mask)           \  argument
1005 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x), mask) 
1008 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_OUTM(x, mask, val)     \  argument
1011 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2RE…
1026 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_INM(x, mask)     \  argument
1027 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
1030 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
1033 …out_dword_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_RX…
1048 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_INM(x, mask)          \  argument
1049 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x), mask) 
1052 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_OUTM(x, mask, val)    \  argument
1055 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO…
1070 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_INM(x, mask)          \  argument
1071 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x), mask) 
1074 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_OUTM(x, mask, val)    \  argument
1077 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO…
1095 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_INM(x, mask)                \  argument
1096 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x), mask) 
1099 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_OUTM(x, mask, val)          \  argument
1102 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_…
1117 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_INM(x, mask)            \  argument
1118 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x), mask) 
1121 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_OUTM(x, mask, val)      \  argument
1124 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_L…
1142 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_INM(x, mask)              \  argument
1143 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x), mask) 
1146 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_OUTM(x, mask, val)        \  argument
1149 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LIN…
1194 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_INM(x, mask)       \  argument
1195 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x), mask) 
1198 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_OUTM(x, mask, val) \  argument
1201 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2…
1216 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_INM(x, mask)       \  argument
1217 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x), mask) 
1220 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_OUTM(x, mask, val) \  argument
1223 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2…
1238 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
1239 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
1242 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
1245 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_…
1266 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
1267 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
1270 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
1273 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_…
1288 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_INM(x, mask) \  argument
1289 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
1292 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
1295 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO…
1316 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
1317 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
1320 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
1323 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_…
1338 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
1339 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
1342 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
1345 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO…
1360 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
1361 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
1364 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
1367 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWI…
1385 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_INM(x, mask)     \  argument
1386 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_ADDR(x), mask) 
1389 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \  argument
1392 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_WB…
1407 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_INM(x, mask)     \  argument
1408 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_ADDR(x), mask) 
1411 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \  argument
1414 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_WB…
1432 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_INM(x, mask)         \  argument
1433 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_ADDR(x), mask) 
1436 #define HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_OUTM(x, mask, val)   \  argument
1439 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_WBM2RE…
1454 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_INM(x, mask)   \  argument
1455 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
1458 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
1461 …out_dword_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_…
1476 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_INM(x, mask)               \  argument
1477 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x), mask) 
1480 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
1483 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING…
1498 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_INM(x, mask)               \  argument
1499 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x), mask) 
1502 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
1505 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING…
1523 #define HWIO_REO_R0_REO_CMD_RING_ID_INM(x, mask)                     \  argument
1524 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x), mask) 
1527 #define HWIO_REO_R0_REO_CMD_RING_ID_OUTM(x, mask, val)               \  argument
1530 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_ID_IN…
1545 #define HWIO_REO_R0_REO_CMD_RING_STATUS_INM(x, mask)                 \  argument
1546 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x), mask) 
1549 #define HWIO_REO_R0_REO_CMD_RING_STATUS_OUTM(x, mask, val)           \  argument
1552 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_S…
1570 #define HWIO_REO_R0_REO_CMD_RING_MISC_INM(x, mask)                   \  argument
1571 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x), mask) 
1574 #define HWIO_REO_R0_REO_CMD_RING_MISC_OUTM(x, mask, val)             \  argument
1577 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_MIS…
1622 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_INM(x, mask)            \  argument
1623 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x), mask) 
1626 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_OUTM(x, mask, val)      \  argument
1629 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_R…
1644 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_INM(x, mask)            \  argument
1645 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x), mask) 
1648 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_OUTM(x, mask, val)      \  argument
1651 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_R…
1666 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
1667 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
1670 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
1673 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R…
1694 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
1695 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
1698 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
1701 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R…
1716 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_INM(x, mask)    \  argument
1717 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
1720 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
1723 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
1744 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
1745 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
1748 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
1751 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R…
1766 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
1767 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
1770 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
1773 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_…
1788 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
1789 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
1792 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
1795 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO…
1813 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
1814 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x), mask) 
1817 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
1820 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD…
1835 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
1836 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x), mask) 
1839 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
1842 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD…
1860 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_INM(x, mask)              \  argument
1861 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x), mask) 
1864 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
1867 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RIN…
1882 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
1883 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
1886 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
1889 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO_C…
1904 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_INM(x, mask)                \  argument
1905 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x), mask) 
1908 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_OUTM(x, mask, val)          \  argument
1911 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_B…
1926 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_INM(x, mask)                \  argument
1927 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x), mask) 
1930 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_OUTM(x, mask, val)          \  argument
1933 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_B…
1951 #define HWIO_REO_R0_SW2REO_RING_ID_INM(x, mask)                      \  argument
1952 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_ID_ADDR(x), mask) 
1955 #define HWIO_REO_R0_SW2REO_RING_ID_OUTM(x, mask, val)                \  argument
1958 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_ID_IN(x…
1973 #define HWIO_REO_R0_SW2REO_RING_STATUS_INM(x, mask)                  \  argument
1974 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x), mask) 
1977 #define HWIO_REO_R0_SW2REO_RING_STATUS_OUTM(x, mask, val)            \  argument
1980 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_STA…
1998 #define HWIO_REO_R0_SW2REO_RING_MISC_INM(x, mask)                    \  argument
1999 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x), mask) 
2002 #define HWIO_REO_R0_SW2REO_RING_MISC_OUTM(x, mask, val)              \  argument
2005 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_MISC_…
2050 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_INM(x, mask)             \  argument
2051 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x), mask) 
2054 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_OUTM(x, mask, val)       \  argument
2057 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RIN…
2072 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_INM(x, mask)             \  argument
2073 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x), mask) 
2076 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_OUTM(x, mask, val)       \  argument
2079 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RIN…
2094 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask)  \  argument
2095 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
2098 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
2101 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R0…
2122 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask)  \  argument
2123 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
2126 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
2129 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R0…
2144 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_INM(x, mask)     \  argument
2145 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
2148 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
2151 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW…
2172 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask)  \  argument
2173 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
2176 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
2179 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
2194 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
2195 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
2198 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
2201 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_R…
2216 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
2217 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
2220 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
2223 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO_…
2241 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_INM(x, mask)           \  argument
2242 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x), mask) 
2245 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_OUTM(x, mask, val)     \  argument
2248 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_R…
2263 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_INM(x, mask)           \  argument
2264 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x), mask) 
2267 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_OUTM(x, mask, val)     \  argument
2270 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_R…
2288 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_INM(x, mask)               \  argument
2289 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x), mask) 
2292 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_OUTM(x, mask, val)         \  argument
2295 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_…
2310 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_INM(x, mask)         \  argument
2311 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
2314 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)   \  argument
2317 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_SW2REO…
2332 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_INM(x, mask)               \  argument
2333 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x), mask) 
2336 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
2339 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING…
2354 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_INM(x, mask)               \  argument
2355 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x), mask) 
2358 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
2361 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING…
2379 #define HWIO_REO_R0_SW2REO1_RING_ID_INM(x, mask)                     \  argument
2380 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x), mask) 
2383 #define HWIO_REO_R0_SW2REO1_RING_ID_OUTM(x, mask, val)               \  argument
2386 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_ID_IN…
2401 #define HWIO_REO_R0_SW2REO1_RING_STATUS_INM(x, mask)                 \  argument
2402 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x), mask) 
2405 #define HWIO_REO_R0_SW2REO1_RING_STATUS_OUTM(x, mask, val)           \  argument
2408 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_S…
2426 #define HWIO_REO_R0_SW2REO1_RING_MISC_INM(x, mask)                   \  argument
2427 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x), mask) 
2430 #define HWIO_REO_R0_SW2REO1_RING_MISC_OUTM(x, mask, val)             \  argument
2433 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_MIS…
2478 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_INM(x, mask)            \  argument
2479 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x), mask) 
2482 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_OUTM(x, mask, val)      \  argument
2485 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_R…
2500 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_INM(x, mask)            \  argument
2501 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x), mask) 
2504 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_OUTM(x, mask, val)      \  argument
2507 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_R…
2522 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
2523 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
2526 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
2529 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R…
2550 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
2551 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
2554 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
2557 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R…
2572 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_INM(x, mask)    \  argument
2573 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
2576 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
2579 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_S…
2600 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
2601 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
2604 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
2607 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R…
2622 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
2623 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
2626 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
2629 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_…
2644 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
2645 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
2648 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
2651 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO…
2669 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
2670 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x), mask) 
2673 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
2676 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1…
2691 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
2692 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x), mask) 
2695 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
2698 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1…
2716 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_INM(x, mask)              \  argument
2717 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x), mask) 
2720 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
2723 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RIN…
2738 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
2739 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
2742 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
2745 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_SW2RE…
2760 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_INM(x, mask)               \  argument
2761 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x), mask) 
2764 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
2767 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING…
2782 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_INM(x, mask)               \  argument
2783 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x), mask) 
2786 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
2789 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING…
2807 #define HWIO_REO_R0_REO2SW1_RING_ID_INM(x, mask)                     \  argument
2808 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x), mask) 
2811 #define HWIO_REO_R0_REO2SW1_RING_ID_OUTM(x, mask, val)               \  argument
2814 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_ID_IN…
2832 #define HWIO_REO_R0_REO2SW1_RING_STATUS_INM(x, mask)                 \  argument
2833 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x), mask) 
2836 #define HWIO_REO_R0_REO2SW1_RING_STATUS_OUTM(x, mask, val)           \  argument
2839 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_S…
2857 #define HWIO_REO_R0_REO2SW1_RING_MISC_INM(x, mask)                   \  argument
2858 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x), mask) 
2861 #define HWIO_REO_R0_REO2SW1_RING_MISC_OUTM(x, mask, val)             \  argument
2864 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_MIS…
2912 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
2913 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x), mask) 
2916 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
2919 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_R…
2934 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
2935 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x), mask) 
2938 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
2941 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_R…
2956 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
2957 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
2960 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
2963 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
2984 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
2985 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
2988 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
2991 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
3012 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
3013 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
3016 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
3019 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
3034 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
3035 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x), mask) 
3038 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
3041 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1…
3056 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
3057 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x), mask) 
3060 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
3063 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1…
3081 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_INM(x, mask)              \  argument
3082 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x), mask) 
3085 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
3088 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RIN…
3103 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
3104 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
3107 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
3110 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2S…
3125 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_INM(x, mask)               \  argument
3126 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x), mask) 
3129 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
3132 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING…
3147 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_INM(x, mask)               \  argument
3148 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x), mask) 
3151 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
3154 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING…
3172 #define HWIO_REO_R0_REO2SW2_RING_ID_INM(x, mask)                     \  argument
3173 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x), mask) 
3176 #define HWIO_REO_R0_REO2SW2_RING_ID_OUTM(x, mask, val)               \  argument
3179 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_ID_IN…
3197 #define HWIO_REO_R0_REO2SW2_RING_STATUS_INM(x, mask)                 \  argument
3198 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x), mask) 
3201 #define HWIO_REO_R0_REO2SW2_RING_STATUS_OUTM(x, mask, val)           \  argument
3204 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_S…
3222 #define HWIO_REO_R0_REO2SW2_RING_MISC_INM(x, mask)                   \  argument
3223 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x), mask) 
3226 #define HWIO_REO_R0_REO2SW2_RING_MISC_OUTM(x, mask, val)             \  argument
3229 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_MIS…
3277 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
3278 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x), mask) 
3281 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
3284 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_R…
3299 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
3300 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x), mask) 
3303 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
3306 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_R…
3321 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
3322 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
3325 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
3328 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
3349 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
3350 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
3353 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
3356 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
3377 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
3378 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
3381 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
3384 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
3399 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
3400 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x), mask) 
3403 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
3406 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2…
3421 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
3422 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x), mask) 
3425 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
3428 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2…
3446 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_INM(x, mask)              \  argument
3447 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x), mask) 
3450 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
3453 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RIN…
3468 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
3469 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
3472 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
3475 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2S…
3490 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_INM(x, mask)               \  argument
3491 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x), mask) 
3494 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
3497 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING…
3512 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_INM(x, mask)               \  argument
3513 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x), mask) 
3516 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
3519 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING…
3537 #define HWIO_REO_R0_REO2SW3_RING_ID_INM(x, mask)                     \  argument
3538 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x), mask) 
3541 #define HWIO_REO_R0_REO2SW3_RING_ID_OUTM(x, mask, val)               \  argument
3544 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_ID_IN…
3562 #define HWIO_REO_R0_REO2SW3_RING_STATUS_INM(x, mask)                 \  argument
3563 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x), mask) 
3566 #define HWIO_REO_R0_REO2SW3_RING_STATUS_OUTM(x, mask, val)           \  argument
3569 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_S…
3587 #define HWIO_REO_R0_REO2SW3_RING_MISC_INM(x, mask)                   \  argument
3588 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x), mask) 
3591 #define HWIO_REO_R0_REO2SW3_RING_MISC_OUTM(x, mask, val)             \  argument
3594 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_MIS…
3642 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
3643 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x), mask) 
3646 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
3649 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_R…
3664 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
3665 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x), mask) 
3668 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
3671 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_R…
3686 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
3687 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
3690 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
3693 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
3714 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
3715 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
3718 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
3721 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
3742 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
3743 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
3746 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
3749 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
3764 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
3765 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x), mask) 
3768 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
3771 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3…
3786 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
3787 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x), mask) 
3790 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
3793 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3…
3811 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_INM(x, mask)              \  argument
3812 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x), mask) 
3815 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
3818 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RIN…
3833 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
3834 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
3837 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
3840 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2S…
3855 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_INM(x, mask)               \  argument
3856 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x), mask) 
3859 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
3862 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING…
3877 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_INM(x, mask)               \  argument
3878 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x), mask) 
3881 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
3884 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING…
3902 #define HWIO_REO_R0_REO2SW4_RING_ID_INM(x, mask)                     \  argument
3903 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x), mask) 
3906 #define HWIO_REO_R0_REO2SW4_RING_ID_OUTM(x, mask, val)               \  argument
3909 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_ID_IN…
3927 #define HWIO_REO_R0_REO2SW4_RING_STATUS_INM(x, mask)                 \  argument
3928 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x), mask) 
3931 #define HWIO_REO_R0_REO2SW4_RING_STATUS_OUTM(x, mask, val)           \  argument
3934 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_S…
3952 #define HWIO_REO_R0_REO2SW4_RING_MISC_INM(x, mask)                   \  argument
3953 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x), mask) 
3956 #define HWIO_REO_R0_REO2SW4_RING_MISC_OUTM(x, mask, val)             \  argument
3959 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_MIS…
4007 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
4008 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x), mask) 
4011 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
4014 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_R…
4029 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
4030 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x), mask) 
4033 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
4036 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_R…
4051 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
4052 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
4055 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
4058 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
4079 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
4080 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
4083 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
4086 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
4107 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
4108 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
4111 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
4114 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
4129 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
4130 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x), mask) 
4133 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
4136 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4…
4151 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
4152 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x), mask) 
4155 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
4158 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4…
4176 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_INM(x, mask)              \  argument
4177 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x), mask) 
4180 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
4183 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RIN…
4198 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
4199 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
4202 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
4205 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2S…
4220 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_INM(x, mask)               \  argument
4221 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_BASE_LSB_ADDR(x), mask) 
4224 #define HWIO_REO_R0_REO2SW5_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
4227 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING…
4242 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_INM(x, mask)               \  argument
4243 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_BASE_MSB_ADDR(x), mask) 
4246 #define HWIO_REO_R0_REO2SW5_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
4249 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING…
4267 #define HWIO_REO_R0_REO2SW5_RING_ID_INM(x, mask)                     \  argument
4268 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_ID_ADDR(x), mask) 
4271 #define HWIO_REO_R0_REO2SW5_RING_ID_OUTM(x, mask, val)               \  argument
4274 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING_ID_IN…
4292 #define HWIO_REO_R0_REO2SW5_RING_STATUS_INM(x, mask)                 \  argument
4293 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_STATUS_ADDR(x), mask) 
4296 #define HWIO_REO_R0_REO2SW5_RING_STATUS_OUTM(x, mask, val)           \  argument
4299 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING_S…
4317 #define HWIO_REO_R0_REO2SW5_RING_MISC_INM(x, mask)                   \  argument
4318 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_MISC_ADDR(x), mask) 
4321 #define HWIO_REO_R0_REO2SW5_RING_MISC_OUTM(x, mask, val)             \  argument
4324 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RING_MIS…
4372 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
4373 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_ADDR(x), mask) 
4376 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
4379 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_R…
4394 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
4395 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_ADDR(x), mask) 
4398 #define HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
4401 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_R…
4416 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
4417 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
4420 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
4423 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
4444 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
4445 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
4448 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
4451 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
4472 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
4473 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
4476 #define HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
4479 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
4494 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
4495 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_ADDR(x), mask) 
4498 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
4501 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5…
4516 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
4517 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_ADDR(x), mask) 
4520 #define HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
4523 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5…
4541 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_INM(x, mask)              \  argument
4542 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_ADDR(x), mask) 
4545 #define HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
4548 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW5_RIN…
4563 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
4564 	in_dword_masked ( HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
4567 #define HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
4570 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2S…
4585 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_INM(x, mask)               \  argument
4586 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_BASE_LSB_ADDR(x), mask) 
4589 #define HWIO_REO_R0_REO2SW6_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
4592 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING…
4607 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_INM(x, mask)               \  argument
4608 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_BASE_MSB_ADDR(x), mask) 
4611 #define HWIO_REO_R0_REO2SW6_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
4614 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING…
4632 #define HWIO_REO_R0_REO2SW6_RING_ID_INM(x, mask)                     \  argument
4633 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_ID_ADDR(x), mask) 
4636 #define HWIO_REO_R0_REO2SW6_RING_ID_OUTM(x, mask, val)               \  argument
4639 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING_ID_IN…
4657 #define HWIO_REO_R0_REO2SW6_RING_STATUS_INM(x, mask)                 \  argument
4658 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_STATUS_ADDR(x), mask) 
4661 #define HWIO_REO_R0_REO2SW6_RING_STATUS_OUTM(x, mask, val)           \  argument
4664 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING_S…
4682 #define HWIO_REO_R0_REO2SW6_RING_MISC_INM(x, mask)                   \  argument
4683 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_MISC_ADDR(x), mask) 
4686 #define HWIO_REO_R0_REO2SW6_RING_MISC_OUTM(x, mask, val)             \  argument
4689 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RING_MIS…
4737 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
4738 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_ADDR(x), mask) 
4741 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
4744 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_R…
4759 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
4760 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_ADDR(x), mask) 
4763 #define HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
4766 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_R…
4781 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
4782 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
4785 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
4788 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
4809 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
4810 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
4813 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
4816 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
4837 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
4838 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
4841 #define HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
4844 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
4859 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
4860 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_ADDR(x), mask) 
4863 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
4866 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6…
4881 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
4882 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_ADDR(x), mask) 
4885 #define HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
4888 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6…
4906 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_INM(x, mask)              \  argument
4907 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_ADDR(x), mask) 
4910 #define HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
4913 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW6_RIN…
4928 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
4929 	in_dword_masked ( HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
4932 #define HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
4935 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2S…
4950 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_INM(x, mask)               \  argument
4951 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x), mask) 
4954 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
4957 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING…
4972 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_INM(x, mask)               \  argument
4973 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x), mask) 
4976 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
4979 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING…
4997 #define HWIO_REO_R0_REO2TCL_RING_ID_INM(x, mask)                     \  argument
4998 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x), mask) 
5001 #define HWIO_REO_R0_REO2TCL_RING_ID_OUTM(x, mask, val)               \  argument
5004 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_ID_IN…
5022 #define HWIO_REO_R0_REO2TCL_RING_STATUS_INM(x, mask)                 \  argument
5023 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x), mask) 
5026 #define HWIO_REO_R0_REO2TCL_RING_STATUS_OUTM(x, mask, val)           \  argument
5029 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_S…
5047 #define HWIO_REO_R0_REO2TCL_RING_MISC_INM(x, mask)                   \  argument
5048 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x), mask) 
5051 #define HWIO_REO_R0_REO2TCL_RING_MISC_OUTM(x, mask, val)             \  argument
5054 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_MIS…
5102 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
5103 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x), mask) 
5106 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
5109 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_R…
5124 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
5125 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x), mask) 
5128 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
5131 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_R…
5146 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
5147 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
5150 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
5153 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_RE…
5174 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
5175 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
5178 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
5181 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_R…
5202 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
5203 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
5206 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
5209 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0…
5224 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
5225 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x), mask) 
5228 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
5231 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL…
5246 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
5247 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x), mask) 
5250 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
5253 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL…
5271 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_INM(x, mask)              \  argument
5272 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x), mask) 
5275 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
5278 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RIN…
5293 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
5294 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
5297 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
5300 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2T…
5315 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_INM(x, mask)                \  argument
5316 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x), mask) 
5319 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_OUTM(x, mask, val)          \  argument
5322 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_B…
5337 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_INM(x, mask)                \  argument
5338 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x), mask) 
5341 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_OUTM(x, mask, val)          \  argument
5344 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_B…
5362 #define HWIO_REO_R0_REO2FW_RING_ID_INM(x, mask)                      \  argument
5363 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_ID_ADDR(x), mask) 
5366 #define HWIO_REO_R0_REO2FW_RING_ID_OUTM(x, mask, val)                \  argument
5369 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_ID_IN(x…
5387 #define HWIO_REO_R0_REO2FW_RING_STATUS_INM(x, mask)                  \  argument
5388 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x), mask) 
5391 #define HWIO_REO_R0_REO2FW_RING_STATUS_OUTM(x, mask, val)            \  argument
5394 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_STA…
5412 #define HWIO_REO_R0_REO2FW_RING_MISC_INM(x, mask)                    \  argument
5413 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x), mask) 
5416 #define HWIO_REO_R0_REO2FW_RING_MISC_OUTM(x, mask, val)              \  argument
5419 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_MISC_…
5467 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_INM(x, mask)             \  argument
5468 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x), mask) 
5471 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_OUTM(x, mask, val)       \  argument
5474 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RIN…
5489 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_INM(x, mask)             \  argument
5490 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x), mask) 
5493 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_OUTM(x, mask, val)       \  argument
5496 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RIN…
5511 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_INM(x, mask)      \  argument
5512 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
5515 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
5518 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO…
5539 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_INM(x, mask)     \  argument
5540 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
5543 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
5546 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RE…
5567 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_INM(x, mask)   \  argument
5568 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
5571 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
5574 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_…
5589 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_INM(x, mask)           \  argument
5590 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x), mask) 
5593 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_OUTM(x, mask, val)     \  argument
5596 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_R…
5611 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_INM(x, mask)           \  argument
5612 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x), mask) 
5615 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_OUTM(x, mask, val)     \  argument
5618 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_R…
5636 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_INM(x, mask)               \  argument
5637 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x), mask) 
5640 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_OUTM(x, mask, val)         \  argument
5643 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_…
5658 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_INM(x, mask)         \  argument
5659 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
5662 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)   \  argument
5665 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2FW…
5680 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_INM(x, mask)           \  argument
5681 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x), mask) 
5684 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_OUTM(x, mask, val)     \  argument
5687 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELE…
5702 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_INM(x, mask)           \  argument
5703 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x), mask) 
5706 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_OUTM(x, mask, val)     \  argument
5709 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELE…
5727 #define HWIO_REO_R0_REO_RELEASE_RING_ID_INM(x, mask)                 \  argument
5728 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x), mask) 
5731 #define HWIO_REO_R0_REO_RELEASE_RING_ID_OUTM(x, mask, val)           \  argument
5734 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RI…
5752 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_INM(x, mask)             \  argument
5753 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x), mask) 
5756 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_OUTM(x, mask, val)       \  argument
5759 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEAS…
5777 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_INM(x, mask)               \  argument
5778 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x), mask) 
5781 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_OUTM(x, mask, val)         \  argument
5784 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_…
5832 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_INM(x, mask)        \  argument
5833 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x), mask) 
5836 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_OUTM(x, mask, val)  \  argument
5839 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_R…
5854 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_INM(x, mask)        \  argument
5855 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x), mask) 
5858 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_OUTM(x, mask, val)  \  argument
5861 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_R…
5876 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_INM(x, mask) \  argument
5877 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
5880 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
5883 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R…
5904 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_INM(x, mask) \  argument
5905 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
5908 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
5911 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_…
5932 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \  argument
5933 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
5936 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
5939 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_RE…
5954 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_INM(x, mask)      \  argument
5955 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_ADDR(x), mask) 
5958 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \  argument
5961 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO…
5976 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_INM(x, mask)      \  argument
5977 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_ADDR(x), mask) 
5980 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \  argument
5983 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO…
6001 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_INM(x, mask)          \  argument
6002 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_ADDR(x), mask) 
6005 #define HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_OUTM(x, mask, val)    \  argument
6008 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO_REL…
6023 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_INM(x, mask)    \  argument
6024 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
6027 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
6030 …out_dword_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_R…
6045 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_INM(x, mask)            \  argument
6046 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x), mask) 
6049 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_OUTM(x, mask, val)      \  argument
6052 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATU…
6067 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_INM(x, mask)            \  argument
6068 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x), mask) 
6071 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_OUTM(x, mask, val)      \  argument
6074 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATU…
6092 #define HWIO_REO_R0_REO_STATUS_RING_ID_INM(x, mask)                  \  argument
6093 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x), mask) 
6096 #define HWIO_REO_R0_REO_STATUS_RING_ID_OUTM(x, mask, val)            \  argument
6099 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING…
6117 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_INM(x, mask)              \  argument
6118 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x), mask) 
6121 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_OUTM(x, mask, val)        \  argument
6124 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_…
6142 #define HWIO_REO_R0_REO_STATUS_RING_MISC_INM(x, mask)                \  argument
6143 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x), mask) 
6146 #define HWIO_REO_R0_REO_STATUS_RING_MISC_OUTM(x, mask, val)          \  argument
6149 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RI…
6197 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_INM(x, mask)         \  argument
6198 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x), mask) 
6201 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_OUTM(x, mask, val)   \  argument
6204 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_ST…
6219 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_INM(x, mask)         \  argument
6220 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x), mask) 
6223 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_OUTM(x, mask, val)   \  argument
6226 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_ST…
6241 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_INM(x, mask)  \  argument
6242 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
6245 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
6248 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0…
6269 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_INM(x, mask) \  argument
6270 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
6273 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
6276 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R…
6297 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \  argument
6298 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
6301 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
6304 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO…
6319 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_INM(x, mask)       \  argument
6320 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x), mask) 
6323 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \  argument
6326 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_…
6341 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_INM(x, mask)       \  argument
6342 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x), mask) 
6345 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \  argument
6348 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_…
6366 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_INM(x, mask)           \  argument
6367 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x), mask) 
6370 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_OUTM(x, mask, val)     \  argument
6373 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO_STAT…
6388 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_INM(x, mask)     \  argument
6389 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
6392 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
6395 …out_dword_masked_ns(HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_RE…
6410 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_INM(x, mask)                    \  argument
6411 	in_dword_masked ( HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x), mask) 
6414 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_OUTM(x, mask, val)              \  argument
6417 …out_dword_masked_ns(HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x), mask, val, HWIO_REO_R0_WATCHDOG_TIMEOUT_…
6435 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_INM(x, mask)         \  argument
6436 	in_dword_masked ( HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x), mask) 
6439 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_OUTM(x, mask, val)   \  argument
6442 …out_dword_masked_ns(HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x), mask, val, HWIO_REO_R0_INTERR…
6457 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_INM(x, mask)                \  argument
6458 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x), mask) 
6461 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_OUTM(x, mask, val)          \  argument
6464 …out_dword_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHO…
6479 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_INM(x, mask)                \  argument
6480 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x), mask) 
6483 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_OUTM(x, mask, val)          \  argument
6486 …out_dword_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHO…
6501 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_INM(x, mask)                \  argument
6502 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x), mask) 
6505 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_OUTM(x, mask, val)          \  argument
6508 …out_dword_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHO…
6523 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_INM(x, mask)                \  argument
6524 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x), mask) 
6527 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_OUTM(x, mask, val)          \  argument
6530 …out_dword_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHO…
6545 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_INM(x, mask)          \  argument
6546 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x), mask) 
6549 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_OUTM(x, mask, val)    \  argument
6552 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6567 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_INM(x, mask)          \  argument
6568 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x), mask) 
6571 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_OUTM(x, mask, val)    \  argument
6574 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6589 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_INM(x, mask)          \  argument
6590 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x), mask) 
6593 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_OUTM(x, mask, val)    \  argument
6596 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6611 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_INM(x, mask)          \  argument
6612 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x), mask) 
6615 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_OUTM(x, mask, val)    \  argument
6618 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6633 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_INM(x, mask)          \  argument
6634 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x), mask) 
6637 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_OUTM(x, mask, val)    \  argument
6640 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6655 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_INM(x, mask)          \  argument
6656 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x), mask) 
6659 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_OUTM(x, mask, val)    \  argument
6662 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6677 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_INM(x, mask)          \  argument
6678 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x), mask) 
6681 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_OUTM(x, mask, val)    \  argument
6684 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6699 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_INM(x, mask)          \  argument
6700 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x), mask) 
6703 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_OUTM(x, mask, val)    \  argument
6706 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6721 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_INM(x, mask)          \  argument
6722 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x), mask) 
6725 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_OUTM(x, mask, val)    \  argument
6728 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6743 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_INM(x, mask)          \  argument
6744 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x), mask) 
6747 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_OUTM(x, mask, val)    \  argument
6750 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6765 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_INM(x, mask)          \  argument
6766 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x), mask) 
6769 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_OUTM(x, mask, val)    \  argument
6772 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6787 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_INM(x, mask)          \  argument
6788 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x), mask) 
6791 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_OUTM(x, mask, val)    \  argument
6794 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6809 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_INM(x, mask)          \  argument
6810 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x), mask) 
6813 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_OUTM(x, mask, val)    \  argument
6816 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6831 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_INM(x, mask)          \  argument
6832 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x), mask) 
6835 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_OUTM(x, mask, val)    \  argument
6838 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6853 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_INM(x, mask)          \  argument
6854 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x), mask) 
6857 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_OUTM(x, mask, val)    \  argument
6860 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6875 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_INM(x, mask)          \  argument
6876 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x), mask) 
6879 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_OUTM(x, mask, val)    \  argument
6882 …out_dword_masked_ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_L…
6897 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_INM(x, mask)               \  argument
6898 	in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x), mask) 
6901 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_OUTM(x, mask, val)         \  argument
6904 …out_dword_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QU…
6919 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_INM(x, mask)               \  argument
6920 	in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x), mask) 
6923 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_OUTM(x, mask, val)         \  argument
6926 …out_dword_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QU…
6941 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_INM(x, mask)               \  argument
6942 	in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x), mask) 
6945 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_OUTM(x, mask, val)         \  argument
6948 …out_dword_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QU…
6963 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_INM(x, mask)               \  argument
6964 	in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x), mask) 
6967 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_OUTM(x, mask, val)         \  argument
6970 …out_dword_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QU…
6985 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_INM(x, mask)                \  argument
6986 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x), mask) 
6989 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_OUTM(x, mask, val)          \  argument
6992 …out_dword_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTA…
7007 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_INM(x, mask)                \  argument
7008 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x), mask) 
7011 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_OUTM(x, mask, val)          \  argument
7014 …out_dword_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTA…
7029 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_INM(x, mask)                \  argument
7030 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x), mask) 
7033 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_OUTM(x, mask, val)          \  argument
7036 …out_dword_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTA…
7051 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_INM(x, mask)                \  argument
7052 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x), mask) 
7055 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_OUTM(x, mask, val)          \  argument
7058 …out_dword_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTA…
7073 #define HWIO_REO_R0_AGING_CONTROL_INM(x, mask)                       \  argument
7074 	in_dword_masked ( HWIO_REO_R0_AGING_CONTROL_ADDR(x), mask) 
7077 #define HWIO_REO_R0_AGING_CONTROL_OUTM(x, mask, val)                 \  argument
7080 …out_dword_masked_ns(HWIO_REO_R0_AGING_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_AGING_CONTROL_IN(x))…
7095 #define HWIO_REO_R0_MISC_CTL_INM(x, mask)                            \  argument
7096 	in_dword_masked ( HWIO_REO_R0_MISC_CTL_ADDR(x), mask) 
7099 #define HWIO_REO_R0_MISC_CTL_OUTM(x, mask, val)                      \  argument
7102 		out_dword_masked_ns(HWIO_REO_R0_MISC_CTL_ADDR(x), mask, val, HWIO_REO_R0_MISC_CTL_IN(x)); \
7126 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_INM(x, mask)               \  argument
7127 	in_dword_masked ( HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x), mask) 
7130 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_OUTM(x, mask, val)         \  argument
7133 …out_dword_masked_ns(HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x), mask, val, HWIO_REO_R0_HIGH_MEMORY_…
7148 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_INM(x, mask)                \  argument
7149 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x), mask) 
7152 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_OUTM(x, mask, val)          \  argument
7155 …out_dword_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_US…
7170 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_INM(x, mask)                \  argument
7171 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x), mask) 
7174 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_OUTM(x, mask, val)          \  argument
7177 …out_dword_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_US…
7192 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_INM(x, mask)                \  argument
7193 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x), mask) 
7196 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_OUTM(x, mask, val)          \  argument
7199 …out_dword_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_US…
7214 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_INM(x, mask)                \  argument
7215 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x), mask) 
7218 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_OUTM(x, mask, val)          \  argument
7221 …out_dword_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_US…
7236 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_INM(x, mask)  \  argument
7237 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x), mask) 
7240 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_OUTM(x, mask, val) \  argument
7243 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x), mask, val, HWIO_REO_R0…
7258 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_INM(x, mask)  \  argument
7259 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x), mask) 
7262 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_OUTM(x, mask, val) \  argument
7265 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x), mask, val, HWIO_REO_R0…
7280 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_INM(x, mask)  \  argument
7281 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x), mask) 
7284 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_OUTM(x, mask, val) \  argument
7287 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x), mask, val, HWIO_REO_R0…
7302 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_INM(x, mask) \  argument
7303 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x), mask) 
7306 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_OUTM(x, mask, val) \  argument
7309 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x), mask, val, HWIO_REO_R…
7324 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_INM(x, mask)         \  argument
7325 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x), mask) 
7328 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_OUTM(x, mask, val)   \  argument
7331 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL…
7346 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_INM(x, mask)         \  argument
7347 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x), mask) 
7350 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_OUTM(x, mask, val)   \  argument
7353 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL…
7368 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_INM(x, mask)         \  argument
7369 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x), mask) 
7372 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_OUTM(x, mask, val)   \  argument
7375 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL…
7390 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_INM(x, mask)         \  argument
7391 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x), mask) 
7394 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_OUTM(x, mask, val)   \  argument
7397 …out_dword_masked_ns(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL…
7412 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_INM(x, mask)       \  argument
7413 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x), mask) 
7416 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_OUTM(x, mask, val) \  argument
7419 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7434 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_INM(x, mask)       \  argument
7435 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x), mask) 
7438 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_OUTM(x, mask, val) \  argument
7441 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7456 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_INM(x, mask)       \  argument
7457 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x), mask) 
7460 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_OUTM(x, mask, val) \  argument
7463 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7478 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_INM(x, mask)       \  argument
7479 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x), mask) 
7482 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_OUTM(x, mask, val) \  argument
7485 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7500 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_INM(x, mask)       \  argument
7501 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x), mask) 
7504 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_OUTM(x, mask, val) \  argument
7507 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7522 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_INM(x, mask)       \  argument
7523 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x), mask) 
7526 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_OUTM(x, mask, val) \  argument
7529 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7544 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_INM(x, mask)       \  argument
7545 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x), mask) 
7548 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_OUTM(x, mask, val) \  argument
7551 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7566 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_INM(x, mask)       \  argument
7567 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x), mask) 
7570 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_OUTM(x, mask, val) \  argument
7573 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x), mask, val, HWIO_REO_R0_QUEU…
7588 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_INM(x, mask)               \  argument
7589 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x), mask) 
7592 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_OUTM(x, mask, val)         \  argument
7595 …out_dword_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_B…
7613 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask)  \  argument
7614 	in_dword_masked ( HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask) 
7617 #define HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \  argument
7620 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0…
7638 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask)  \  argument
7639 	in_dword_masked ( HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask) 
7642 #define HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \  argument
7645 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0…
7663 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask)  \  argument
7664 	in_dword_masked ( HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask) 
7667 #define HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \  argument
7670 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0…
7688 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask)  \  argument
7689 	in_dword_masked ( HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask) 
7692 #define HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \  argument
7695 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0…
7713 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask)  \  argument
7714 	in_dword_masked ( HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask) 
7717 #define HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \  argument
7720 …out_dword_masked_ns(HWIO_REO_R0_REO2SW5_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0…
7738 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask)  \  argument
7739 	in_dword_masked ( HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask) 
7742 #define HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \  argument
7745 …out_dword_masked_ns(HWIO_REO_R0_REO2SW6_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0…
7763 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask)   \  argument
7764 	in_dword_masked ( HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask) 
7767 #define HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \  argument
7770 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0_…
7788 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_INM(x, mask)  \  argument
7789 	in_dword_masked ( HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask) 
7792 #define HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_OUTM(x, mask, val) \  argument
7795 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_MSDU_HEADER_CAPTURE_CONFIG_ADDR(x), mask, val, HWIO_REO_R0…
7813 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_INM(x, mask)                   \  argument
7814 	in_dword_masked ( HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x), mask) 
7817 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_OUTM(x, mask, val)             \  argument
7820 …out_dword_masked_ns(HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x), mask, val, HWIO_REO_R0_GXI_TESTBUS_LOWE…
7835 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_INM(x, mask)                   \  argument
7836 	in_dword_masked ( HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x), mask) 
7839 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_OUTM(x, mask, val)             \  argument
7842 …out_dword_masked_ns(HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x), mask, val, HWIO_REO_R0_GXI_TESTBUS_UPPE…
7857 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_INM(x, mask)                  \  argument
7858 	in_dword_masked ( HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x), mask) 
7861 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_OUTM(x, mask, val)            \  argument
7864 …out_dword_masked_ns(HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GXI_SM_STATES_I…
7885 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_INM(x, mask)               \  argument
7886 	in_dword_masked ( HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask) 
7889 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_OUTM(x, mask, val)         \  argument
7892 …out_dword_masked_ns(HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_REO_R0_GXI_END_OF_T…
7907 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_INM(x, mask)              \  argument
7908 	in_dword_masked ( HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask) 
7911 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_OUTM(x, mask, val)        \  argument
7914 …out_dword_masked_ns(HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask, val, HWIO_REO_R0_GXI_CLOCK_G…
7965 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_INM(x, mask)                    \  argument
7966 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x), mask) 
7969 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_OUTM(x, mask, val)              \  argument
7972 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_ERR_INTS_…
7996 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_INM(x, mask)                   \  argument
7997 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x), mask) 
8000 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_OUTM(x, mask, val)             \  argument
8003 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_ERR_STAT…
8024 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_INM(x, mask)             \  argument
8025 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask) 
8028 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_OUTM(x, mask, val)       \  argument
8031 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_DE…
8055 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_INM(x, mask)             \  argument
8056 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask) 
8059 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_OUTM(x, mask, val)       \  argument
8062 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_RE…
8086 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_INM(x, mask)                \  argument
8087 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask) 
8090 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_OUTM(x, mask, val)          \  argument
8093 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_MISC_…
8135 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_INM(x, mask)                \  argument
8136 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask) 
8139 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_OUTM(x, mask, val)          \  argument
8142 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WDOG_…
8160 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_INM(x, mask)                 \  argument
8161 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask) 
8164 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_OUTM(x, mask, val)           \  argument
8167 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WDOG_S…
8182 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_INM(x, mask)               \  argument
8183 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask) 
8186 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_OUTM(x, mask, val)         \  argument
8189 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_IDLE…
8207 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_INM(x, mask)             \  argument
8208 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask) 
8211 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_OUTM(x, mask, val)       \  argument
8214 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_RD…
8235 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_INM(x, mask)             \  argument
8236 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask) 
8239 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_OUTM(x, mask, val)       \  argument
8242 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WR…
8263 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_INM(x, mask)   \  argument
8264 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), mask) 
8267 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \  argument
8270 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), mask, val, HWIO_REO_R0_…
8285 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_INM(x, mask)   \  argument
8286 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), mask) 
8289 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \  argument
8292 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), mask, val, HWIO_REO_R0_…
8307 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_INM(x, mask)   \  argument
8308 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), mask) 
8311 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \  argument
8314 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), mask, val, HWIO_REO_R0_…
8329 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_INM(x, mask)   \  argument
8330 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), mask) 
8333 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \  argument
8336 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), mask, val, HWIO_REO_R0_…
8351 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_INM(x, mask)          \  argument
8352 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), mask) 
8355 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUTM(x, mask, val)    \  argument
8358 …out_dword_masked_ns(HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI…
8382 #define HWIO_REO_R0_CACHE_CTL_CONFIG_INM(x, mask)                    \  argument
8383 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x), mask) 
8386 #define HWIO_REO_R0_CACHE_CTL_CONFIG_OUTM(x, mask, val)              \  argument
8389 …out_dword_masked_ns(HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_CONFIG_…
8431 #define HWIO_REO_R0_CACHE_CTL_CONTROL_INM(x, mask)                   \  argument
8432 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x), mask) 
8435 #define HWIO_REO_R0_CACHE_CTL_CONTROL_OUTM(x, mask, val)             \  argument
8438 …out_dword_masked_ns(HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_CONTRO…
8456 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_INM(x, mask)                \  argument
8457 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x), mask) 
8460 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_OUTM(x, mask, val)          \  argument
8463 …out_dword_masked_ns(HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_CON…
8478 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_INM(x, mask)                  \  argument
8479 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x), mask) 
8482 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_OUTM(x, mask, val)            \  argument
8485 …out_dword_masked_ns(HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_SET_S…
8500 #define HWIO_REO_R0_CLK_GATE_CTRL_INM(x, mask)                       \  argument
8501 	in_dword_masked ( HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x), mask) 
8504 #define HWIO_REO_R0_CLK_GATE_CTRL_OUTM(x, mask, val)                 \  argument
8507 …out_dword_masked_ns(HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x), mask, val, HWIO_REO_R0_CLK_GATE_CTRL_IN(x))…
8549 #define HWIO_REO_R0_EVENTMASK_IX_0_INM(x, mask)                      \  argument
8550 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x), mask) 
8553 #define HWIO_REO_R0_EVENTMASK_IX_0_OUTM(x, mask, val)                \  argument
8556 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_0_IN(x…
8571 #define HWIO_REO_R0_EVENTMASK_IX_1_INM(x, mask)                      \  argument
8572 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x), mask) 
8575 #define HWIO_REO_R0_EVENTMASK_IX_1_OUTM(x, mask, val)                \  argument
8578 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_1_IN(x…
8593 #define HWIO_REO_R0_EVENTMASK_IX_2_INM(x, mask)                      \  argument
8594 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x), mask) 
8597 #define HWIO_REO_R0_EVENTMASK_IX_2_OUTM(x, mask, val)                \  argument
8600 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_2_IN(x…
8615 #define HWIO_REO_R0_EVENTMASK_IX_3_INM(x, mask)                      \  argument
8616 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x), mask) 
8619 #define HWIO_REO_R0_EVENTMASK_IX_3_OUTM(x, mask, val)                \  argument
8622 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_3_IN(x…
8637 #define HWIO_REO_R1_MISC_DEBUG_CTRL_INM(x, mask)                     \  argument
8638 	in_dword_masked ( HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x), mask) 
8641 #define HWIO_REO_R1_MISC_DEBUG_CTRL_OUTM(x, mask, val)               \  argument
8644 …out_dword_masked_ns(HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x), mask, val, HWIO_REO_R1_MISC_DEBUG_CTRL_IN…
8671 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_INM(x, mask)                \  argument
8672 	in_dword_masked ( HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x), mask) 
8675 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_OUTM(x, mask, val)          \  argument
8678 …out_dword_masked_ns(HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x), mask, val, HWIO_REO_R1_MISC_PERF_DEB…
8696 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_INM(x, mask)             \  argument
8697 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x), mask) 
8700 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_OUTM(x, mask, val)       \  argument
8703 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_…
8727 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_INM(x, mask)           \  argument
8728 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x), mask) 
8731 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_OUTM(x, mask, val)     \  argument
8734 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CT…
8749 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_INM(x, mask)          \  argument
8750 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x), mask) 
8753 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_OUTM(x, mask, val)    \  argument
8756 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x), mask, val, HWIO_REO_R1_CACHE_C…
8771 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_INM(x, mask)       \  argument
8772 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x), mask) 
8775 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_OUTM(x, mask, val) \  argument
8778 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x), mask, val, HWIO_REO_R1_CACH…
8793 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_INM(x, mask)      \  argument
8794 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x), mask) 
8797 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_OUTM(x, mask, val) \  argument
8800 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x), mask, val, HWIO_REO_R1_CAC…
8815 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_INM(x, mask)                 \  argument
8816 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x), mask) 
8819 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_OUTM(x, mask, val)           \  argument
8822 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBU…
8837 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_INM(x, mask)           \  argument
8838 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x), mask) 
8841 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_OUTM(x, mask, val)     \  argument
8844 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CT…
8862 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_INM(x, mask)          \  argument
8863 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x), mask) 
8866 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_OUTM(x, mask, val)    \  argument
8869 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x), mask, val, HWIO_REO_R1_CACHE_C…
8887 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_INM(x, mask)          \  argument
8888 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x), mask) 
8891 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_OUTM(x, mask, val)    \  argument
8894 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x), mask, val, HWIO_REO_R1_CACHE_C…
8912 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_INM(x, mask)          \  argument
8913 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x), mask) 
8916 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_OUTM(x, mask, val)    \  argument
8919 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x), mask, val, HWIO_REO_R1_CACHE_C…
8937 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_INM(x, mask)     \  argument
8938 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x), mask) 
8941 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_OUTM(x, mask, val) \  argument
8944 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x), mask, val, HWIO_REO_R1_CA…
8959 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_INM(x, mask)    \  argument
8960 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x), mask) 
8963 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_OUTM(x, mask, val) \  argument
8966 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x), mask, val, HWIO_REO_R1_C…
8981 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_INM(x, mask)  \  argument
8982 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x), mask) 
8985 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_OUTM(x, mask, val) \  argument
8988 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x), mask, val, HWIO_REO_R1…
9006 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_INM(x, mask)         \  argument
9007 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x), mask) 
9010 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_OUTM(x, mask, val)   \  argument
9013 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_REO_R1_CACHE_…
9028 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_INM(x, mask)       \  argument
9029 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_ADDR(x), mask) 
9032 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_OUTM(x, mask, val) \  argument
9035 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG1_ADDR(x), mask, val, HWIO_REO_R1_CACH…
9059 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_INM(x, mask)       \  argument
9060 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_ADDR(x), mask) 
9063 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_OUTM(x, mask, val) \  argument
9066 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG2_ADDR(x), mask, val, HWIO_REO_R1_CACH…
9081 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_INM(x, mask)       \  argument
9082 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_ADDR(x), mask) 
9085 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_OUTM(x, mask, val) \  argument
9088 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_CONFIG3_ADDR(x), mask, val, HWIO_REO_R1_CACH…
9103 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_INM(x, mask)        \  argument
9104 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_ADDR(x), mask) 
9107 #define HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_OUTM(x, mask, val)  \  argument
9110 …out_dword_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_FLUSH_STATUS_ADDR(x), mask, val, HWIO_REO_R1_CACHE…
9146 #define HWIO_REO_R1_END_OF_TEST_CHECK_INM(x, mask)                   \  argument
9147 	in_dword_masked ( HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x), mask) 
9150 #define HWIO_REO_R1_END_OF_TEST_CHECK_OUTM(x, mask, val)             \  argument
9153 …out_dword_masked_ns(HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_REO_R1_END_OF_TEST_CHEC…
9168 #define HWIO_REO_R1_SM_ALL_IDLE_INM(x, mask)                         \  argument
9169 	in_dword_masked ( HWIO_REO_R1_SM_ALL_IDLE_ADDR(x), mask) 
9172 #define HWIO_REO_R1_SM_ALL_IDLE_OUTM(x, mask, val)                   \  argument
9175 		out_dword_masked_ns(HWIO_REO_R1_SM_ALL_IDLE_ADDR(x), mask, val, HWIO_REO_R1_SM_ALL_IDLE_IN(x)); \
9196 #define HWIO_REO_R1_TESTBUS_CTRL_INM(x, mask)                        \  argument
9197 	in_dword_masked ( HWIO_REO_R1_TESTBUS_CTRL_ADDR(x), mask) 
9200 #define HWIO_REO_R1_TESTBUS_CTRL_OUTM(x, mask, val)                  \  argument
9203 …out_dword_masked_ns(HWIO_REO_R1_TESTBUS_CTRL_ADDR(x), mask, val, HWIO_REO_R1_TESTBUS_CTRL_IN(x)); \
9218 #define HWIO_REO_R1_TESTBUS_LOWER_INM(x, mask)                       \  argument
9219 	in_dword_masked ( HWIO_REO_R1_TESTBUS_LOWER_ADDR(x), mask) 
9222 #define HWIO_REO_R1_TESTBUS_LOWER_OUTM(x, mask, val)                 \  argument
9225 …out_dword_masked_ns(HWIO_REO_R1_TESTBUS_LOWER_ADDR(x), mask, val, HWIO_REO_R1_TESTBUS_LOWER_IN(x))…
9240 #define HWIO_REO_R1_TESTBUS_HIGHER_INM(x, mask)                      \  argument
9241 	in_dword_masked ( HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x), mask) 
9244 #define HWIO_REO_R1_TESTBUS_HIGHER_OUTM(x, mask, val)                \  argument
9247 …out_dword_masked_ns(HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x), mask, val, HWIO_REO_R1_TESTBUS_HIGHER_IN(x…
9262 #define HWIO_REO_R1_SM_STATES_IX_0_INM(x, mask)                      \  argument
9263 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_0_ADDR(x), mask) 
9266 #define HWIO_REO_R1_SM_STATES_IX_0_OUTM(x, mask, val)                \  argument
9269 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_0_IN(x…
9284 #define HWIO_REO_R1_SM_STATES_IX_1_INM(x, mask)                      \  argument
9285 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_1_ADDR(x), mask) 
9288 #define HWIO_REO_R1_SM_STATES_IX_1_OUTM(x, mask, val)                \  argument
9291 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_1_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_1_IN(x…
9306 #define HWIO_REO_R1_SM_STATES_IX_2_INM(x, mask)                      \  argument
9307 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_2_ADDR(x), mask) 
9310 #define HWIO_REO_R1_SM_STATES_IX_2_OUTM(x, mask, val)                \  argument
9313 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_2_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_2_IN(x…
9328 #define HWIO_REO_R1_SM_STATES_IX_3_INM(x, mask)                      \  argument
9329 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_3_ADDR(x), mask) 
9332 #define HWIO_REO_R1_SM_STATES_IX_3_OUTM(x, mask, val)                \  argument
9335 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_3_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_3_IN(x…
9350 #define HWIO_REO_R1_SM_STATES_IX_4_INM(x, mask)                      \  argument
9351 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_4_ADDR(x), mask) 
9354 #define HWIO_REO_R1_SM_STATES_IX_4_OUTM(x, mask, val)                \  argument
9357 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_4_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_4_IN(x…
9372 #define HWIO_REO_R1_SM_STATES_IX_5_INM(x, mask)                      \  argument
9373 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_5_ADDR(x), mask) 
9376 #define HWIO_REO_R1_SM_STATES_IX_5_OUTM(x, mask, val)                \  argument
9379 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_5_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_5_IN(x…
9394 #define HWIO_REO_R1_SM_STATES_IX_6_INM(x, mask)                      \  argument
9395 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_6_ADDR(x), mask) 
9398 #define HWIO_REO_R1_SM_STATES_IX_6_OUTM(x, mask, val)                \  argument
9401 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_6_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_6_IN(x…
9416 #define HWIO_REO_R1_IDLE_STATES_IX_0_INM(x, mask)                    \  argument
9417 	in_dword_masked ( HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x), mask) 
9420 #define HWIO_REO_R1_IDLE_STATES_IX_0_OUTM(x, mask, val)              \  argument
9423 …out_dword_masked_ns(HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x), mask, val, HWIO_REO_R1_IDLE_STATES_IX_0_…
9438 #define HWIO_REO_R1_INVALID_APB_ACCESS_INM(x, mask)                  \  argument
9439 	in_dword_masked ( HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x), mask) 
9442 #define HWIO_REO_R1_INVALID_APB_ACCESS_OUTM(x, mask, val)            \  argument
9445 …out_dword_masked_ns(HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x), mask, val, HWIO_REO_R1_INVALID_APB_ACC…
9463 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_INM(x, mask)                  \  argument
9464 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x), mask) 
9467 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_OUTM(x, mask, val)            \  argument
9470 …out_dword_masked_ns(HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO0_RING…
9485 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_INM(x, mask)                  \  argument
9486 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x), mask) 
9489 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_OUTM(x, mask, val)            \  argument
9492 …out_dword_masked_ns(HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO0_RING…
9507 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_INM(x, mask)                \  argument
9508 	in_dword_masked ( HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x), mask) 
9511 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_OUTM(x, mask, val)          \  argument
9514 …out_dword_masked_ns(HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_WBM2REO_LINK_…
9529 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_INM(x, mask)                \  argument
9530 	in_dword_masked ( HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x), mask) 
9533 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_OUTM(x, mask, val)          \  argument
9536 …out_dword_masked_ns(HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_WBM2REO_LINK_…
9551 #define HWIO_REO_R2_REO_CMD_RING_HP_INM(x, mask)                     \  argument
9552 	in_dword_masked ( HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x), mask) 
9555 #define HWIO_REO_R2_REO_CMD_RING_HP_OUTM(x, mask, val)               \  argument
9558 …out_dword_masked_ns(HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO_CMD_RING_HP_IN…
9573 #define HWIO_REO_R2_REO_CMD_RING_TP_INM(x, mask)                     \  argument
9574 	in_dword_masked ( HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x), mask) 
9577 #define HWIO_REO_R2_REO_CMD_RING_TP_OUTM(x, mask, val)               \  argument
9580 …out_dword_masked_ns(HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO_CMD_RING_TP_IN…
9595 #define HWIO_REO_R2_SW2REO_RING_HP_INM(x, mask)                      \  argument
9596 	in_dword_masked ( HWIO_REO_R2_SW2REO_RING_HP_ADDR(x), mask) 
9599 #define HWIO_REO_R2_SW2REO_RING_HP_OUTM(x, mask, val)                \  argument
9602 …out_dword_masked_ns(HWIO_REO_R2_SW2REO_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO_RING_HP_IN(x…
9617 #define HWIO_REO_R2_SW2REO_RING_TP_INM(x, mask)                      \  argument
9618 	in_dword_masked ( HWIO_REO_R2_SW2REO_RING_TP_ADDR(x), mask) 
9621 #define HWIO_REO_R2_SW2REO_RING_TP_OUTM(x, mask, val)                \  argument
9624 …out_dword_masked_ns(HWIO_REO_R2_SW2REO_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO_RING_TP_IN(x…
9639 #define HWIO_REO_R2_SW2REO1_RING_HP_INM(x, mask)                     \  argument
9640 	in_dword_masked ( HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x), mask) 
9643 #define HWIO_REO_R2_SW2REO1_RING_HP_OUTM(x, mask, val)               \  argument
9646 …out_dword_masked_ns(HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO1_RING_HP_IN…
9661 #define HWIO_REO_R2_SW2REO1_RING_TP_INM(x, mask)                     \  argument
9662 	in_dword_masked ( HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x), mask) 
9665 #define HWIO_REO_R2_SW2REO1_RING_TP_OUTM(x, mask, val)               \  argument
9668 …out_dword_masked_ns(HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO1_RING_TP_IN…
9683 #define HWIO_REO_R2_REO2SW1_RING_HP_INM(x, mask)                     \  argument
9684 	in_dword_masked ( HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x), mask) 
9687 #define HWIO_REO_R2_REO2SW1_RING_HP_OUTM(x, mask, val)               \  argument
9690 …out_dword_masked_ns(HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW1_RING_HP_IN…
9705 #define HWIO_REO_R2_REO2SW1_RING_TP_INM(x, mask)                     \  argument
9706 	in_dword_masked ( HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x), mask) 
9709 #define HWIO_REO_R2_REO2SW1_RING_TP_OUTM(x, mask, val)               \  argument
9712 …out_dword_masked_ns(HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW1_RING_TP_IN…
9727 #define HWIO_REO_R2_REO2SW2_RING_HP_INM(x, mask)                     \  argument
9728 	in_dword_masked ( HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x), mask) 
9731 #define HWIO_REO_R2_REO2SW2_RING_HP_OUTM(x, mask, val)               \  argument
9734 …out_dword_masked_ns(HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW2_RING_HP_IN…
9749 #define HWIO_REO_R2_REO2SW2_RING_TP_INM(x, mask)                     \  argument
9750 	in_dword_masked ( HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x), mask) 
9753 #define HWIO_REO_R2_REO2SW2_RING_TP_OUTM(x, mask, val)               \  argument
9756 …out_dword_masked_ns(HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW2_RING_TP_IN…
9771 #define HWIO_REO_R2_REO2SW3_RING_HP_INM(x, mask)                     \  argument
9772 	in_dword_masked ( HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x), mask) 
9775 #define HWIO_REO_R2_REO2SW3_RING_HP_OUTM(x, mask, val)               \  argument
9778 …out_dword_masked_ns(HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW3_RING_HP_IN…
9793 #define HWIO_REO_R2_REO2SW3_RING_TP_INM(x, mask)                     \  argument
9794 	in_dword_masked ( HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x), mask) 
9797 #define HWIO_REO_R2_REO2SW3_RING_TP_OUTM(x, mask, val)               \  argument
9800 …out_dword_masked_ns(HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW3_RING_TP_IN…
9815 #define HWIO_REO_R2_REO2SW4_RING_HP_INM(x, mask)                     \  argument
9816 	in_dword_masked ( HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x), mask) 
9819 #define HWIO_REO_R2_REO2SW4_RING_HP_OUTM(x, mask, val)               \  argument
9822 …out_dword_masked_ns(HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW4_RING_HP_IN…
9837 #define HWIO_REO_R2_REO2SW4_RING_TP_INM(x, mask)                     \  argument
9838 	in_dword_masked ( HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x), mask) 
9841 #define HWIO_REO_R2_REO2SW4_RING_TP_OUTM(x, mask, val)               \  argument
9844 …out_dword_masked_ns(HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW4_RING_TP_IN…
9859 #define HWIO_REO_R2_REO2SW5_RING_HP_INM(x, mask)                     \  argument
9860 	in_dword_masked ( HWIO_REO_R2_REO2SW5_RING_HP_ADDR(x), mask) 
9863 #define HWIO_REO_R2_REO2SW5_RING_HP_OUTM(x, mask, val)               \  argument
9866 …out_dword_masked_ns(HWIO_REO_R2_REO2SW5_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW5_RING_HP_IN…
9881 #define HWIO_REO_R2_REO2SW5_RING_TP_INM(x, mask)                     \  argument
9882 	in_dword_masked ( HWIO_REO_R2_REO2SW5_RING_TP_ADDR(x), mask) 
9885 #define HWIO_REO_R2_REO2SW5_RING_TP_OUTM(x, mask, val)               \  argument
9888 …out_dword_masked_ns(HWIO_REO_R2_REO2SW5_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW5_RING_TP_IN…
9903 #define HWIO_REO_R2_REO2SW6_RING_HP_INM(x, mask)                     \  argument
9904 	in_dword_masked ( HWIO_REO_R2_REO2SW6_RING_HP_ADDR(x), mask) 
9907 #define HWIO_REO_R2_REO2SW6_RING_HP_OUTM(x, mask, val)               \  argument
9910 …out_dword_masked_ns(HWIO_REO_R2_REO2SW6_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW6_RING_HP_IN…
9925 #define HWIO_REO_R2_REO2SW6_RING_TP_INM(x, mask)                     \  argument
9926 	in_dword_masked ( HWIO_REO_R2_REO2SW6_RING_TP_ADDR(x), mask) 
9929 #define HWIO_REO_R2_REO2SW6_RING_TP_OUTM(x, mask, val)               \  argument
9932 …out_dword_masked_ns(HWIO_REO_R2_REO2SW6_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW6_RING_TP_IN…
9947 #define HWIO_REO_R2_REO2TCL_RING_HP_INM(x, mask)                     \  argument
9948 	in_dword_masked ( HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x), mask) 
9951 #define HWIO_REO_R2_REO2TCL_RING_HP_OUTM(x, mask, val)               \  argument
9954 …out_dword_masked_ns(HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2TCL_RING_HP_IN…
9969 #define HWIO_REO_R2_REO2TCL_RING_TP_INM(x, mask)                     \  argument
9970 	in_dword_masked ( HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x), mask) 
9973 #define HWIO_REO_R2_REO2TCL_RING_TP_OUTM(x, mask, val)               \  argument
9976 …out_dword_masked_ns(HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2TCL_RING_TP_IN…
9991 #define HWIO_REO_R2_REO2FW_RING_HP_INM(x, mask)                      \  argument
9992 	in_dword_masked ( HWIO_REO_R2_REO2FW_RING_HP_ADDR(x), mask) 
9995 #define HWIO_REO_R2_REO2FW_RING_HP_OUTM(x, mask, val)                \  argument
9998 …out_dword_masked_ns(HWIO_REO_R2_REO2FW_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2FW_RING_HP_IN(x…
10013 #define HWIO_REO_R2_REO2FW_RING_TP_INM(x, mask)                      \  argument
10014 	in_dword_masked ( HWIO_REO_R2_REO2FW_RING_TP_ADDR(x), mask) 
10017 #define HWIO_REO_R2_REO2FW_RING_TP_OUTM(x, mask, val)                \  argument
10020 …out_dword_masked_ns(HWIO_REO_R2_REO2FW_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2FW_RING_TP_IN(x…
10035 #define HWIO_REO_R2_REO_RELEASE_RING_HP_INM(x, mask)                 \  argument
10036 	in_dword_masked ( HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x), mask) 
10039 #define HWIO_REO_R2_REO_RELEASE_RING_HP_OUTM(x, mask, val)           \  argument
10042 …out_dword_masked_ns(HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO_RELEASE_RI…
10057 #define HWIO_REO_R2_REO_RELEASE_RING_TP_INM(x, mask)                 \  argument
10058 	in_dword_masked ( HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x), mask) 
10061 #define HWIO_REO_R2_REO_RELEASE_RING_TP_OUTM(x, mask, val)           \  argument
10064 …out_dword_masked_ns(HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO_RELEASE_RI…
10079 #define HWIO_REO_R2_REO_STATUS_RING_HP_INM(x, mask)                  \  argument
10080 	in_dword_masked ( HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x), mask) 
10083 #define HWIO_REO_R2_REO_STATUS_RING_HP_OUTM(x, mask, val)            \  argument
10086 …out_dword_masked_ns(HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO_STATUS_RING…
10101 #define HWIO_REO_R2_REO_STATUS_RING_TP_INM(x, mask)                  \  argument
10102 	in_dword_masked ( HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x), mask) 
10105 #define HWIO_REO_R2_REO_STATUS_RING_TP_OUTM(x, mask, val)            \  argument
10108 …out_dword_masked_ns(HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO_STATUS_RING…