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/linux-6.12.1/arch/arm/mach-davinci/
Dda850.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI DA850/OMAP-L138 chip specific setup
5 * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com/
7 * Derived from: arch/arm/mach-davinci/da830.c
16 #include <linux/mfd/da8xx-cfgchip.h>
20 #include <clocksource/timer-davinci.h>
47 MUX_CFG(DA850, NUART0_CTS, 3, 24, 15, 2, false)
48 MUX_CFG(DA850, NUART0_RTS, 3, 28, 15, 2, false)
49 MUX_CFG(DA850, UART0_RXD, 3, 16, 15, 2, false)
50 MUX_CFG(DA850, UART0_TXD, 3, 20, 15, 2, false)
[all …]
/linux-6.12.1/arch/powerpc/crypto/
Daes-gcm-p10.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 # Accelerated AES-GCM stitched implementation for ppc64le.
5 # Copyright 2022- IBM Inc. All rights reserved
22 # Hash keys = v3 - v14
29 # v31 - counter 1
32 # vs0 - vs14 for round keys
35 # This implementation uses stitched AES-GCM approach to improve overall performance.
48 # v15 - v18 - input states
49 # vs1 - vs9 - round keys
52 xxlor 19+32, 1, 1
[all …]
Dchacha-p10le-8x.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
14 # 1. a += b; d ^= a; d <<<= 16;
43 #include <asm/asm-offsets.h>
44 #include <asm/asm-compat.h>
80 std 0, 16(1)
81 stdu 1,-752(1)
83 SAVE_GPR 14, 112, 1
84 SAVE_GPR 15, 120, 1
85 SAVE_GPR 16, 128, 1
[all …]
Dpoly1305-p10le_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
10 # Poly1305 - this version mainly using vector/VSX/Scalar
11 # - 26 bits limbs
12 # - Handle multiple 64 byte blcok.
17 # p = 2^130 - 5
25 # 07/22/21 - this revison based on the above sum of products. Setup r^4, r^3, r^2, r and s3, s2, …
29 # vs [r^1, r^3, r^2, r^4]
56 #include <asm/asm-offsets.h>
57 #include <asm/asm-compat.h>
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/linux-6.12.1/include/linux/mfd/wm831x/
Dotp.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/linux/mfd/wm831x/otp.h -- OTP interface for WM831x
17 * R30720 (0x7800) - Unique ID 1
19 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
20 #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
21 #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
24 * R30721 (0x7801) - Unique ID 2
26 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
27 #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
28 #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
[all …]
Dregulator.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/mfd/wm831x/regulator.h -- Regulator definitons for wm831x
14 * R16462 (0x404E) - Current Sink 1
18 #define WM831X_CS1_ENA_SHIFT 15 /* CS1_ENA */
19 #define WM831X_CS1_ENA_WIDTH 1 /* CS1_ENA */
23 #define WM831X_CS1_DRIVE_WIDTH 1 /* CS1_DRIVE */
27 #define WM831X_CS1_SLPENA_WIDTH 1 /* CS1_SLPENA */
28 #define WM831X_CS1_OFF_RAMP_MASK 0x0C00 /* CS1_OFF_RAMP - [11:10] */
29 #define WM831X_CS1_OFF_RAMP_SHIFT 10 /* CS1_OFF_RAMP - [11:10] */
30 #define WM831X_CS1_OFF_RAMP_WIDTH 2 /* CS1_OFF_RAMP - [11:10] */
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/linux-6.12.1/sound/soc/codecs/
Dwm5100.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * wm5100.h -- WM5100 ALSA SoC Audio driver
18 #define WM5100_CLK_AIF1 1
27 #define WM5100_CLKSRC_MCLK2 1
36 #define WM5100_FLL1 1
891 * R0 (0x00) - software reset
893 #define WM5100_SW_RST_DEV_ID1_MASK 0xFFFF /* SW_RST_DEV_ID1 - [15:0] */
894 #define WM5100_SW_RST_DEV_ID1_SHIFT 0 /* SW_RST_DEV_ID1 - [15:0] */
895 #define WM5100_SW_RST_DEV_ID1_WIDTH 16 /* SW_RST_DEV_ID1 - [15:0] */
898 * R1 (0x01) - Device Revision
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Dwm9081.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * wm9081.c -- WM9081 ALSA SoC Audio driver
18 #define WM9081_SYSCLK_MCLK 1 /* Use MCLK without FLL */
88 * R0 (0x00) - Software Reset
90 #define WM9081_SW_RST_DEV_ID1_MASK 0xFFFF /* SW_RST_DEV_ID1 - [15:0] */
91 #define WM9081_SW_RST_DEV_ID1_SHIFT 0 /* SW_RST_DEV_ID1 - [15:0] */
92 #define WM9081_SW_RST_DEV_ID1_WIDTH 16 /* SW_RST_DEV_ID1 - [15:0] */
95 * R2 (0x02) - Analogue Lineout
100 #define WM9081_LINEOUT_MUTE_WIDTH 1 /* LINEOUT_MUTE */
104 #define WM9081_LINEOUTZC_WIDTH 1 /* LINEOUTZC */
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Drt5660.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5660.h -- RT5660 ALSA SoC audio driver
20 /* I/O - Output */
23 /* I/O - Input */
26 /* I/O - ADC/DAC/DMIC */
30 /* Mixer - D-D */
35 /* Mixer - ADC */
40 /* Mixer - DAC */
61 /* Format - ADC/DAC */
66 /* Function - Analog */
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Dwm8995.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * wm8995.h -- WM8995 ALSA SoC Audio driver
753 * R0 (0x00) - Software Reset
755 #define WM8995_SW_RESET_MASK 0xFFFF /* SW_RESET - [15:0] */
756 #define WM8995_SW_RESET_SHIFT 0 /* SW_RESET - [15:0] */
757 #define WM8995_SW_RESET_WIDTH 16 /* SW_RESET - [15:0] */
760 * R1 (0x01) - Power Management (1)
765 #define WM8995_MICB2_ENA_WIDTH 1 /* MICB2_ENA */
769 #define WM8995_MICB1_ENA_WIDTH 1 /* MICB1_ENA */
773 #define WM8995_HPOUT2L_ENA_WIDTH 1 /* HPOUT2L_ENA */
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Dwm2200.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * wm2200.h - WM2200 audio codec interface
12 #define WM2200_CLK_SYSCLK 1
15 #define WM2200_CLKSRC_MCLK2 1
20 #define WM2200_FLL_SRC_MCLK2 1
529 * R0 (0x00) - software reset
531 #define WM2200_SW_RESET_CHIP_ID1_MASK 0xFFFF /* SW_RESET_CHIP_ID1 - [15:0] */
532 #define WM2200_SW_RESET_CHIP_ID1_SHIFT 0 /* SW_RESET_CHIP_ID1 - [15:0] */
533 #define WM2200_SW_RESET_CHIP_ID1_WIDTH 16 /* SW_RESET_CHIP_ID1 - [15:0] */
536 * R1 (0x01) - Device Revision
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Dwm8962.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * wm8962.h -- WM8962 ASoC driver
17 #define WM8962_SYSCLK_FLL 1
20 #define WM8962_FLL 1
22 #define WM8962_FLL_MCLK 1
1178 * R0 (0x00) - Left Input volume
1183 #define WM8962_IN_VU_WIDTH 1 /* IN_VU */
1187 #define WM8962_INPGAL_MUTE_WIDTH 1 /* INPGAL_MUTE */
1191 #define WM8962_INL_ZC_WIDTH 1 /* INL_ZC */
1192 #define WM8962_INL_VOL_MASK 0x003F /* INL_VOL - [5:0] */
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/linux-6.12.1/arch/arm64/include/asm/
Dapple_m1_pmu.h1 // SPDX-License-Identifier: GPL-2.0
10 #define SYS_IMP_APL_PMC0_EL1 sys_reg(3, 2, 15, 0, 0)
11 #define SYS_IMP_APL_PMC1_EL1 sys_reg(3, 2, 15, 1, 0)
12 #define SYS_IMP_APL_PMC2_EL1 sys_reg(3, 2, 15, 2, 0)
13 #define SYS_IMP_APL_PMC3_EL1 sys_reg(3, 2, 15, 3, 0)
14 #define SYS_IMP_APL_PMC4_EL1 sys_reg(3, 2, 15, 4, 0)
15 #define SYS_IMP_APL_PMC5_EL1 sys_reg(3, 2, 15, 5, 0)
16 #define SYS_IMP_APL_PMC6_EL1 sys_reg(3, 2, 15, 6, 0)
17 #define SYS_IMP_APL_PMC7_EL1 sys_reg(3, 2, 15, 7, 0)
18 #define SYS_IMP_APL_PMC8_EL1 sys_reg(3, 2, 15, 9, 0)
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/linux-6.12.1/drivers/gpu/drm/display/
Ddrm_dsc_helper.c1 // SPDX-License-Identifier: MIT
35 * drm_dsc_dp_pps_header_init() - Initializes the PPS Header
49 pps_header->HB1 = DP_SDP_PPS; in drm_dsc_dp_pps_header_init()
50 pps_header->HB2 = DP_SDP_PPS_HEADER_PAYLOAD_BYTES_MINUS_1; in drm_dsc_dp_pps_header_init()
55 * drm_dsc_dp_rc_buffer_size - get rc buffer size in bytes
57 * @rc_buffer_size: number of blocks - 1, according to DPCD offset 63h
64 int size = 1024 * (rc_buffer_size + 1); in drm_dsc_dp_rc_buffer_size()
68 return 1 * size; in drm_dsc_dp_rc_buffer_size()
82 * drm_dsc_pps_payload_pack() - Populates the DSC PPS
96 * that span more than 1 byte.
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/linux-6.12.1/tools/testing/selftests/hid/tests/
Dtest_multitouch.py2 # SPDX-License-Identifier: GPL-2.0
3 # -*- coding: utf-8 -*-
20 KERNEL_MODULE = ("hid-multitouch", "hid_multitouch")
24 return 1 << x
29 "SLOT_IS_CONTACTID": BIT(1),
43 "TOUCH_SIZE_SCALING": BIT(15),
65 self.tippressure = 15
109 input_info=(BusType.USB, 1, 2), argument
130 self.max_contacts = 1
155 self.scantime += 1
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Dtest_tablet.py2 # SPDX-License-Identifier: GPL-2.0
3 # -*- coding: utf-8 -*-
43 https://docs.microsoft.com/en-us/windows-hardware/design/component-guidelines/windows-pen-states
66 def from_evdev(cls, evdev, test_button) -> "PenState":
99 ) -> "PenState":
146 def valid_transitions(self) -> Tuple["PenState", ...]:
206 def historically_tolerated_transitions(self) -> Tuple["PenState", ...]:
208 for skipping the in-range state, due to historical reasons.
271 def legal_transitions() -> Dict[str, Tuple["PenState", ...]]:
273 we don't have Invert nor Erase bits, so just move in/out-of-range or proximity.
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/linux-6.12.1/tools/accounting/
Dgetdelays.c1 // SPDX-License-Identifier: GPL-2.0
4 * Utility to get per-pid and per-tgid delay accounting statistics
12 * gcc -I/usr/src/linux/include getdelays.c -o getdelays
38 #define GENLMSG_PAYLOAD(glh) (NLMSG_PAYLOAD(glh, 0) - GENL_HDRLEN)
40 #define NLA_PAYLOAD(len) (len - NLA_HDRLEN)
76 fprintf(stderr, "getdelays [-dilv] [-w logfile] [-r bufsize] " in usage()
77 "[-m cpumask] [-t tgid] [-p pid]\n"); in usage()
78 fprintf(stderr, " -d: print delayacct stats\n"); in usage()
79 fprintf(stderr, " -i: print IO accounting (works only with -p)\n"); in usage()
80 fprintf(stderr, " -l: listen forever\n"); in usage()
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/linux-6.12.1/lib/zstd/compress/
Dclevels.h5 * This source code is licensed under both the BSD-style license (found in the
8 * You may select, at your option, one of the above-listed licenses.
17 /*-===== Pre-defined compression levels =====-*/
23 static const ZSTD_compressionParameters ZSTD_defaultCParameters[4][ZSTD_MAX_CLEVEL+1] = {
24 { /* "default" - for any srcSize > 256 KB */
26 { 19, 12, 13, 1, 6, 1, ZSTD_fast }, /* base for negative levels */
27 { 19, 13, 14, 1, 7, 0, ZSTD_fast }, /* level 1 */
28 { 20, 15, 16, 1, 6, 0, ZSTD_fast }, /* level 2 */
29 { 21, 16, 17, 1, 5, 0, ZSTD_dfast }, /* level 3 */
30 { 21, 18, 18, 1, 5, 0, ZSTD_dfast }, /* level 4 */
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/linux-6.12.1/arch/s390/include/asm/
Dfpu-insn-asm.h1 /* SPDX-License-Identifier: GPL-2.0 */
16 #error only <asm/fpu-insn.h> can be included directly
23 /* GR_NUM - Retrieve general-purpose register number
34 \opd = 1
76 \opd = 15
83 /* VX_NUM - Retrieve vector register number
98 \opd = 1
140 \opd = 15
195 /* RXB - Compute most significant bit used vector registers
200 * are stored in instruction bits 8-11.
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/linux-6.12.1/drivers/gpu/drm/mediatek/
Dmtk_dp_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2019-2022 MediaTek Inc.
11 #define MTK_DP_HPD_DISCONNECT BIT(1)
21 #define DA_XTP_GLB_CKDET_EN_FORCE_VAL BIT(15)
35 #define DA_XTP_GLB_LDO_EN_FORCE_VAL BIT(1)
38 #define RG_XTP_LN0_TX_IMPSEL_PMOS GENMASK(15, 12)
41 #define RG_XTP_LN1_TX_IMPSEL_PMOS GENMASK(15, 12)
44 #define RG_XTP_LN2_TX_IMPSEL_PMOS GENMASK(15, 12)
47 #define RG_XTP_LN3_TX_IMPSEL_PMOS GENMASK(15, 12)
51 #define RG_XTP_GLB_CKDET_EN BIT(1)
[all …]
/linux-6.12.1/arch/arm64/crypto/
Dsha512-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * sha512-ce-core.S - core SHA-384/SHA-512 transform using v8 Crypto Extensions
15 .irp b,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19
37 * The SHA-512 round constants
111 ld1 {v8.2d-v11.2d}, [x0]
115 ld1 {v20.2d-v23.2d}, [x3], #64
118 0: ld1 {v12.2d-v15.2d}, [x1], #64
119 ld1 {v16.2d-v19.2d}, [x1], #64
120 sub w2, w2, #1
138 // v0 ab cd -- ef gh ab
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/linux-6.12.1/drivers/video/fbdev/
Datafb_iplan2p4.c2 * linux/drivers/video/iplan2p4.c -- Low level frame buffer operations for
46 if (!((sx ^ dx) & 15)) { in atafb_iplan2p4_copyarea()
47 /* odd->odd or even->even */ in atafb_iplan2p4_copyarea()
50 src = (u8 *)info->screen_base + sy * next_line + (sx & ~15) / (8 / BPL); in atafb_iplan2p4_copyarea()
51 dst = (u8 *)info->screen_base + dy * next_line + (dx & ~15) / (8 / BPL); in atafb_iplan2p4_copyarea()
52 if (sx & 15) { in atafb_iplan2p4_copyarea()
53 memmove32_col(dst, src, 0xff00ff, height, next_line - BPL * 2); in atafb_iplan2p4_copyarea()
56 width -= 8; in atafb_iplan2p4_copyarea()
63 l = next_line - w * 4; in atafb_iplan2p4_copyarea()
64 for (j = height; j > 0; j--) { in atafb_iplan2p4_copyarea()
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/linux-6.12.1/arch/csky/kernel/probes/
Dsimulate-insn.c1 // SPDX-License-Identifier: GPL-2.0+
7 #include "decode-insn.h"
8 #include "simulate-insn.h"
15 *ptr = *(&regs->a0 + index); in csky_insn_reg_get_val()
17 if (index > 15 && index < 31) in csky_insn_reg_get_val()
18 *ptr = *(&regs->exregs[0] + index - 16); in csky_insn_reg_get_val()
22 *ptr = regs->usp; in csky_insn_reg_get_val()
24 case 15: in csky_insn_reg_get_val()
25 *ptr = regs->lr; in csky_insn_reg_get_val()
28 *ptr = regs->tls; in csky_insn_reg_get_val()
[all …]
/linux-6.12.1/drivers/gpu/drm/i915/display/
Dintel_qp_tables.c1 // SPDX-License-Identifier: MIT
27 /* from BPP 4 to 15 in steps of 0.5 */
41 { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
43 { 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
45 { 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
47 { 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1,
48 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
49 { 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1,
50 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0 },
51 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1,
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/linux-6.12.1/Documentation/ABI/testing/
Dsysfs-class-rapidio3 On-chip RapidIO controllers and PCIe-to-RapidIO bridges
15 KernelVersion: v3.15
21 0 = small (8-bit destination ID, max. 256 devices),
23 1 = large (16-bit destination ID, max. 65536 devices).
27 KernelVersion: v3.15
46 [rio@rapidio ~]$ ls /sys/class/rapidio_port/rapidio0/ -l
48 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0001
49 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0004
50 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0007
51 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:s:0002
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