soc/codecs/rt5660.h

1 /* SPDX-License-Identifier: GPL-2.0-only */
3  * rt5660.h  --  RT5660 ALSA SoC audio driver
20 /*  I/O - Output */
23 /* I/O - Input */
26 /* I/O - ADC/DAC/DMIC */
30 /* Mixer - D-D */
35 /* Mixer - ADC */
40 /* Mixer - DAC */
61 /* Format - ADC/DAC */
66 /* Function - Analog */
89 /* Function - Digital */
133 #define RT5660_L_MUTE				(0x1 << 15)
134 #define RT5660_L_MUTE_SFT			15
147 #define RT5660_IN_DF1				(0x1 << 15)
148 #define RT5660_IN_SFT1				15
157 #define RT5660_IN_DF3				(0x1 << 15)
158 #define RT5660_IN_SFT3				15
169 #define RT5660_DAC_R1_VOL_MASK			(0x7f << 1)
170 #define RT5660_DAC_R1_VOL_SFT			1
175 #define RT5660_ADC_R_VOL_MASK			(0x3f << 1)
176 #define RT5660_ADC_R_VOL_SFT			1
195 #define RT5660_M_ADCMIX_L			(0x1 << 15)
196 #define RT5660_M_ADCMIX_L_SFT			15
217 #define RT5660_M_DAC_L1_STO_R			(0x1 << 1)
218 #define RT5660_M_DAC_L1_STO_R_SFT		1
228 /* REC Left Mixer Control 1 (0x3b) */
231 #define RT5660_G_BST2_RM_L_MASK			(0x7 << 1)
232 #define RT5660_G_BST2_RM_L_SFT			1
243 #define RT5660_M_BST1_RM_L			(0x1 << 1)
244 #define RT5660_M_BST1_RM_L_SFT			1
248 /* REC Right Mixer Control 1 (0x3d) */
251 #define RT5660_G_BST2_RM_R_MASK			(0x7 << 1)
252 #define RT5660_G_BST2_RM_R_SFT			1
263 #define RT5660_M_BST1_RM_R			(0x1 << 1)
264 #define RT5660_M_BST1_RM_R_SFT			1
293 #define RT5660_M_OM_L_SM			(0x1 << 1)
294 #define RT5660_M_OM_L_SM_SFT			1
306 /* Output Left Mixer Control 1 (0x4d) */
313 #define RT5660_G_RM_L_OM_L_MASK			(0x7 << 1)
314 #define RT5660_G_RM_L_OM_L_SFT			1
331 #define RT5660_M_DAC_R_OM_L			(0x1 << 1)
332 #define RT5660_M_DAC_R_OM_L_SFT			1
336 /* Output Right Mixer Control 1 (0x50) */
341 #define RT5660_G_RM_R_OM_R_MASK			(0x7 << 1)
342 #define RT5660_G_RM_R_OM_R_SFT			1
357 #define RT5660_M_DAC_L_OM_R			(0x1 << 1)
358 #define RT5660_M_DAC_L_OM_R_SFT			1
362 /* Power Management for Digital 1 (0x61) */
363 #define RT5660_PWR_I2S1				(0x1 << 15)
364 #define RT5660_PWR_I2S1_BIT			15
371 #define RT5660_PWR_ADC_R			(0x1 << 1)
372 #define RT5660_PWR_ADC_R_BIT			1
377 #define RT5660_PWR_ADC_S1F			(0x1 << 15)
378 #define RT5660_PWR_ADC_S1F_BIT			15
382 /* Power Management for Analog 1 (0x63) */
383 #define RT5660_PWR_VREF1			(0x1 << 15)
384 #define RT5660_PWR_VREF1_BIT			15
405 #define RT5660_PWR_BST1				(0x1 << 15)
406 #define RT5660_PWR_BST1_BIT			15
419 #define RT5660_PWR_OM_L				(0x1 << 15)
420 #define RT5660_PWR_OM_L_BIT			15
431 #define RT5660_PWR_SV				(0x1 << 15)
432 #define RT5660_PWR_SV_BIT			15
439 #define RT5660_I2S_MS_MASK			(0x1 << 15)
440 #define RT5660_I2S_MS_SFT			15
441 #define RT5660_I2S_MS_M				(0x0 << 15)
442 #define RT5660_I2S_MS_S				(0x1 << 15)
470 /* ADC/DAC Clock Control 1 (0x73) */
471 #define RT5660_I2S_BCLK_MS1_MASK		(0x1 << 15)
472 #define RT5660_I2S_BCLK_MS1_SFT			15
473 #define RT5660_I2S_BCLK_MS1_32			(0x0 << 15)
474 #define RT5660_I2S_BCLK_MS1_64			(0x1 << 15)
509 #define RT5660_DMIC_1_EN_MASK			(0x1 << 15)
510 #define RT5660_DMIC_1_EN_SFT			15
511 #define RT5660_DMIC_1_DIS			(0x0 << 15)
512 #define RT5660_DMIC_1_EN			(0x1 << 15)
546 /* PLL M/N/K Code Control 1 (0x81) */
577 /* Lout Amp Control 1 (0x8e) */
588 #define RT5660_SPKVDD_DET_MASK			(0x1 << 15)
589 #define RT5660_SPKVDD_DET_SFT			15
590 #define RT5660_SPKVDD_DET_DIS			(0x0 << 15)
591 #define RT5660_SPKVDD_DET_EN			(0x1 << 15)
598 #define RT5660_MIC1_BS_MASK			(0x1 << 15)
599 #define RT5660_MIC1_BS_SFT			15
600 #define RT5660_MIC1_BS_9AV			(0x0 << 15)
601 #define RT5660_MIC1_BS_75AV			(0x1 << 15)
629 /* EQ Control 1 (0xb0) */
630 #define RT5660_EQ_SRC_MASK			(0x1 << 15)
631 #define RT5660_EQ_SRC_SFT			15
632 #define RT5660_EQ_SRC_DAC			(0x0 << 15)
633 #define RT5660_EQ_SRC_ADC			(0x1 << 15)
660 /* IRQ Control 1 (0xbd) */
661 #define RT5660_IRQ_JD_MASK			(0x1 << 15)
662 #define RT5660_IRQ_JD_SFT			15
663 #define RT5660_IRQ_JD_BP			(0x0 << 15)
664 #define RT5660_IRQ_JD_NOR			(0x1 << 15)
687 #define RT5660_IRQ_MB1_OC_MASK			(0x1 << 15)
688 #define RT5660_IRQ_MB1_OC_SFT			15
689 #define RT5660_IRQ_MB1_OC_BP			(0x0 << 15)
690 #define RT5660_IRQ_MB1_OC_NOR			(0x1 << 15)
716 /* GPIO Control 1 (0xc0) */
748 #define RT5660_GP1_OUT_MASK			(0x1 << 1)
749 #define RT5660_GP1_OUT_SFT			1
750 #define RT5660_GP1_OUT_LO			(0x0 << 1)
751 #define RT5660_GP1_OUT_HI			(0x1 << 1)
757 /* Soft volume and zero cross control 1 (0xd9) */
758 #define RT5660_SV_MASK				(0x1 << 15)
759 #define RT5660_SV_SFT				15
760 #define RT5660_SV_DIS				(0x0 << 15)
761 #define RT5660_SV_EN				(0x1 << 15)
782 #define RT5660_ZCD_SPO_MASK			(0x1 << 15)
783 #define RT5660_ZCD_SPO_SFT			15
784 #define RT5660_ZCD_SPO_DIS			(0x0 << 15)
785 #define RT5660_ZCD_SPO_EN			(0x1 << 15)
807 /* General Control 1 (0xfa) */
812 #define RT5660_POW_CLKDET			(0x1 << 1)
818 #define RT5660_SCLK_S_PLL1			1
823 #define RT5660_PLL1_S_BCLK			1