Lines Matching +full:1 +full:- +full:15
1 // SPDX-License-Identifier: GPL-2.0+
7 #include "decode-insn.h"
8 #include "simulate-insn.h"
15 *ptr = *(®s->a0 + index); in csky_insn_reg_get_val()
17 if (index > 15 && index < 31) in csky_insn_reg_get_val()
18 *ptr = *(®s->exregs[0] + index - 16); in csky_insn_reg_get_val()
22 *ptr = regs->usp; in csky_insn_reg_get_val()
24 case 15: in csky_insn_reg_get_val()
25 *ptr = regs->lr; in csky_insn_reg_get_val()
28 *ptr = regs->tls; in csky_insn_reg_get_val()
44 *(®s->a0 + index) = val; in csky_insn_reg_set_val()
46 if (index > 15 && index < 31) in csky_insn_reg_set_val()
47 *(®s->exregs[0] + index - 16) = val; in csky_insn_reg_set_val()
51 regs->usp = val; in csky_insn_reg_set_val()
53 case 15: in csky_insn_reg_set_val()
54 regs->lr = val; in csky_insn_reg_set_val()
57 regs->tls = val; in csky_insn_reg_set_val()
72 addr + sign_extend32((opcode & 0x3ff) << 1, 9)); in simulate_br16()
79 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_br32()
85 if (regs->sr & 1) in simulate_bt16()
87 addr + sign_extend32((opcode & 0x3ff) << 1, 9)); in simulate_bt16()
95 if (regs->sr & 1) in simulate_bt32()
97 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_bt32()
105 if (!(regs->sr & 1)) in simulate_bf16()
107 addr + sign_extend32((opcode & 0x3ff) << 1, 9)); in simulate_bf16()
115 if (!(regs->sr & 1)) in simulate_bf32()
117 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_bf32()
149 regs->lr = addr + 2; in simulate_jsr16()
161 regs->lr = addr + 4; in simulate_jsr32()
196 unsigned long *tmp = (unsigned long *)regs->usp; in simulate_pop16()
201 tmp += 1; in simulate_pop16()
205 csky_insn_reg_set_val(regs, 15, *tmp); in simulate_pop16()
206 tmp += 1; in simulate_pop16()
209 regs->usp = (unsigned long)tmp; in simulate_pop16()
211 instruction_pointer_set(regs, regs->lr); in simulate_pop16()
217 unsigned long *tmp = (unsigned long *)regs->usp; in simulate_pop32()
222 tmp += 1; in simulate_pop32()
226 csky_insn_reg_set_val(regs, 15, *tmp); in simulate_pop32()
227 tmp += 1; in simulate_pop32()
232 tmp += 1; in simulate_pop32()
237 tmp += 1; in simulate_pop32()
240 regs->usp = (unsigned long)tmp; in simulate_pop32()
242 instruction_pointer_set(regs, regs->lr); in simulate_pop32()
254 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_bez32()
268 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_bnez32()
281 val -= 1; in simulate_bnezad32()
285 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_bnezad32()
302 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_bhsz32()
317 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_bhz32()
332 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_blsz32()
347 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_blz32()
361 addr + sign_extend32((tmp & 0x3ffffff) << 1, 15)); in simulate_bsr32()
363 regs->lr = addr + 4; in simulate_bsr32()
387 regs->lr = addr + 4; in simulate_jsri32()