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/linux-6.12.1/Documentation/devicetree/bindings/iio/frequency/
Dadi,admv1013.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Antoniu Miclaus <antoniu.miclaus@analog.com>
21 - adi,admv1013
26 spi-max-frequency:
34 clock-names:
36 - const: lo_in
38 vcm-supply:
42 vcc-drv-supply:
[all …]
Dadi,admv1014.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Antoniu Miclaus <antoniu.miclaus@analog.com>
21 - adi,admv1014
26 spi-max-frequency:
32 clock-names:
34 - const: lo_in
38 vcm-supply:
40 Common-mode voltage regulator.
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/linux-6.12.1/drivers/counter/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
31 tristate "ACCES 104-QUAD-8 driver"
37 Say yes here to build support for the ACCES 104-QUAD-8 quadrature
38 encoder counter/interface device family (104-QUAD-8, 104-QUAD-4).
41 operation on the respective count value attribute. The 104-QUAD-8
58 module will be called ftm-quaddec.
69 will be called intel-qep.
79 module will be called interrupt-cnt.
91 module will be called microchip-tcb-capture.
98 SoCs. This IP supports both 16-bit and 32-bit phase counting mode
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Dftm-quaddec.c1 // SPDX-License-Identifier: GPL-2.0
37 if (ftm->big_endian) in ftm_read()
38 *data = ioread32be(ftm->ftm_base + offset); in ftm_read()
40 *data = ioread32(ftm->ftm_base + offset); in ftm_read()
45 if (ftm->big_endian) in ftm_write()
46 iowrite32be(data, ftm->ftm_base + offset); in ftm_write()
48 iowrite32(data, ftm->ftm_base + offset); in ftm_write()
90 /* Select quad mode, reset other fields to zero */ in ftm_quaddec_init()
135 mutex_lock(&ftm->ftm_quaddec_mutex); in ftm_quaddec_set_prescaler()
144 mutex_unlock(&ftm->ftm_quaddec_mutex); in ftm_quaddec_set_prescaler()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/regulator/
Ddlg,da9121.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Adam Ward <Adam.Ward.opensource@diasemi.com>
13 Dialog Semiconductor DA9121 Single-channel 10A double-phase buck converter
14 Dialog Semiconductor DA9122 Double-channel 5A single-phase buck converter
15 Dialog Semiconductor DA9220 Double-channel 3A single-phase buck converter
16 Dialog Semiconductor DA9217 Single-channel 6A double-phase buck converter
17 Dialog Semiconductor DA9130 Single-channel 10A double-phase buck converter
18 Dialog Semiconductor DA9131 Double-channel 5A single-phase buck converter
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/linux-6.12.1/drivers/mtd/spi-nor/
Dsfdp.h1 /* SPDX-License-Identifier: GPL-2.0 */
17 #define SFDP_DWORD(i) ((i) - 1)
56 * Quad Enable Requirements (QER):
57 * - 000b: Device does not have a QE bit. Device detects 1-1-4 and 1-4-4
59 * instruction phase.
60 * - 001b: QE is bit 1 of status register 2. It is set via Write Status with
63 * Writing only one byte to the status register has the side-effect of
67 * - 010b: QE is bit 6 of status register 1. It is set via Write Status with
70 * - 011b: QE is bit 7 of status register 2. It is set via Write status
74 * - 100b: QE is bit 1 of status register 2. It is set via Write Status with
[all …]
Dcore.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mtd/spi-nor.h>
30 * For everything but full-chip erase; probably could be much smaller, but kept
36 * For full-chip erase, calibrated to a 2MB flash (M25P16); should be scaled up
47 * spi_nor_get_cmd_ext() - Get the command opcode extension based on the
60 switch (nor->cmd_ext_type) { in spi_nor_get_cmd_ext()
62 return ~op->cmd.opcode; in spi_nor_get_cmd_ext()
65 return op->cmd.opcode; in spi_nor_get_cmd_ext()
68 dev_err(nor->dev, "Unknown command extension type\n"); in spi_nor_get_cmd_ext()
74 * spi_nor_spimem_setup_op() - Set up common properties of a spi-mem op.
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/linux-6.12.1/drivers/spi/
Dspi-falcon.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #define DRV_NAME "sflash-falcon"
43 /* Dummy Phase Length */
52 /* SCK Rise-edge Position */
58 /* SCK Fall-edge Position */
82 /* 8-bit multiplexed */
100 struct device *dev = &spi->dev; in falcon_sflash_xfer()
101 struct falcon_sflash *priv = spi_controller_get_devdata(spi->controller); in falcon_sflash_xfer()
102 const u8 *txp = t->tx_buf; in falcon_sflash_xfer()
103 u8 *rxp = t->rx_buf; in falcon_sflash_xfer()
[all …]
Dspi-xilinx.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * 2002-2007 (c) MontaVista Software, Inc.
56 #define XSPI_SSR_OFFSET 0x70 /* 32-bit Slave Select Register */
120 if (!xspi->tx_ptr) { in xilinx_spi_tx()
121 xspi->write_fn(0, xspi->regs + XSPI_TXD_OFFSET); in xilinx_spi_tx()
125 switch (xspi->bytes_per_word) { in xilinx_spi_tx()
127 data = *(u8 *)(xspi->tx_ptr); in xilinx_spi_tx()
130 data = *(u16 *)(xspi->tx_ptr); in xilinx_spi_tx()
133 data = *(u32 *)(xspi->tx_ptr); in xilinx_spi_tx()
137 xspi->write_fn(data, xspi->regs + XSPI_TXD_OFFSET); in xilinx_spi_tx()
[all …]
Dspi-rspi.c1 // SPDX-License-Identifier: GPL-2.0
8 * Based on spi-sh.c:
21 #include <linux/dma-mapping.h>
40 #define RSPI_SPND 0x0e /* Next-Access Delay Register */
68 /* SPCR - Control Register */
77 #define SPCR_SPMS 0x01 /* 3-wire Mode (vs. 4-wire) */
78 /* QSPI on R-Car Gen2 only */
79 #define SPCR_WSWAP 0x02 /* Word Swap of read-data for DMAC */
80 #define SPCR_BSWAP 0x01 /* Byte Swap of read-data for DMAC */
82 /* SSLP - Slave Select Polarity Register */
[all …]
Dspi-zynqmp-gqspi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Xilinx Zynq UltraScale+ MPSoC Quad-SPI (QSPI) controller driver
6 * Copyright (C) 2009 - 2015 Xilinx, Inc.
11 #include <linux/dma-mapping.h>
13 #include <linux/firmware/xlnx-zynqmp.h>
23 #include <linux/spi/spi-mem.h>
120 #define GQSPI_TX_FIFO_FILL (GQSPI_TXD_DEPTH -\
161 * struct qspi_platform_data - zynqmp qspi platform data structure
169 * struct zynqmp_qspi - Defines qspi driver instance
215 * zynqmp_gqspi_read - For GQSPI controller read operation
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Dspi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/clk/clk-conf.h>
13 #include <linux/dma-mapping.h>
35 #include <linux/spi/spi-mem.h>
51 spi_controller_put(spi->controller); in spidev_release()
52 kfree(spi->driver_override); in spidev_release()
53 free_percpu(spi->pcpu_statistics); in spidev_release()
63 len = acpi_device_modalias(dev, buf, PAGE_SIZE - 1); in modalias_show()
64 if (len != -ENODEV) in modalias_show()
67 return sysfs_emit(buf, "%s%s\n", SPI_MODULE_PREFIX, spi->modalias); in modalias_show()
[all …]
/linux-6.12.1/Documentation/hwmon/
Dltc2978.rst10 Addresses scanned: -
18 Addresses scanned: -
26 Addresses scanned: -
34 Addresses scanned: -
42 Addresses scanned: -
52 Addresses scanned: -
60 Addresses scanned: -
68 Addresses scanned: -
76 Addresses scanned: -
84 Addresses scanned: -
[all …]
/linux-6.12.1/tools/spi/
Dspidev_test.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Cross-compile with cross-gcc -I/path/to/cross-kernel/include
71 while (length-- > 0) { in hex_dump()
91 * Unescape - process hexadecimal escape character
92 * converts shell input "\x23" -> 0x23
175 printf("Usage: %s [-2348CDFHILMNORSZbdilopsv]\n", prog); in print_usage()
177 " -D --device device to use (default /dev/spidev1.1)\n" in print_usage()
178 " -s --speed max speed (Hz)\n" in print_usage()
179 " -d --delay delay (usec)\n" in print_usage()
180 " -l --loop loopback\n" in print_usage()
[all …]
/linux-6.12.1/drivers/net/ethernet/intel/ice/
Dice_ptp.c1 // SPDX-License-Identifier: GPL-2.0
114 return -EINVAL; in ice_ptp_set_sma_config_e810t()
119 return -EINVAL; in ice_ptp_set_sma_config_e810t()
191 struct ice_hw *hw = &pf->hw; in ice_ptp_set_sma_e810t()
195 return -EOPNOTSUPP; in ice_ptp_set_sma_e810t()
235 return -EOPNOTSUPP; in ice_verify_pin_e810t()
243 return -EOPNOTSUPP; in ice_verify_pin_e810t()
247 return -EOPNOTSUPP; in ice_verify_pin_e810t()
250 return -EOPNOTSUPP; in ice_verify_pin_e810t()
257 * ice_ptp_cfg_tx_interrupt - Configure Tx timestamp interrupt for the device
[all …]
Dice_ptp_hw.c1 // SPDX-License-Identifier: GPL-2.0
25 { "CVL-SDP22", ZL_REF0P, DPLL_PIN_TYPE_INT_OSCILLATOR,
27 { "CVL-SDP20", ZL_REF0N, DPLL_PIN_TYPE_INT_OSCILLATOR,
29 { "C827_0-RCLKA", ZL_REF1P, DPLL_PIN_TYPE_MUX, 0, },
30 { "C827_0-RCLKB", ZL_REF1N, DPLL_PIN_TYPE_MUX, 0, },
35 { "GNSS-1PPS", ZL_REF4P, DPLL_PIN_TYPE_GNSS,
40 { "CVL-SDP22", ZL_REF0P, DPLL_PIN_TYPE_INT_OSCILLATOR,
42 { "CVL-SDP20", ZL_REF0N, DPLL_PIN_TYPE_INT_OSCILLATOR,
44 { "C827_0-RCLKA", ZL_REF1P, DPLL_PIN_TYPE_MUX, },
45 { "C827_0-RCLKB", ZL_REF1N, DPLL_PIN_TYPE_MUX, },
[all …]
Dice_common.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018-2023, Intel Corporation. */
89 * ice_dump_phy_type - helper function to dump phy_type
116 * ice_set_mac_type - Sets MAC type
124 if (hw->vendor_id != PCI_VENDOR_ID_INTEL) in ice_set_mac_type()
125 return -ENODEV; in ice_set_mac_type()
127 switch (hw->device_id) { in ice_set_mac_type()
134 hw->mac_type = ICE_MAC_E810; in ice_set_mac_type()
155 hw->mac_type = ICE_MAC_GENERIC; in ice_set_mac_type()
161 hw->mac_type = ICE_MAC_GENERIC_3K_E825; in ice_set_mac_type()
[all …]
/linux-6.12.1/drivers/usb/gadget/udc/cdns2/
Dcdns2-gadget.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * USBHS-DEV device controller driver header file
14 #include <linux/dma-direction.h>
22 * struct cdns2_ep0_regs - endpoint 0 related registers.
45 /* EP0CS - bitmasks. */
54 /* Send STALL in the data stage phase. */
59 /* EP0FIFO - bitmasks. */
70 * struct cdns2_epx_base - base endpoint registers.
87 /* rxcon/txcon - endpoint control register bitmasks. */
88 /* Endpoint buffering: 0 - single buffering ... 3 - quad buffering. */
[all …]
/linux-6.12.1/sound/usb/
Dquirks-table.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
72 #define QUIRK_COMPOSITE_END { .ifnum = -1 }
127 /* Creative BT-D1 */
146 /* E-Mu 0202 USB */
148 /* E-Mu 0404 USB */
150 /* E-Mu Tracker Pre */
152 /* E-Mu 0204 USB */
214 * Logitech QuickCam: bDeviceClass is vendor-specific, so generic interface
256 YAMAHA_DEVICE(0x100c, "UC-MX"),
257 YAMAHA_DEVICE(0x100d, "UC-KX"),
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/linux-6.12.1/arch/arm/boot/dts/aspeed/
Daspeed-bmc-ibm-blueridge.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/leds/leds-pca955x.h>
8 #include "aspeed-g6.dtsi"
9 #include "ibm-power11-quad.dtsi"
13 compatible = "ibm,blueridge-bmc", "aspeed,ast2600";
35 stdout-path = &uart5;
43 reserved-memory {
[all …]
Daspeed-bmc-ibm-rainier.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "ibm,rainier-bmc", "aspeed,ast2600";
34 stdout-path = &uart5;
43 reserved-memory {
44 #address-cells = <1>;
[all …]
Daspeed-bmc-ibm-fuji.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/leds/leds-pca955x.h>
8 #include "aspeed-g6.dtsi"
9 #include "ibm-power11-quad.dtsi"
13 compatible = "ibm,fuji-bmc", "aspeed,ast2600";
170 stdout-path = &uart5;
178 reserved-memory {
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/powerpc/power9/
Dother.json65 "BriefDescription": "Read-write data cache collisions"
90 "BriefDescription": "D-cache invalidates sent over the reload bus to the core"
200 "BriefDescription": "Read-write data cache collisions"
210phase by either the hardware prefetch mechanism or software prefetch. The sum of this pair subtrac…
280-word boundary, which causes it to require an additional slice than than what normally would be re…
300 "BriefDescription": "I-cache Invalidates sent over the realod bus to the core"
395-word boundary, which causes it to require an additional slice than than what normally would be re…
430 "BriefDescription": "TM Load (fav or non-fav) ran into conflict (failed)"
450 …"BriefDescription": "A TM-ineligible instruction tries to execute inside a transaction and the LSU…
455 "BriefDescription": "D-side L2 MRU touch commands sent to the L2"
[all …]
/linux-6.12.1/drivers/pci/controller/dwc/
Dpci-imx6.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
36 #include "pcie-designware.h"
58 #define to_imx_pcie(x) dev_get_drvdata((x)->dev)
86 #define imx_check_flag(pci, val) (pci->drvdata->flags & val)
143 /* PCIe Port Logic registers (memory-mapped) */
156 /* PHY registers (not memory-mapped) */
193 WARN_ON(imx_pcie->drvdata->variant != IMX8MQ && in imx_pcie_grp_offset()
194 imx_pcie->drvdata->variant != IMX8MQ_EP && in imx_pcie_grp_offset()
[all …]
/linux-6.12.1/arch/mips/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
143 bool "Generic board-agnostic MIPS kernel"
285 Build a generic DT-based kernel image that boots on select
286 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
378 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
379 DECstation porting pages on <http://decstation.unix-ag.org/>.
418 Olivetti M700-10 workstations.
455 bool "Loongson 32-bit family of machines"
458 This enables support for the Loongson-1 family of machines.
460 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
[all …]

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