Lines Matching +full:quad +full:- +full:phase
1 // SPDX-License-Identifier: GPL-2.0-only
10 * 2002-2007 (c) MontaVista Software, Inc.
56 #define XSPI_SSR_OFFSET 0x70 /* 32-bit Slave Select Register */
120 if (!xspi->tx_ptr) { in xilinx_spi_tx()
121 xspi->write_fn(0, xspi->regs + XSPI_TXD_OFFSET); in xilinx_spi_tx()
125 switch (xspi->bytes_per_word) { in xilinx_spi_tx()
127 data = *(u8 *)(xspi->tx_ptr); in xilinx_spi_tx()
130 data = *(u16 *)(xspi->tx_ptr); in xilinx_spi_tx()
133 data = *(u32 *)(xspi->tx_ptr); in xilinx_spi_tx()
137 xspi->write_fn(data, xspi->regs + XSPI_TXD_OFFSET); in xilinx_spi_tx()
138 xspi->tx_ptr += xspi->bytes_per_word; in xilinx_spi_tx()
143 u32 data = xspi->read_fn(xspi->regs + XSPI_RXD_OFFSET); in xilinx_spi_rx()
145 if (!xspi->rx_ptr) in xilinx_spi_rx()
148 switch (xspi->bytes_per_word) { in xilinx_spi_rx()
150 *(u8 *)(xspi->rx_ptr) = data; in xilinx_spi_rx()
153 *(u16 *)(xspi->rx_ptr) = data; in xilinx_spi_rx()
156 *(u32 *)(xspi->rx_ptr) = data; in xilinx_spi_rx()
160 xspi->rx_ptr += xspi->bytes_per_word; in xilinx_spi_rx()
165 void __iomem *regs_base = xspi->regs; in xspi_init_hw()
168 xspi->write_fn(XIPIF_V123B_RESET_MASK, in xspi_init_hw()
173 xspi->write_fn(XSPI_INTR_TX_EMPTY, in xspi_init_hw()
176 xspi->write_fn(0, regs_base + XIPIF_V123B_DGIER_OFFSET); in xspi_init_hw()
178 xspi->write_fn(0xffff, regs_base + XSPI_SSR_OFFSET); in xspi_init_hw()
181 xspi->write_fn(XSPI_CR_MANUAL_SSELECT | XSPI_CR_MASTER_MODE | in xspi_init_hw()
188 struct xilinx_spi *xspi = spi_controller_get_devdata(spi->controller); in xilinx_spi_chipselect()
194 xspi->write_fn(xspi->cs_inactive, xspi->regs + XSPI_SSR_OFFSET); in xilinx_spi_chipselect()
198 /* Set the SPI clock phase and polarity */ in xilinx_spi_chipselect()
199 cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET) & ~XSPI_CR_MODE_MASK; in xilinx_spi_chipselect()
200 if (spi->mode & SPI_CPHA) in xilinx_spi_chipselect()
202 if (spi->mode & SPI_CPOL) in xilinx_spi_chipselect()
204 if (spi->mode & SPI_LSB_FIRST) in xilinx_spi_chipselect()
206 if (spi->mode & SPI_LOOP) in xilinx_spi_chipselect()
208 xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET); in xilinx_spi_chipselect()
210 /* We do not check spi->max_speed_hz here as the SPI clock in xilinx_spi_chipselect()
215 cs = xspi->cs_inactive; in xilinx_spi_chipselect()
219 xspi->write_fn(cs, xspi->regs + XSPI_SSR_OFFSET); in xilinx_spi_chipselect()
228 struct xilinx_spi *xspi = spi_controller_get_devdata(spi->controller); in xilinx_spi_setup_transfer()
230 if (spi->mode & SPI_CS_HIGH) in xilinx_spi_setup_transfer()
231 xspi->cs_inactive &= ~BIT(spi_get_chipselect(spi, 0)); in xilinx_spi_setup_transfer()
233 xspi->cs_inactive |= BIT(spi_get_chipselect(spi, 0)); in xilinx_spi_setup_transfer()
240 struct xilinx_spi *xspi = spi_controller_get_devdata(spi->controller); in xilinx_spi_txrx_bufs()
247 xspi->tx_ptr = t->tx_buf; in xilinx_spi_txrx_bufs()
248 xspi->rx_ptr = t->rx_buf; in xilinx_spi_txrx_bufs()
249 remaining_words = t->len / xspi->bytes_per_word; in xilinx_spi_txrx_bufs()
251 if (xspi->irq >= 0 && in xilinx_spi_txrx_bufs()
252 (xspi->force_irq || remaining_words > xspi->buffer_size)) { in xilinx_spi_txrx_bufs()
256 cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET); in xilinx_spi_txrx_bufs()
257 xspi->write_fn(cr | XSPI_CR_TRANS_INHIBIT, in xilinx_spi_txrx_bufs()
258 xspi->regs + XSPI_CR_OFFSET); in xilinx_spi_txrx_bufs()
260 isr = xspi->read_fn(xspi->regs + XIPIF_V123B_IISR_OFFSET); in xilinx_spi_txrx_bufs()
262 xspi->write_fn(isr, in xilinx_spi_txrx_bufs()
263 xspi->regs + XIPIF_V123B_IISR_OFFSET); in xilinx_spi_txrx_bufs()
265 xspi->write_fn(XIPIF_V123B_GINTR_ENABLE, in xilinx_spi_txrx_bufs()
266 xspi->regs + XIPIF_V123B_DGIER_OFFSET); in xilinx_spi_txrx_bufs()
267 reinit_completion(&xspi->done); in xilinx_spi_txrx_bufs()
275 n_words = min(remaining_words, xspi->buffer_size); in xilinx_spi_txrx_bufs()
278 while (tx_words--) in xilinx_spi_txrx_bufs()
286 xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET); in xilinx_spi_txrx_bufs()
287 wait_for_completion(&xspi->done); in xilinx_spi_txrx_bufs()
294 xspi->write_fn(cr | XSPI_CR_TRANS_INHIBIT, in xilinx_spi_txrx_bufs()
295 xspi->regs + XSPI_CR_OFFSET); in xilinx_spi_txrx_bufs()
298 sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET); in xilinx_spi_txrx_bufs()
304 if (rx_words == n_words && !(stalled--) && in xilinx_spi_txrx_bufs()
307 dev_err(&spi->dev, in xilinx_spi_txrx_bufs()
310 return -EIO; in xilinx_spi_txrx_bufs()
315 rx_words--; in xilinx_spi_txrx_bufs()
319 sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET); in xilinx_spi_txrx_bufs()
322 rx_words--; in xilinx_spi_txrx_bufs()
326 remaining_words -= n_words; in xilinx_spi_txrx_bufs()
330 xspi->write_fn(0, xspi->regs + XIPIF_V123B_DGIER_OFFSET); in xilinx_spi_txrx_bufs()
331 xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET); in xilinx_spi_txrx_bufs()
334 return t->len; in xilinx_spi_txrx_bufs()
349 ipif_isr = xspi->read_fn(xspi->regs + XIPIF_V123B_IISR_OFFSET); in xilinx_spi_irq()
350 xspi->write_fn(ipif_isr, xspi->regs + XIPIF_V123B_IISR_OFFSET); in xilinx_spi_irq()
353 complete(&xspi->done); in xilinx_spi_irq()
369 xspi->write_fn(XIPIF_V123B_RESET_MASK, in xilinx_spi_find_buffer_size()
370 xspi->regs + XIPIF_V123B_RESETR_OFFSET); in xilinx_spi_find_buffer_size()
374 xspi->write_fn(0, xspi->regs + XSPI_TXD_OFFSET); in xilinx_spi_find_buffer_size()
375 sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET); in xilinx_spi_find_buffer_size()
383 { .compatible = "xlnx,axi-quad-spi-1.00.a", },
384 { .compatible = "xlnx,xps-spi-2.00.a", },
385 { .compatible = "xlnx,xps-spi-2.00.b", },
401 pdata = dev_get_platdata(&pdev->dev); in xilinx_spi_probe()
403 num_cs = pdata->num_chipselect; in xilinx_spi_probe()
404 bits_per_word = pdata->bits_per_word; in xilinx_spi_probe()
405 force_irq = pdata->force_irq; in xilinx_spi_probe()
407 of_property_read_u32(pdev->dev.of_node, "xlnx,num-ss-bits", in xilinx_spi_probe()
409 ret = of_property_read_u32(pdev->dev.of_node, in xilinx_spi_probe()
410 "xlnx,num-transfer-bits", in xilinx_spi_probe()
417 dev_err(&pdev->dev, in xilinx_spi_probe()
419 return -EINVAL; in xilinx_spi_probe()
423 dev_err(&pdev->dev, "Invalid number of spi targets\n"); in xilinx_spi_probe()
424 return -EINVAL; in xilinx_spi_probe()
427 host = devm_spi_alloc_host(&pdev->dev, sizeof(struct xilinx_spi)); in xilinx_spi_probe()
429 return -ENODEV; in xilinx_spi_probe()
431 /* the spi->mode bits understood by this driver: */ in xilinx_spi_probe()
432 host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST | SPI_LOOP | in xilinx_spi_probe()
436 xspi->cs_inactive = 0xffffffff; in xilinx_spi_probe()
437 xspi->bitbang.ctlr = host; in xilinx_spi_probe()
438 xspi->bitbang.chipselect = xilinx_spi_chipselect; in xilinx_spi_probe()
439 xspi->bitbang.setup_transfer = xilinx_spi_setup_transfer; in xilinx_spi_probe()
440 xspi->bitbang.txrx_bufs = xilinx_spi_txrx_bufs; in xilinx_spi_probe()
441 init_completion(&xspi->done); in xilinx_spi_probe()
443 xspi->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in xilinx_spi_probe()
444 if (IS_ERR(xspi->regs)) in xilinx_spi_probe()
445 return PTR_ERR(xspi->regs); in xilinx_spi_probe()
447 host->bus_num = pdev->id; in xilinx_spi_probe()
448 host->num_chipselect = num_cs; in xilinx_spi_probe()
449 host->dev.of_node = pdev->dev.of_node; in xilinx_spi_probe()
458 xspi->read_fn = xspi_read32; in xilinx_spi_probe()
459 xspi->write_fn = xspi_write32; in xilinx_spi_probe()
461 xspi->write_fn(XSPI_CR_LOOP, xspi->regs + XSPI_CR_OFFSET); in xilinx_spi_probe()
462 tmp = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET); in xilinx_spi_probe()
465 xspi->read_fn = xspi_read32_be; in xilinx_spi_probe()
466 xspi->write_fn = xspi_write32_be; in xilinx_spi_probe()
469 host->bits_per_word_mask = SPI_BPW_MASK(bits_per_word); in xilinx_spi_probe()
470 xspi->bytes_per_word = bits_per_word / 8; in xilinx_spi_probe()
471 xspi->buffer_size = xilinx_spi_find_buffer_size(xspi); in xilinx_spi_probe()
473 xspi->irq = platform_get_irq(pdev, 0); in xilinx_spi_probe()
474 if (xspi->irq < 0 && xspi->irq != -ENXIO) { in xilinx_spi_probe()
475 return xspi->irq; in xilinx_spi_probe()
476 } else if (xspi->irq >= 0) { in xilinx_spi_probe()
478 ret = devm_request_irq(&pdev->dev, xspi->irq, xilinx_spi_irq, 0, in xilinx_spi_probe()
479 dev_name(&pdev->dev), xspi); in xilinx_spi_probe()
483 xspi->force_irq = force_irq; in xilinx_spi_probe()
489 ret = spi_bitbang_start(&xspi->bitbang); in xilinx_spi_probe()
491 dev_err(&pdev->dev, "spi_bitbang_start FAILED\n"); in xilinx_spi_probe()
495 dev_info(&pdev->dev, "at %pR, irq=%d\n", res, xspi->irq); in xilinx_spi_probe()
498 for (i = 0; i < pdata->num_devices; i++) in xilinx_spi_probe()
499 spi_new_device(host, pdata->devices + i); in xilinx_spi_probe()
510 void __iomem *regs_base = xspi->regs; in xilinx_spi_remove()
512 spi_bitbang_stop(&xspi->bitbang); in xilinx_spi_remove()
515 xspi->write_fn(0, regs_base + XIPIF_V123B_IIER_OFFSET); in xilinx_spi_remove()
517 xspi->write_fn(0, regs_base + XIPIF_V123B_DGIER_OFFSET); in xilinx_spi_remove()
519 spi_controller_put(xspi->bitbang.ctlr); in xilinx_spi_remove()