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/linux-6.12.1/drivers/accel/habanalabs/include/gaudi2/asic_reg/
Dgaudi2_blocks_linux_driver.h16 #define mmDCORE0_TPC0_ROM_TABLE_BASE 0x0ull
17 #define DCORE0_TPC0_ROM_TABLE_MAX_OFFSET 0x1000
18 #define DCORE0_TPC0_ROM_TABLE_SECTION 0x1000
19 #define mmDCORE0_TPC0_EML_SPMU_BASE 0x1000ull
20 #define DCORE0_TPC0_EML_SPMU_MAX_OFFSET 0x1000
21 #define DCORE0_TPC0_EML_SPMU_SECTION 0x1000
22 #define mmDCORE0_TPC0_EML_ETF_BASE 0x2000ull
23 #define DCORE0_TPC0_EML_ETF_MAX_OFFSET 0x1000
24 #define DCORE0_TPC0_EML_ETF_SECTION 0x1000
25 #define mmDCORE0_TPC0_EML_STM_BASE 0x3000ull
[all …]
/linux-6.12.1/arch/arm/mach-omap2/
Dprcm43xx.h15 #define AM43XX_PRM_OCP_SOCKET_INST 0x0000
16 #define AM43XX_PRM_MPU_INST 0x0300
17 #define AM43XX_PRM_GFX_INST 0x0400
18 #define AM43XX_PRM_RTC_INST 0x0500
19 #define AM43XX_PRM_TAMPER_INST 0x0600
20 #define AM43XX_PRM_CEFUSE_INST 0x0700
21 #define AM43XX_PRM_PER_INST 0x0800
22 #define AM43XX_PRM_WKUP_INST 0x2000
23 #define AM43XX_PRM_DEVICE_INST 0x4000
26 #define AM43XX_PRM_IRQSTATUS_MPU_OFFSET 0x0004
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/power/supply/
Dqcom,pm8941-coincell.yaml59 #size-cells = <0>;
63 reg = <0x2800>;
/linux-6.12.1/arch/arm/boot/dts/st/
Dstm32mp153.dtsi36 reg = <0x4400e000 0x400>, <0x44011000 0x1400>;
43 bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
50 reg = <0x4400f000 0x400>, <0x44011000 0x2800>;
57 bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
Dstm32mp133.dtsi13 reg = <0x4400e000 0x400>, <0x44011000 0x1400>;
20 bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
26 reg = <0x4400f000 0x400>, <0x44011000 0x2800>;
33 bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
42 reg = <0x48003000 0x400>;
49 #size-cells = <0>;
53 adc1: adc@0 {
57 #size-cells = <0>;
58 reg = <0x0>;
60 interrupts = <0>;
[all …]
/linux-6.12.1/arch/mips/pci/
Dpci-generic.c14 * addresses to be allocated in the 0x000-0x0ff region
15 * modulo 0x400.
18 * the low 10 bits of the IO address. The 0x00-0xff region
20 * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
21 * but we want to try to avoid allocating at 0x2900-0x2bff
22 * which might have be mirrored at 0x0100-0x03ff..
31 if (res->flags & IORESOURCE_IO && start & 0x300) in pcibios_align_resource()
32 start = (start + 0x3ff) & ~0x3ff; in pcibios_align_resource()
55 if (res->start != 0) { in pci_remap_iospace()
62 return 0; in pci_remap_iospace()
/linux-6.12.1/arch/powerpc/boot/dts/
Dmpc5125twr.dts30 #size-cells = <0>;
32 PowerPC,5125@0 {
34 reg = <0>;
35 d-cache-line-size = <0x20>; // 32 bytes
36 i-cache-line-size = <0x20>; // 32 bytes
37 d-cache-size = <0x8000>; // L1, 32K
38 i-cache-size = <0x8000>; // L1, 32K
47 reg = <0x00000000 0x10000000>; // 256MB at 0
52 reg = <0x30000000 0x08000>; // 32K at 0x30000000
57 #size-cells = <0>;
[all …]
Dmpc5121.dtsi26 #size-cells = <0>;
28 PowerPC,5121@0 {
30 reg = <0>;
31 d-cache-line-size = <0x20>; /* 32 bytes */
32 i-cache-line-size = <0x20>; /* 32 bytes */
33 d-cache-size = <0x8000>; /* L1, 32K */
34 i-cache-size = <0x8000>; /* L1, 32K */
43 reg = <0x00000000 0x10000000>; /* 256MB at 0 */
48 reg = <0x20000000 0x4000>;
49 interrupts = <66 0x8>;
[all …]
/linux-6.12.1/arch/xtensa/kernel/
Dpci.c30 * addresses to be allocated in the 0x000-0x0ff region
31 * modulo 0x400.
34 * the low 10 bits of the IO address. The 0x00-0xff region
36 * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
37 * but we want to try to avoid allocating at 0x2900-0x2bff
38 * which might have be mirrored at 0x0100-0x03ff..
48 if (size > 0x100) { in pcibios_align_resource()
54 if (start & 0x300) in pcibios_align_resource()
55 start = (start + 0x3ff) & ~0x3ff; in pcibios_align_resource()
86 return 0; in pci_iobar_pfn()
/linux-6.12.1/arch/m68k/kernel/
Dpcibios.c19 * addresses to be allocated in the 0x000-0x0ff region
20 * modulo 0x400.
23 * the low 10 bits of the IO address. The 0x00-0xff region
25 * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
26 * but we want to try to avoid allocating at 0x2900-0x2bff
27 * which might be mirrored at 0x0100-0x03ff..
34 if ((res->flags & IORESOURCE_IO) && (start & 0x300)) in pcibios_align_resource()
35 start = (start + 0x3ff) & ~0x3ff; in pcibios_align_resource()
54 for (idx = 0; idx < 6; idx++) { in pcibios_enable_device()
79 pr_info("PCI: enabling device %s (0x%04x -> 0x%04x)\n", in pcibios_enable_device()
[all …]
/linux-6.12.1/drivers/net/wireless/broadcom/brcm80211/include/
Dbrcmu_d11.h20 /* bit 0~7 channel number
21 * for 80+80 channels: bit 0~3 low channel id, bit 4~7 high channel id
23 #define BRCMU_CHSPEC_CH_MASK 0x00ff
24 #define BRCMU_CHSPEC_CH_SHIFT 0
25 #define BRCMU_CHSPEC_CHL_MASK 0x000f
26 #define BRCMU_CHSPEC_CHL_SHIFT 0
27 #define BRCMU_CHSPEC_CHH_MASK 0x00f0
36 #define BRCMU_CHSPEC_D11N_SB_MASK 0x0300
38 #define BRCMU_CHSPEC_D11N_SB_L 0x0100 /* control lower */
39 #define BRCMU_CHSPEC_D11N_SB_U 0x0200 /* control upper */
[all …]
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dpm8998.dtsi34 pm8998_lsid0: pmic@0 {
36 reg = <0x0 SPMI_USID>;
38 #size-cells = <0>;
43 reg = <0x800>;
44 mode-bootloader = <0x2>;
45 mode-recovery = <0x1>;
49 interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
57 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
66 reg = <0x2400>;
67 interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>;
[all …]
/linux-6.12.1/drivers/ufs/host/
Dufs-mediatek.h15 #define MTK_MCQ_INVALID_IRQ 0xFFFF
18 #define EHS_EN BIT(0)
29 #define REG_UFS_XOUFS_CTRL 0x140
30 #define REG_UFS_REFCLK_CTRL 0x144
31 #define REG_UFS_MMIO_OPT_CTRL_0 0x160
32 #define REG_UFS_EXTREG 0x2100
33 #define REG_UFS_MPHYCTRL 0x2200
34 #define REG_UFS_MTK_IP_VER 0x2240
35 #define REG_UFS_REJECT_MON 0x22AC
36 #define REG_UFS_DEBUG_SEL 0x22C0
[all …]
/linux-6.12.1/drivers/tty/serial/8250/
D8250_acorn.c54 info->vaddr = ecardm_iomap(ec, type->type, 0, 0); in serial_card_probe()
62 memset(&uart, 0, sizeof(struct uart_8250_port)); in serial_card_probe()
70 for (i = 0; i < info->num_ports; i++) { in serial_card_probe()
77 return 0; in serial_card_probe()
87 for (i = 0; i < info->num_ports; i++) in serial_card_remove()
88 if (info->ports[i] > 0) in serial_card_remove()
98 .offset = { 0x2800, 0x2400, 0x2000 },
105 .offset = { 0x2000, 0x2020 },
111 { 0xffff, 0xffff }
/linux-6.12.1/include/linux/
Dkbd_kern.h36 #define LED_SHOW_FLAGS 0 /* traditional state */
41 #define VC_SCROLLOCK 0 /* scroll-lock mode */
47 #define VC_XLATE 0 /* translate keycodes using keymap */
54 #define VC_APPLIC 0 /* application key mode */
57 #define VC_CRLF 3 /* 0 - enter sends CR, 1 - enter sends CRLF */
58 #define VC_META 4 /* 0 - meta, 1 - meta=prefix with ESC */
122 #define U(x) ((x) ^ 0xf000)
124 #define BRL_UC_ROW 0x2800
/linux-6.12.1/lib/
Dcrc16.c10 /** CRC table for the CRC-16. The poly is 0x8005 (x^16 + x^15 + x^2 + 1) */
12 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241,
13 0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440,
14 0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40,
15 0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841,
16 0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40,
17 0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41,
18 0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641,
19 0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040,
20 0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240,
[all …]
/linux-6.12.1/drivers/net/ethernet/engleder/
Dtsnep_hw.h12 #define ECM_TYPE 0x0000
13 #define ECM_REVISION_MASK 0x000000FF
14 #define ECM_REVISION_SHIFT 0
15 #define ECM_VERSION_MASK 0x0000FF00
17 #define ECM_QUEUE_COUNT_MASK 0x00070000
19 #define ECM_GATE_CONTROL 0x02000000
22 #define ECM_SYSTEM_TIME_LOW 0x0008
23 #define ECM_SYSTEM_TIME_HIGH 0x000C
26 #define ECM_CLOCK_RATE 0x0010
27 #define ECM_CLOCK_RATE_OFFSET_MASK 0x7FFFFFFF
[all …]
/linux-6.12.1/sound/soc/amd/acp/
Dchip_offset_byte.h14 #define ACPAXI2AXI_ATU_CTRL 0xC40
15 #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_1 0xC00
16 #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_1 0xC04
17 #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_2 0xC08
18 #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_2 0xC0C
19 #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_5 0xC20
20 #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_5 0xC24
22 #define GRP1_OFFSET 0x0
23 #define GRP2_OFFSET 0x4000
25 #define ACP_PGFSM_CONTROL 0x141C
[all …]
/linux-6.12.1/arch/sh/kernel/cpu/sh4a/
Dclock-sh7757.c70 [DIV4_P] = DIV4(0, 0x2800, CLK_ENABLE_ON_INIT),
71 [DIV4_SH] = DIV4(12, 0x00a0, CLK_ENABLE_ON_INIT),
72 [DIV4_I] = DIV4(20, 0x0004, CLK_ENABLE_ON_INIT),
75 #define MSTPCR0 0xffc80030
76 #define MSTPCR1 0xffc80034
77 #define MSTPCR2 0xffc10028
85 [MSTP004] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 4, 0),
86 [MSTP000] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 0, 0),
89 [MSTP127] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 27, 0),
90 [MSTP114] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 14, 0),
[all …]
/linux-6.12.1/drivers/net/wireless/broadcom/b43legacy/
Dilt.c23 0xFEB93FFD, 0xFEC63FFD, /* 0 */
24 0xFED23FFD, 0xFEDF3FFD,
25 0xFEEC3FFE, 0xFEF83FFE,
26 0xFF053FFE, 0xFF113FFE,
27 0xFF1E3FFE, 0xFF2A3FFF, /* 8 */
28 0xFF373FFF, 0xFF443FFF,
29 0xFF503FFF, 0xFF5D3FFF,
30 0xFF693FFF, 0xFF763FFF,
31 0xFF824000, 0xFF8F4000, /* 16 */
32 0xFF9B4000, 0xFFA84000,
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/pci/
Dhisilicon,kirin-pcie.yaml78 reg = <0x0 0xf4000000 0x0 0x1000>,
79 <0x0 0xff3fe000 0x0 0x1000>,
80 <0x0 0xf3f20000 0x0 0x40000>,
81 <0x0 0xf5000000 0x0 0x2000>;
83 bus-range = <0x0 0xff>;
87 ranges = <0x02000000 0x0 0x00000000
88 0x0 0xf6000000
89 0x0 0x02000000>;
92 interrupts = <0 283 4>;
94 interrupt-map-mask = <0xf800 0 0 7>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/amd/
Delba.dtsi20 #clock-cells = <0>;
25 #clock-cells = <0>;
30 #clock-cells = <0>;
35 #clock-cells = <0>;
64 reg = <0x0 0x400 0x0 0x100>;
67 #size-cells = <0>;
75 reg = <0x0 0x1400 0x0 0x100>;
83 reg = <0x0 0x2400 0x0 0x400>,
84 <0x0 0x7fff0000 0x0 0x1000>;
86 #size-cells = <0>;
[all …]
/linux-6.12.1/drivers/net/ethernet/chelsio/cxgb4/
Dcudbg_entity.h9 #define EDC0_FLAG 0
16 #define CUDBG_ENTITY_SIGNATURE 0xCCEDB001
98 /* Memory region info relative to current memory (i.e. wrt 0). */
101 u32 start; /* Start wrt 0 */
102 u32 end; /* End wrt 0 */
223 #define CUDBG_VPD_VER_ADDR 0x18c7
239 #define CUDBG_MAX_TCAM_TID 0x800
245 LE_ET_UNKNOWN = 0,
288 #define CUDBG_CHAC_PBT_ADDR 0x2800
289 #define CUDBG_CHAC_PBT_LRF 0x3000
[all …]
/linux-6.12.1/arch/arm/boot/dts/qcom/
Dpm8941.dtsi11 polling-delay = <0>;
39 pm8941_0: pm8941@0 {
41 reg = <0x0 SPMI_USID>;
43 #size-cells = <0>;
47 reg = <0x6000>,
48 <0x6100>;
50 interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
55 reg = <0x800>;
59 interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
66 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
[all …]
/linux-6.12.1/drivers/gpu/drm/radeon/
Drv730d.h26 #define CG_SPLL_FUNC_CNTL 0x600
27 #define SPLL_RESET (1 << 0)
32 #define SPLL_REF_DIV_MASK (0x3f << 4)
34 #define SPLL_HILEN_MASK (0xf << 12)
36 #define SPLL_LOLEN_MASK (0xf << 16)
37 #define CG_SPLL_FUNC_CNTL_2 0x604
38 #define SCLK_MUX_SEL(x) ((x) << 0)
39 #define SCLK_MUX_SEL_MASK (0x1ff << 0)
40 #define CG_SPLL_FUNC_CNTL_3 0x608
41 #define SPLL_FB_DIV(x) ((x) << 0)
[all …]

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