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/linux-6.12.1/tools/perf/pmu-events/arch/x86/rocketlake/
Dfrontend.json3front end is resteered, mainly when the BPU cannot provide a correct prediction and this is correc…
7 …"PublicDescription": "Counts the number of times the front-end is resteered when it finds a branch…
16 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
21 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE transitions count.",
27 …"PublicDescription": "Counts the number of Decode Stream Buffer (DSB a.k.a. Uop Cache)-to-MITE spe…
32 "BriefDescription": "DSB-to-MITE switch true penalty cycles.",
36 …"PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previou…
48 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
60 …e stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to th…
101 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle",
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/icelakex/
Dfrontend.json3front end is resteered, mainly when the BPU cannot provide a correct prediction and this is correc…
7 …"PublicDescription": "Counts the number of times the front-end is resteered when it finds a branch…
16 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
21 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE transitions count.",
27 …"PublicDescription": "Counts the number of Decode Stream Buffer (DSB a.k.a. Uop Cache)-to-MITE spe…
32 "BriefDescription": "DSB-to-MITE switch true penalty cycles.",
36 …"PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previou…
48 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
60 …e stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to th…
101 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle",
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/icelake/
Dfrontend.json3front end is resteered, mainly when the BPU cannot provide a correct prediction and this is correc…
7 …"PublicDescription": "Counts the number of times the front-end is resteered when it finds a branch…
16 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
21 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE transitions count.",
27 …"PublicDescription": "Counts the number of Decode Stream Buffer (DSB a.k.a. Uop Cache)-to-MITE spe…
32 "BriefDescription": "DSB-to-MITE switch true penalty cycles.",
36 …"PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previou…
48 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
60 …e stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to th…
101 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle",
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/tigerlake/
Dfrontend.json3front end is resteered, mainly when the BPU cannot provide a correct prediction and this is correc…
7 …"PublicDescription": "Counts the number of times the front-end is resteered when it finds a branch…
16 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
21 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE transitions count.",
27 …"PublicDescription": "Counts the number of Decode Stream Buffer (DSB a.k.a. Uop Cache)-to-MITE spe…
32 "BriefDescription": "DSB-to-MITE switch true penalty cycles.",
36 …"PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previou…
48 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
60 …e stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to th…
101 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle",
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/graniterapids/
Dfrontend.json7 …"PublicDescription": "Number of times the front-end is resteered when it finds a branch instructio…
16 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
29 "BriefDescription": "DSB-to-MITE switch true penalty cycles.",
33 …"PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previou…
57 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
69 …e stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to th…
110 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle",
117 …ter an interval where the front-end delivered no uops for a period of at least 1 cycle which was n…
122 … after an interval where the front-end delivered no uops for a period of 128 cycles which was not …
129 … after an interval where the front-end delivered no uops for a period of 128 cycles which was not …
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/emeraldrapids/
Dfrontend.json7 …"PublicDescription": "Number of times the front-end is resteered when it finds a branch instructio…
16 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
29 "BriefDescription": "DSB-to-MITE switch true penalty cycles.",
33 …"PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previou…
45 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
57 …e stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to th…
98 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle",
105 …ter an interval where the front-end delivered no uops for a period of at least 1 cycle which was n…
110 … after an interval where the front-end delivered no uops for a period of 128 cycles which was not …
117 … after an interval where the front-end delivered no uops for a period of 128 cycles which was not …
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/sapphirerapids/
Dfrontend.json7 …"PublicDescription": "Number of times the front-end is resteered when it finds a branch instructio…
16 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
29 "BriefDescription": "DSB-to-MITE switch true penalty cycles.",
33 …"PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previou…
45 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
57 …e stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to th…
98 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle",
105 …ter an interval where the front-end delivered no uops for a period of at least 1 cycle which was n…
110 … after an interval where the front-end delivered no uops for a period of 128 cycles which was not …
117 … after an interval where the front-end delivered no uops for a period of 128 cycles which was not …
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/meteorlake/
Dfrontend.json17 …"PublicDescription": "Number of times the front-end is resteered when it finds a branch instructio…
27 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
42 "BriefDescription": "DSB-to-MITE switch true penalty cycles.",
46 …"PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previou…
72 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
85 …e stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to th…
139 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle",
146 …ter an interval where the front-end delivered no uops for a period of at least 1 cycle which was n…
152 … after an interval where the front-end delivered no uops for a period of 128 cycles which was not …
159 … after an interval where the front-end delivered no uops for a period of 128 cycles which was not …
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/alderlake/
Dfrontend.json17 …"PublicDescription": "Number of times the front-end is resteered when it finds a branch instructio…
27 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
42 "BriefDescription": "DSB-to-MITE switch true penalty cycles.",
46 …"PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previou…
59 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
72 …e stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to th…
117 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle",
124 …ter an interval where the front-end delivered no uops for a period of at least 1 cycle which was n…
130 … after an interval where the front-end delivered no uops for a period of 128 cycles which was not …
137 … after an interval where the front-end delivered no uops for a period of 128 cycles which was not …
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/skylakex/
Dfrontend.json3front end is resteered, mainly when the BPU cannot provide a correct prediction and this is correc…
7 …"PublicDescription": "Counts the number of times the front-end is resteered when it finds a branch…
16 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
21 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switches",
25 …e Decode Stream Buffer (DSB)-to-MITE switches including all misses because of missing Decode Strea…
30 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.",
34-to-MITE switch true penalty cycles. These cycles do not include uops routed through because of th…
46 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
58 …e stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to th…
97 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle",
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/skylake/
Dfrontend.json3front end is resteered, mainly when the BPU cannot provide a correct prediction and this is correc…
7 …"PublicDescription": "Counts the number of times the front-end is resteered when it finds a branch…
16 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
21 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switches",
25 …e Decode Stream Buffer (DSB)-to-MITE switches including all misses because of missing Decode Strea…
30 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.",
34-to-MITE switch true penalty cycles. These cycles do not include uops routed through because of th…
46 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
58 …e stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to th…
97 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle",
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/cascadelakex/
Dfrontend.json3front end is resteered, mainly when the BPU cannot provide a correct prediction and this is correc…
7 …"PublicDescription": "Counts the number of times the front-end is resteered when it finds a branch…
16 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
21 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switches",
25 …e Decode Stream Buffer (DSB)-to-MITE switches including all misses because of missing Decode Strea…
30 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.",
34-to-MITE switch true penalty cycles. These cycles do not include uops routed through because of th…
46 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
58 …e stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to th…
97 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle",
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/silvermont/
Dfrontend.json7front end is resteered, mainly when the Branch Prediction Unit cannot provide a correct prediction…
16front end is resteered, mainly when the Branch Prediction Unit cannot provide a correct prediction…
25front end is resteered, mainly when the Branch Prediction Unit cannot provide a correct prediction…
66 …s entered into a ucode flow in the FEC. Includes inserted flows due to front-end detected faults …
70 …e most common case that this counts is when a micro-coded instruction is encountered by the front
Dpipeline.json107 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp…
116 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp…
126 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp…
136 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp…
146 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp…
156 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp…
206 … For instructions that consist of multiple micro-ops, this event counts exactly once, as the last …
215 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
223front end of the machine is notified that it must restart, so no more instructions will be decoded…
228 "BriefDescription": "Self-Modifying Code detected",
[all …]
/linux-6.12.1/Documentation/admin-guide/
Dpstore-blk.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
10 block device and non-block device before the system crashes. You can get
13 mount -t pstore pstore /sys/fs/pstore
17 ---------------------
27 Configurations for driver are all about block device and non-block device,
31 -----------------------
51 #. /dev/<disk_name><decimal> represents the device number of partition - device
53 #. /dev/<disk_name>p<decimal> - same as the above; this form is used when disk
60 #. PARTUUID=00112233-4455-6677-8899-AABBCCDDEEFF represents the unique id of
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/goldmontplus/
Dpipeline.json229 "BriefDescription": "Instructions retired - using Reduced Skid PEBS feature",
250 …ocation is stalled waiting for a mispredicted jump to retire or other branch-like conditions (e.g.…
259 …ource in the backend. Including but not limited to resources such as the Re-order Buffer (ROB), r…
335 …r of times that the machines clears due to a page fault. Covers both I-side and D-side(Loads/Store…
340 "BriefDescription": "Self-Modifying Code detected",
344 …ction and has to perform a machine clear because of that modification. Self-modifying code (SMC) …
349 "BriefDescription": "Uops issued to the back end per cycle",
353front end and allocated into the back end of the machine. This event counts uops that retire as w…
357 "BriefDescription": "Uops requested but not-delivered to the back-end per cycle",
361front-end inefficiencies. I.e. when front-end of the machine is not delivering uops to the back-en…
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/goldmont/
Dpipeline.json240 …ocation is stalled waiting for a mispredicted jump to retire or other branch-like conditions (e.g.…
249 …ource in the backend. Including but not limited to resources such as the Re-order Buffer (ROB), r…
321 "BriefDescription": "Self-Modifying Code detected",
325 …ction and has to perform a machine clear because of that modification. Self-modifying code (SMC) …
330 "BriefDescription": "Uops issued to the back end per cycle",
334front end and allocated into the back end of the machine. This event counts uops that retire as w…
338 "BriefDescription": "Uops requested but not-delivered to the back-end per cycle",
342front-end inefficiencies. I.e. when front-end of the machine is not delivering uops to the back-en…
370 …ued by the micro-sequencer (MS). Counts both the uops from a micro-coded instruction, and the uop…
/linux-6.12.1/drivers/media/i2c/
Dccs-pll.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * drivers/media/i2c/ccs-pll.h
17 /* CSI-2 or CCP-2 */
37 * struct ccs_pll_branch_fr - CCS PLL configuration (front)
39 * A single branch front-end of the CCS PLL tree.
41 * @pre_pll_clk_div: Pre-PLL clock divisor
54 * struct ccs_pll_branch_bk - CCS PLL configuration (back)
56 * A single branch back-end of the CCS PLL tree.
71 * struct ccs_pll - Full CCS PLL configuration
78 * @csi2: CSI-2 related parameters
[all …]
/linux-6.12.1/include/media/
Ddemux.h4 * The Kernel Digital TV Demux kABI defines a driver-internal interface for
5 * registering low-level, hardware specific driver to a hardware independent
64 * enum ts_filter_type - filter type bitmap for dmx_ts_feed.set\(\)
69 * @TS_DECODER: Send stream to built-in decoder (if present).
81 * struct dmx_ts_feed - Structure that contains a TS feed filter
83 * @is_filtering: Set to non-zero when filtering in progress
112 * struct dmx_section_filter - Structure that describes a section filter
120 * @parent: Back-pointer to struct dmx_section_feed.
139 * struct dmx_section_feed - Structure that contains a section feed filter
141 * @is_filtering: Set to non-zero when filtering in progress
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/haswellx/
Dfrontend.json3front end is resteered, mainly when the BPU cannot provide a correct prediction and this is correc…
7 "PublicDescription": "Number of front end re-steers due to BPU misprediction.",
12 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.",
28 … "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction-cache miss.",
36 … "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction-cache miss.",
153 …s event counts cycles during which the microcode sequencer assisted the Front-end in delivering uo…
209 …"PublicDescription": "This event counts uops delivered by the Front-end with the assistance of the…
219Front-end to the Resource Allocation Table (RAT) while the Back-end of the processor is not stalle…
230Front-end allocated exactly zero uops to the Resource Allocation Table (RAT) while the Back-end of…
256 "BriefDescription": "Cycles with less than 2 uops delivered by the front end.",
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/haswell/
Dfrontend.json3front end is resteered, mainly when the BPU cannot provide a correct prediction and this is correc…
7 "PublicDescription": "Number of front end re-steers due to BPU misprediction.",
12 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.",
28 … "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction-cache miss.",
36 … "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction-cache miss.",
153 …s event counts cycles during which the microcode sequencer assisted the Front-end in delivering uo…
209 …"PublicDescription": "This event counts uops delivered by the Front-end with the assistance of the…
219Front-end to the Resource Allocation Table (RAT) while the Back-end of the processor is not stalle…
230Front-end allocated exactly zero uops to the Resource Allocation Table (RAT) while the Back-end of…
256 "BriefDescription": "Cycles with less than 2 uops delivered by the front end.",
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/sandybridge/
Dfrontend.json3front end is resteered, mainly when the BPU cannot provide a correct prediction and this is correc…
11 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switches.",
19 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.",
23-end cannot accept new micro-ops. The penalty for these switches is potentially several cycles o…
160front-end in delivering uops. Microcode assists are used for complex instructions or scenarios th…
222-end per cycle, per thread, when the back-end was not stalled. In the ideal case 4 uops can be de…
246 "BriefDescription": "Cycles when 1 or more uops were delivered to the by the front end.",
265 "BriefDescription": "Cycles with less than 2 uops delivered by the front end.",
274 "BriefDescription": "Cycles with less than 3 uops delivered by the front end.",
/linux-6.12.1/tools/perf/pmu-events/arch/x86/jaketown/
Dfrontend.json3front end is resteered, mainly when the BPU cannot provide a correct prediction and this is correc…
11 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switches.",
19 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.",
23-end cannot accept new micro-ops. The penalty for these switches is potentially several cycles o…
160front-end in delivering uops. Microcode assists are used for complex instructions or scenarios th…
222-end per cycle, per thread, when the back-end was not stalled. In the ideal case 4 uops can be de…
246 "BriefDescription": "Cycles when 1 or more uops were delivered to the by the front end.",
265 "BriefDescription": "Cycles with less than 2 uops delivered by the front end.",
274 "BriefDescription": "Cycles with less than 3 uops delivered by the front end.",
/linux-6.12.1/include/xen/interface/io/
Dring.h1 /* SPDX-License-Identifier: MIT */
5 * Shared producer-consumer ring macros.
16 * - standard integers types (uint8_t, uint16_t, etc)
21 * - size_t
22 * - memcpy
23 * - grant_ref_t
32 /* Round a 32-bit unsigned constant down to the nearest power of two. */
43 * power of two (so we can mask with (size-1) to loop around).
46 (__RD32(((_sz) - offsetof(struct _s##_sring, ring)) / \
47 sizeof(((struct _s##_sring *)0)->ring[0])))
[all …]
/linux-6.12.1/net/ceph/
Dmon_client.c1 // SPDX-License-Identifier: GPL-2.0
24 * of cmon daemons use a modified version of the Paxos part-time parliament
39 static int decode_mon_info(void **p, void *end, bool msgr2, in decode_mon_info() argument
47 ret = ceph_start_decoding(p, end, 1, "mon_info_t", &struct_v, in decode_mon_info()
53 ceph_decode_skip_string(p, end, e_inval); /* skip mon name */ in decode_mon_info()
54 ret = ceph_decode_entity_addrvec(p, end, msgr2, addr); in decode_mon_info()
62 return -EINVAL; in decode_mon_info()
70 static struct ceph_monmap *ceph_monmap_decode(void **p, void *end, bool msgr2) in ceph_monmap_decode() argument
82 ceph_decode_32_safe(p, end, blob_len, e_inval); in ceph_monmap_decode()
83 ceph_decode_need(p, end, blob_len, e_inval); in ceph_monmap_decode()
[all …]

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