x86/sapphirerapids/frontend.json

7 …"PublicDescription": "Number of times the front-end is resteered when it finds a branch instructio…
16 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
29         "BriefDescription": "DSB-to-MITE switch true penalty cycles.",
33 …"PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previou…
45 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
57 …e stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to th…
98         "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle",
105 …ter an interval where the front-end delivered no uops for a period of at least 1 cycle which was n…
110 … after an interval where the front-end delivered no uops for a period of 128 cycles which was not …
117 … after an interval where the front-end delivered no uops for a period of 128 cycles which was not …
122 …d after an interval where the front-end delivered no uops for a period of 16 cycles which was not …
129 …ons that are delivered to the back-end after a front-end stall of at least 16 cycles. During this …
134         "BriefDescription": "Retired instructions after front-end starvation of at least 2 cycles",
141 …ter an interval where the front-end delivered no uops for a period of at least 2 cycles which was …
146 … after an interval where the front-end delivered no uops for a period of 256 cycles which was not …
153 … after an interval where the front-end delivered no uops for a period of 256 cycles which was not …
158 …ter an interval where the front-end had at least 1 bubble-slot for a period of 2 cycles which was …
165 …delivered to the back-end after the front-end had at least 1 bubble-slot for a period of 2 cycles.…
170 …d after an interval where the front-end delivered no uops for a period of 32 cycles which was not …
177 …ons that are delivered to the back-end after a front-end stall of at least 32 cycles. During this …
182 …d after an interval where the front-end delivered no uops for a period of 4 cycles which was not i…
189 …d after an interval where the front-end delivered no uops for a period of 4 cycles which was not i…
194 … after an interval where the front-end delivered no uops for a period of 512 cycles which was not …
201 … after an interval where the front-end delivered no uops for a period of 512 cycles which was not …
206 …d after an interval where the front-end delivered no uops for a period of 64 cycles which was not …
213 …d after an interval where the front-end delivered no uops for a period of 64 cycles which was not …
218 …d after an interval where the front-end delivered no uops for a period of 8 cycles which was not i…
225 …ions that are delivered to the back-end after a front-end stall of at least 8 cycles. During this …
384 … to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-e…
394 …red by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-e…
399 …n": "Cycles when optimal number of uops was delivered to the back-end when the back-end is not sta…
405 …red by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-e…
414 … to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-e…
424 …red by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-e…
429 …n": "Cycles when optimal number of uops was delivered to the back-end when the back-end is not sta…
435 …red by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-e…