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/linux-6.12.1/drivers/i2c/muxes/
Di2c-mux-gpmux.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/i2c-mux.h>
18 struct mux_control *control; member
28 ret = mux_control_select(mux->control, chan); in i2c_mux_select()
29 mux->do_not_deselect = ret < 0; in i2c_mux_select()
38 if (mux->do_not_deselect) in i2c_mux_deselect()
41 return mux_control_deselect(mux->control); in i2c_mux_deselect()
46 struct device_node *np = dev->of_node; in mux_parent_adapter()
48 struct i2c_adapter *parent; in mux_parent_adapter() local
50 parent_np = of_parse_phandle(np, "i2c-parent", 0); in mux_parent_adapter()
[all …]
/linux-6.12.1/drivers/iio/multiplexer/
Diio-mux.c1 // SPDX-License-Identifier: GPL-2.0
31 struct mux_control *control; member
32 struct iio_channel *parent; member
41 struct mux_child *child = &mux->child[idx]; in iio_mux_select()
42 struct iio_chan_spec const *chan = &mux->chan[idx]; in iio_mux_select()
46 ret = mux_control_select_delay(mux->control, chan->channel, in iio_mux_select()
47 mux->delay_us); in iio_mux_select()
49 mux->cached_state = -1; in iio_mux_select()
53 if (mux->cached_state == chan->channel) in iio_mux_select()
56 if (chan->ext_info) { in iio_mux_select()
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/linux-6.12.1/Documentation/devicetree/bindings/mux/
Dreg-mux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/reg-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic register bitfield-based multiplexer controller
10 - Peter Rosin <peda@axentia.se>
13 Define register bitfields to be used to control multiplexers. The parent
19 - reg-mux # parent device of mux controller is not syscon device
20 - mmio-mux # parent device of mux controller is syscon device
24 '#mux-control-cells':
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Dgpio-mux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/gpio-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-based multiplexer controller
10 - Peter Rosin <peda@axentia.se>
13 Define what GPIO pins are used to control a multiplexer. Or several
14 multiplexers, if the same pins control more than one multiplexer.
22 const: gpio-mux
24 mux-gpios:
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/linux-6.12.1/include/linux/
Dwwan.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 * enum wwan_port_type - WWAN port types
14 * @WWAN_PORT_MBIM: Mobile Broadband Interface Model control
15 * @WWAN_PORT_QMI: Qcom modem/MSM interface for modem control
18 * @WWAN_PORT_XMMRPC: Control protocol for Intel XMM modems
19 * @WWAN_PORT_FASTBOOT: Fastboot protocol control
37 WWAN_PORT_MAX = __WWAN_PORT_MAX - 1,
47 /** struct wwan_port_ops - The WWAN port operations
50 * @tx: Non-blocking routine that sends WWAN port protocol data to the device.
55 * The wwan_port_ops structure contains a list of low-level operations
[all …]
Dpowercap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
24 * struct powercap_control_type_ops - Define control type callbacks
25 * @set_enable: Enable/Disable whole control type.
32 * control type is closed. So it is safe to free data
33 * structure associated with this control type.
35 * for the control type.
37 * This structure defines control type callbacks to be implemented by client
47 * struct powercap_control_type - Defines a powercap control_type
52 * @lock: mutex for control type
58 * @node: linked-list node
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/linux-6.12.1/drivers/usb/musb/
Dsunxi.c1 // SPDX-License-Identifier: GPL-2.0+
18 #include <linux/phy/phy-sun4i-usb.h>
102 if (!test_bit(SUNXI_MUSB_FL_ENABLED, &glue->flags)) in sunxi_musb_work()
105 if (test_and_clear_bit(SUNXI_MUSB_FL_HOSTMODE_PEND, &glue->flags)) { in sunxi_musb_work()
106 struct musb *musb = glue->musb; in sunxi_musb_work()
110 spin_lock_irqsave(&musb->lock, flags); in sunxi_musb_work()
112 devctl = readb(musb->mregs + SUNXI_MUSB_DEVCTL); in sunxi_musb_work()
113 if (test_bit(SUNXI_MUSB_FL_HOSTMODE, &glue->flags)) { in sunxi_musb_work()
114 set_bit(SUNXI_MUSB_FL_VBUS_ON, &glue->flags); in sunxi_musb_work()
115 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; in sunxi_musb_work()
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Dmusb_dsps.c1 // SPDX-License-Identifier: GPL-2.0
21 #include <linux/dma-mapping.h>
25 #include <linux/platform_data/usb-omap.h>
45 u16 control; member
58 /* bit positions for control */
89 u32 control; member
117 { "control", 0x14 },
135 struct musb *musb = platform_get_drvdata(glue->musb); in dsps_mod_timer()
139 wait = msecs_to_jiffies(glue->wrp->poll_timeout); in dsps_mod_timer()
143 mod_timer(&musb->dev_timer, jiffies + wait); in dsps_mod_timer()
[all …]
/linux-6.12.1/include/linux/firmware/imx/svc/
Dpm.h1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Copyright 2017-2018 NXP
8 * control, clock control, reset control, and wake-up event control.
56 #define IMX_SC_PM_PW_MODE_LP 2 /* Power in low-power */
77 * Defines for SC PM CLK Parent
79 #define IMX_SC_PM_PARENT_XTAL 0 /* Parent is XTAL. */
80 #define IMX_SC_PM_PARENT_PLL0 1 /* Parent is PLL0 */
81 #define IMX_SC_PM_PARENT_PLL1 2 /* Parent is PLL1 or PLL0/2 */
82 #define IMX_SC_PM_PARENT_PLL2 3 /* Parent in PLL2 or PLL0/4 */
83 #define IMX_SC_PM_PARENT_BYPS 4 /* Parent is a bypass clock. */
/linux-6.12.1/drivers/acpi/acpica/
Dpsparse.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: psparse - Parser top level AML parse routines
6 * Copyright (C) 2000 - 2023, Intel Corp.
34 * PARAMETERS: opcode - An AML opcode
44 /* Extended (2-byte) opcode if > 255 */ in acpi_ps_get_opcode_size()
59 * PARAMETERS: parser_state - A parser state object
72 aml = parser_state->aml; in acpi_ps_peek_opcode()
90 * PARAMETERS: walk_state - Current State
91 * op - Op to complete
121 if (((walk_state->parse_flags & ACPI_PARSE_TREE_MASK) != in acpi_ps_complete_this_op()
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/linux-6.12.1/drivers/infiniband/hw/qib/
Dqib_pcie.c2 * Copyright (c) 2010 - 2017 Intel Corporation. All rights reserved.
15 * - Redistributions of source code must retain the above
19 * - Redistributions in binary form must reproduce the above
50 * from qib_pcie_params, which every chip-specific
81 qib_early_err(&pdev->dev, "pci enable failed: error %d\n", in qib_pcie_init()
82 -ret); in qib_pcie_init()
88 qib_devinfo(pdev, "pci_request_regions fails: err %d\n", -ret); in qib_pcie_init()
92 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); in qib_pcie_init()
99 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); in qib_pcie_init()
118 * fields required to re-initialize after a chip reset, or for
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/linux-6.12.1/drivers/regulator/
Dtps65090-regulator.c1 // SPDX-License-Identifier: GPL-2.0-only
33 * struct tps65090_regulator - Per-regulator data for a tps65090 regulator
54 * tps65090_reg_set_overcurrent_wait - Setup overcurrent wait
62 * Return: 0 if no error, non-zero if there was an error writing the register.
69 ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, in tps65090_reg_set_overcurrent_wait()
71 ri->overcurrent_wait << CTRL_WT_BIT); in tps65090_reg_set_overcurrent_wait()
73 dev_err(&rdev->dev, "Error updating overcurrent wait %#x\n", in tps65090_reg_set_overcurrent_wait()
74 rdev->desc->enable_reg); in tps65090_reg_set_overcurrent_wait()
81 * tps65090_try_enable_fet - Try to enable a FET
85 * Return: 0 if ok, -ENOTRECOVERABLE if the FET power good bit did not get
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/linux-6.12.1/drivers/hid/
Dhid-roccat-koneplus.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 * and functionality and without the non-standard behaviours the Kone had.
22 #include <linux/hid-roccat.h>
23 #include "hid-ids.h"
24 #include "hid-roccat-common.h"
25 #include "hid-roccat-koneplus.h"
32 koneplus->actual_profile = new_profile; in koneplus_profile_activated()
38 struct roccat_common2_control control; in koneplus_send_control() local
43 return -EINVAL; in koneplus_send_control()
45 control.command = ROCCAT_COMMON_COMMAND_CONTROL; in koneplus_send_control()
[all …]
Dhid-roccat-kovaplus.c1 // SPDX-License-Identifier: GPL-2.0-or-later
20 #include <linux/hid-roccat.h>
21 #include "hid-ids.h"
22 #include "hid-roccat-common.h"
23 #include "hid-roccat-kovaplus.h"
35 if (new_profile_index >= ARRAY_SIZE(kovaplus->profile_settings)) in kovaplus_profile_activated()
37 kovaplus->actual_profile = new_profile_index; in kovaplus_profile_activated()
38 kovaplus->actual_cpi = kovaplus->profile_settings[new_profile_index].cpi_startup_level; in kovaplus_profile_activated()
39 kovaplus->actual_x_sensitivity = kovaplus->profile_settings[new_profile_index].sensitivity_x; in kovaplus_profile_activated()
40 kovaplus->actual_y_sensitivity = kovaplus->profile_settings[new_profile_index].sensitivity_y; in kovaplus_profile_activated()
[all …]
Dhid-roccat-pyra.c1 // SPDX-License-Identifier: GPL-2.0-or-later
22 #include <linux/hid-roccat.h>
23 #include "hid-ids.h"
24 #include "hid-roccat-common.h"
25 #include "hid-roccat-pyra.h"
32 if (new_profile >= ARRAY_SIZE(pyra->profile_settings)) in profile_activated()
34 pyra->actual_profile = new_profile; in profile_activated()
35 pyra->actual_cpi = pyra->profile_settings[pyra->actual_profile].y_cpi; in profile_activated()
41 struct roccat_common2_control control; in pyra_send_control() local
46 return -EINVAL; in pyra_send_control()
[all …]
Dhid-roccat-common.c1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #include "hid-roccat-common.h"
29 return -ENOMEM; in roccat_common2_receive()
39 return ((len < 0) ? len : ((len != size) ? -EIO : 0)); in roccat_common2_receive()
51 return -ENOMEM; in roccat_common2_send()
60 return ((len < 0) ? len : ((len != size) ? -EIO : 0)); in roccat_common2_send()
75 struct roccat_common2_control control; in roccat_common2_receive_control_status() local
81 &control, sizeof(struct roccat_common2_control)); in roccat_common2_receive_control_status()
86 switch (control.value) { in roccat_common2_receive_control_status()
95 return -EINVAL; in roccat_common2_receive_control_status()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/serial/
Dnxp,sc16is7xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP SC16IS7xx Advanced Universal Asynchronous Receiver-Transmitter (UART)
10 - Hugo Villeneuve <hvilleneuve@dimonoff.com>
15 - nxp,sc16is740
16 - nxp,sc16is741
17 - nxp,sc16is750
18 - nxp,sc16is752
19 - nxp,sc16is760
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/linux-6.12.1/drivers/clk/bcm/
Dclk-kona-setup.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include "clk-kona.h"
13 #define selector_clear_exists(sel) ((sel)->width = 0)
20 struct ccu_policy *ccu_policy = &ccu->policy; in ccu_data_offsets_valid()
23 limit = ccu->range - sizeof(u32); in ccu_data_offsets_valid()
26 if (ccu_policy->enable.offset > limit) { in ccu_data_offsets_valid()
29 ccu->name, ccu_policy->enable.offset, limit); in ccu_data_offsets_valid()
32 if (ccu_policy->control.offset > limit) { in ccu_data_offsets_valid()
33 pr_err("%s: bad policy control offset for %s " in ccu_data_offsets_valid()
35 ccu->name, ccu_policy->control.offset, limit); in ccu_data_offsets_valid()
[all …]
Dclk-kona.h1 /* SPDX-License-Identifier: GPL-2.0-only */
16 #include <linux/clk-provider.h>
20 /* The common clock framework uses u8 to represent a parent index */
24 #define BAD_CLK_NAME ((const char *)-1)
33 #define FLAG_SET(obj, type, flag) ((obj)->flags |= FLAG(type, flag))
34 #define FLAG_CLEAR(obj, type, flag) ((obj)->flags &= ~(FLAG(type, flag)))
35 #define FLAG_FLIP(obj, type, flag) ((obj)->flags ^= FLAG(type, flag))
36 #define FLAG_TEST(obj, type, flag) (!!((obj)->flags & FLAG(type, flag)))
40 #define ccu_policy_exists(ccu_policy) ((ccu_policy)->enable.offset != 0)
44 #define policy_exists(policy) ((policy)->offset != 0)
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/linux-6.12.1/drivers/irqchip/
Dirq-al-fic.c1 // SPDX-License-Identifier: GPL-2.0
49 u32 control = readl_relaxed(fic->base + AL_FIC_CONTROL); in al_fic_set_trigger() local
53 control &= ~CONTROL_TRIGGER_RISING; in al_fic_set_trigger()
56 control |= CONTROL_TRIGGER_RISING; in al_fic_set_trigger()
58 gc->chip_types->handler = handler; in al_fic_set_trigger()
59 fic->state = new_state; in al_fic_set_trigger()
60 writel_relaxed(control, fic->base + AL_FIC_CONTROL); in al_fic_set_trigger()
66 struct al_fic *fic = gc->private; in al_fic_irq_set_type()
75 ret = -EINVAL; in al_fic_irq_set_type()
91 if (fic->state == AL_FIC_UNCONFIGURED) { in al_fic_irq_set_type()
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/linux-6.12.1/drivers/usb/common/
Dulpi.c1 // SPDX-License-Identifier: GPL-2.0
3 * ulpi.c - USB ULPI PHY bus
19 #include <linux/clk/clk-conf.h>
21 /* -------------------------------------------------------------------------- */
25 return ulpi->ops->read(ulpi->dev.parent, addr); in ulpi_read()
31 return ulpi->ops->write(ulpi->dev.parent, addr, val); in ulpi_write()
35 /* -------------------------------------------------------------------------- */
47 if (ulpi->id.vendor == 0 || !drv->id_table) in ulpi_match()
50 for (id = drv->id_table; id->vendor; id++) in ulpi_match()
51 if (id->vendor == ulpi->id.vendor && in ulpi_match()
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/linux-6.12.1/Documentation/devicetree/bindings/clock/ti/
Dmux.txt4 register-mapped multiplexer with multiple input clock signals or
6 gate or adjust the parent rate via a divider or multiplier.
15 register value selected parent clock
22 "index-starts-at-one" modified the scheme as follows:
24 register value selected clock parent
29 The binding must provide the register to control the mux. Optionally
30 the number of bits to shift the control field in the register can be
34 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
37 - compatible : shall be "ti,mux-clock" or "ti,composite-mux-clock".
38 - #clock-cells : from common clock binding; shall be set to 0.
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/linux-6.12.1/Documentation/devicetree/bindings/remoteproc/
Dti,pru-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,pru-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 Each Programmable Real-Time Unit and Industrial Communication Subsystem
14 (PRU-ICSS or PRUSS) has two 32-bit load/store RISC CPU cores called
15 Programmable Real-Time Units (PRUs), each represented by a node. Each PRU
16 core has a dedicated Instruction RAM, Control and Debug register sets, and
17 use the Data RAMs present within the PRU-ICSS for code execution.
[all …]
/linux-6.12.1/drivers/gpio/
Dgpio-ixp4xx.c1 // SPDX-License-Identifier: GPL-2.0
6 // based on previous work and know-how from:
43 * Clock output control register defines.
55 * struct ixp4xx_gpio - IXP4 GPIO state container
58 * @base: remapped I/O-memory base
59 * @irq_edge: Each bit represents an IRQ: 1: edge-triggered,
74 __raw_writel(BIT(d->hwirq), g->base + IXP4XX_REG_GPIS); in ixp4xx_gpio_irq_ack()
82 gpiochip_disable_irq(gc, d->hwirq); in ixp4xx_gpio_mask_irq()
90 /* ACK when unmasking if not edge-triggered */ in ixp4xx_gpio_irq_unmask()
91 if (!(g->irq_edge & BIT(d->hwirq))) in ixp4xx_gpio_irq_unmask()
[all …]
/linux-6.12.1/arch/arm64/boot/dts/ti/
Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
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