/linux-6.12.1/drivers/net/phy/ |
D | phy.c | 61 static void phy_process_state_change(struct phy_device *phydev, in phy_process_state_change() argument 64 if (old_state != phydev->state) { in phy_process_state_change() 65 phydev_dbg(phydev, "PHY state change %s -> %s\n", in phy_process_state_change() 67 phy_state_to_str(phydev->state)); in phy_process_state_change() 68 if (phydev->drv && phydev->drv->link_change_notify) in phy_process_state_change() 69 phydev->drv->link_change_notify(phydev); in phy_process_state_change() 73 static void phy_link_up(struct phy_device *phydev) in phy_link_up() argument 75 phydev->phy_link_change(phydev, true); in phy_link_up() 76 phy_led_trigger_change_speed(phydev); in phy_link_up() 79 static void phy_link_down(struct phy_device *phydev) in phy_link_down() argument [all …]
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D | phy-c45.c | 15 * @phydev: target phy_device struct 17 static bool genphy_c45_baset1_able(struct phy_device *phydev) in genphy_c45_baset1_able() argument 21 if (phydev->pma_extable == -ENODATA) { in genphy_c45_baset1_able() 22 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_EXTABLE); in genphy_c45_baset1_able() 26 phydev->pma_extable = val; in genphy_c45_baset1_able() 29 return !!(phydev->pma_extable & MDIO_PMA_EXTABLE_BT1); in genphy_c45_baset1_able() 34 * @phydev: target phy_device struct 36 static bool genphy_c45_pma_can_sleep(struct phy_device *phydev) in genphy_c45_pma_can_sleep() argument 40 stat1 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_STAT1); in genphy_c45_pma_can_sleep() 49 * @phydev: target phy_device struct [all …]
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D | broadcom.c | 26 #define BRCM_PHY_MODEL(phydev) \ argument 27 ((phydev)->drv->phy_id & (phydev)->drv->phy_id_mask) 29 #define BRCM_PHY_REV(phydev) \ argument 30 ((phydev)->drv->phy_id & ~((phydev)->drv->phy_id_mask)) 66 static bool bcm54xx_phy_can_wakeup(struct phy_device *phydev) in bcm54xx_phy_can_wakeup() argument 68 struct bcm54xx_phy_priv *priv = phydev->priv; in bcm54xx_phy_can_wakeup() 70 return phy_interrupt_is_valid(phydev) || priv->wake_irq >= 0; in bcm54xx_phy_can_wakeup() 73 static int bcm54xx_config_clock_delay(struct phy_device *phydev) in bcm54xx_config_clock_delay() argument 78 val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC); in bcm54xx_config_clock_delay() 80 if (phydev->interface == PHY_INTERFACE_MODE_RGMII || in bcm54xx_config_clock_delay() [all …]
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D | realtek.c | 76 /* RTL822X_VND2_XXXXX registers are only accessible when phydev->is_c45 112 static int rtl821x_read_page(struct phy_device *phydev) in rtl821x_read_page() argument 114 return __phy_read(phydev, RTL821x_PAGE_SELECT); in rtl821x_read_page() 117 static int rtl821x_write_page(struct phy_device *phydev, int page) in rtl821x_write_page() argument 119 return __phy_write(phydev, RTL821x_PAGE_SELECT, page); in rtl821x_write_page() 122 static int rtl821x_probe(struct phy_device *phydev) in rtl821x_probe() argument 124 struct device *dev = &phydev->mdio.dev; in rtl821x_probe() 126 u32 phy_id = phydev->drv->phy_id; in rtl821x_probe() 138 ret = phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR1); in rtl821x_probe() 148 ret = phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR2); in rtl821x_probe() [all …]
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D | bcm-phy-lib.c | 21 int __bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val) in __bcm_phy_write_exp() argument 25 rc = __phy_write(phydev, MII_BCM54XX_EXP_SEL, reg); in __bcm_phy_write_exp() 29 return __phy_write(phydev, MII_BCM54XX_EXP_DATA, val); in __bcm_phy_write_exp() 33 int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val) in bcm_phy_write_exp() argument 37 phy_lock_mdio_bus(phydev); in bcm_phy_write_exp() 38 rc = __bcm_phy_write_exp(phydev, reg, val); in bcm_phy_write_exp() 39 phy_unlock_mdio_bus(phydev); in bcm_phy_write_exp() 45 int __bcm_phy_read_exp(struct phy_device *phydev, u16 reg) in __bcm_phy_read_exp() argument 49 val = __phy_write(phydev, MII_BCM54XX_EXP_SEL, reg); in __bcm_phy_read_exp() 53 val = __phy_read(phydev, MII_BCM54XX_EXP_DATA); in __bcm_phy_read_exp() [all …]
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D | phy_device.c | 250 void phy_device_free(struct phy_device *phydev) in phy_device_free() argument 252 put_device(&phydev->mdio.dev); in phy_device_free() 258 struct phy_device *phydev; in phy_mdio_device_free() local 260 phydev = container_of(mdiodev, struct phy_device, mdio); in phy_mdio_device_free() 261 phy_device_free(phydev); in phy_mdio_device_free() 272 struct phy_device *phydev; in phy_mdio_device_remove() local 274 phydev = container_of(mdiodev, struct phy_device, mdio); in phy_mdio_device_remove() 275 phy_device_remove(phydev); in phy_mdio_device_remove() 283 static bool phy_drv_wol_enabled(struct phy_device *phydev) in phy_drv_wol_enabled() argument 287 phy_ethtool_get_wol(phydev, &wol); in phy_drv_wol_enabled() [all …]
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D | vitesse.c | 107 static int vsc824x_add_skew(struct phy_device *phydev) in vsc824x_add_skew() argument 112 extcon = phy_read(phydev, MII_VSC8244_EXT_CON1); in vsc824x_add_skew() 123 err = phy_write(phydev, MII_VSC8244_EXT_CON1, extcon); in vsc824x_add_skew() 128 static int vsc824x_config_init(struct phy_device *phydev) in vsc824x_config_init() argument 132 err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT, in vsc824x_config_init() 137 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) in vsc824x_config_init() 138 err = vsc824x_add_skew(phydev); in vsc824x_config_init() 145 static int vsc73xx_read_page(struct phy_device *phydev) in vsc73xx_read_page() argument 147 return __phy_read(phydev, VSC73XX_EXT_PAGE_ACCESS); in vsc73xx_read_page() 150 static int vsc73xx_write_page(struct phy_device *phydev, int page) in vsc73xx_write_page() argument [all …]
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D | marvell-88x2222.c | 61 static int mv2222_tx_enable(struct phy_device *phydev) in mv2222_tx_enable() argument 63 return phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS, in mv2222_tx_enable() 68 static int mv2222_tx_disable(struct phy_device *phydev) in mv2222_tx_disable() argument 70 return phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS, in mv2222_tx_disable() 74 static int mv2222_soft_reset(struct phy_device *phydev) in mv2222_soft_reset() argument 78 ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, MV_PORT_RST, in mv2222_soft_reset() 83 return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND2, MV_PORT_RST, in mv2222_soft_reset() 88 static int mv2222_disable_aneg(struct phy_device *phydev) in mv2222_disable_aneg() argument 90 int ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_CTRL, in mv2222_disable_aneg() 95 return mv2222_soft_reset(phydev); in mv2222_disable_aneg() [all …]
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D | mediatek-ge-soc.c | 315 static int mtk_socphy_read_page(struct phy_device *phydev) in mtk_socphy_read_page() argument 317 return __phy_read(phydev, MTK_EXT_PAGE_ACCESS); in mtk_socphy_read_page() 320 static int mtk_socphy_write_page(struct phy_device *phydev, int page) in mtk_socphy_write_page() argument 322 return __phy_write(phydev, MTK_EXT_PAGE_ACCESS, page); in mtk_socphy_write_page() 331 static int cal_cycle(struct phy_device *phydev, int devad, in cal_cycle() argument 337 phy_modify_mmd(phydev, devad, regnum, in cal_cycle() 339 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CALIN, in cal_cycle() 342 ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, in cal_cycle() 347 phydev_err(phydev, "Calibration cycle timeout\n"); in cal_cycle() 351 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CALIN, in cal_cycle() [all …]
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D | nxp-c45-tja11xx-macsec.c | 290 static int nxp_c45_macsec_write(struct phy_device *phydev, u16 addr, u32 value) in nxp_c45_macsec_write() argument 298 phydev_dbg(phydev, "write addr 0x%x value 0x%x\n", addr, value); in nxp_c45_macsec_write() 301 ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, laddr, lvalue); in nxp_c45_macsec_write() 307 ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, laddr, lvalue); in nxp_c45_macsec_write() 312 static int nxp_c45_macsec_read(struct phy_device *phydev, u16 addr, u32 *value) in nxp_c45_macsec_read() argument 321 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, laddr); in nxp_c45_macsec_read() 327 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, laddr); in nxp_c45_macsec_read() 334 phydev_dbg(phydev, "read addr 0x%x value 0x%x\n", addr, *value); in nxp_c45_macsec_read() 339 static void nxp_c45_macsec_read32_64(struct phy_device *phydev, u16 addr, in nxp_c45_macsec_read32_64() argument 344 nxp_c45_macsec_read(phydev, addr, &lvalue); in nxp_c45_macsec_read32_64() [all …]
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D | marvell.c | 358 static int marvell_read_page(struct phy_device *phydev) in marvell_read_page() argument 360 return __phy_read(phydev, MII_MARVELL_PHY_PAGE); in marvell_read_page() 363 static int marvell_write_page(struct phy_device *phydev, int page) in marvell_write_page() argument 365 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); in marvell_write_page() 368 static int marvell_set_page(struct phy_device *phydev, int page) in marvell_set_page() argument 370 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); in marvell_set_page() 373 static int marvell_ack_interrupt(struct phy_device *phydev) in marvell_ack_interrupt() argument 378 err = phy_read(phydev, MII_M1011_IEVENT); in marvell_ack_interrupt() 386 static int marvell_config_intr(struct phy_device *phydev) in marvell_config_intr() argument 390 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in marvell_config_intr() [all …]
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D | bcm7xxx.c | 50 static int bcm7xxx_28nm_d0_afe_config_init(struct phy_device *phydev) in bcm7xxx_28nm_d0_afe_config_init() argument 53 bcm_phy_write_misc(phydev, AFE_RXCONFIG_0, 0xeb15); in bcm7xxx_28nm_d0_afe_config_init() 56 bcm_phy_write_misc(phydev, AFE_RXCONFIG_1, 0x9b2f); in bcm7xxx_28nm_d0_afe_config_init() 59 bcm_phy_write_misc(phydev, AFE_RXCONFIG_2, 0x2003); in bcm7xxx_28nm_d0_afe_config_init() 62 bcm_phy_write_misc(phydev, AFE_RX_LP_COUNTER, 0x7fc0); in bcm7xxx_28nm_d0_afe_config_init() 65 bcm_phy_write_misc(phydev, AFE_TX_CONFIG, 0x431); in bcm7xxx_28nm_d0_afe_config_init() 68 bcm_phy_write_misc(phydev, AFE_VDCA_ICTRL_0, 0xa7da); in bcm7xxx_28nm_d0_afe_config_init() 71 bcm_phy_write_misc(phydev, AFE_VDAC_OTHERS_0, 0xa020); in bcm7xxx_28nm_d0_afe_config_init() 76 bcm_phy_write_misc(phydev, AFE_HPF_TRIM_OTHERS, 0x00e3); in bcm7xxx_28nm_d0_afe_config_init() 79 phy_write(phydev, MII_BRCM_CORE_BASE1E, 0x0010); in bcm7xxx_28nm_d0_afe_config_init() [all …]
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D | marvell-88q2xxx.c | 177 static int mv88q2xxx_soft_reset(struct phy_device *phydev) in mv88q2xxx_soft_reset() argument 182 ret = phy_write_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_soft_reset() 187 return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_PCS, in mv88q2xxx_soft_reset() 193 static int mv88q2xxx_read_link_gbit(struct phy_device *phydev) in mv88q2xxx_read_link_gbit() argument 203 ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_MMD_AN_MV_STAT); in mv88q2xxx_read_link_gbit() 208 !phy_polling_mode(phydev)) { in mv88q2xxx_read_link_gbit() 214 if (!phy_polling_mode(phydev) || !phydev->link) { in mv88q2xxx_read_link_gbit() 215 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_read_link_gbit() 224 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_read_link_gbit() 233 phydev->link = link; in mv88q2xxx_read_link_gbit() [all …]
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D | motorcomm.c | 376 * @phydev: a pointer to a &struct phy_device 383 static int ytphy_read_ext(struct phy_device *phydev, u16 regnum) in ytphy_read_ext() argument 387 ret = __phy_write(phydev, YTPHY_PAGE_SELECT, regnum); in ytphy_read_ext() 391 return __phy_read(phydev, YTPHY_PAGE_DATA); in ytphy_read_ext() 396 * @phydev: a pointer to a &struct phy_device 401 static int ytphy_read_ext_with_lock(struct phy_device *phydev, u16 regnum) in ytphy_read_ext_with_lock() argument 405 phy_lock_mdio_bus(phydev); in ytphy_read_ext_with_lock() 406 ret = ytphy_read_ext(phydev, regnum); in ytphy_read_ext_with_lock() 407 phy_unlock_mdio_bus(phydev); in ytphy_read_ext_with_lock() 414 * @phydev: a pointer to a &struct phy_device [all …]
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D | microchip.c | 30 static int lan88xx_read_page(struct phy_device *phydev) in lan88xx_read_page() argument 32 return __phy_read(phydev, LAN88XX_EXT_PAGE_ACCESS); in lan88xx_read_page() 35 static int lan88xx_write_page(struct phy_device *phydev, int page) in lan88xx_write_page() argument 37 return __phy_write(phydev, LAN88XX_EXT_PAGE_ACCESS, page); in lan88xx_write_page() 40 static int lan88xx_phy_config_intr(struct phy_device *phydev) in lan88xx_phy_config_intr() argument 44 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in lan88xx_phy_config_intr() 46 rc = phy_write(phydev, LAN88XX_INT_MASK, 0x7FFF); in lan88xx_phy_config_intr() 47 rc = phy_read(phydev, LAN88XX_INT_STS); in lan88xx_phy_config_intr() 48 rc = phy_write(phydev, LAN88XX_INT_MASK, in lan88xx_phy_config_intr() 52 rc = phy_write(phydev, LAN88XX_INT_MASK, 0); in lan88xx_phy_config_intr() [all …]
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D | bcm-phy-lib.h | 33 int __bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val); 34 int __bcm_phy_read_exp(struct phy_device *phydev, u16 reg); 35 int __bcm_phy_modify_exp(struct phy_device *phydev, u16 reg, u16 mask, u16 set); 36 int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val); 37 int bcm_phy_read_exp(struct phy_device *phydev, u16 reg); 38 int bcm_phy_modify_exp(struct phy_device *phydev, u16 reg, u16 mask, u16 set); 40 static inline int bcm_phy_write_exp_sel(struct phy_device *phydev, in bcm_phy_write_exp_sel() argument 43 return bcm_phy_write_exp(phydev, reg | MII_BCM54XX_EXP_SEL_ER, val); in bcm_phy_write_exp_sel() 46 static inline int bcm_phy_read_exp_sel(struct phy_device *phydev, u16 reg) in bcm_phy_read_exp_sel() argument 48 return bcm_phy_read_exp(phydev, reg | MII_BCM54XX_EXP_SEL_ER); in bcm_phy_read_exp_sel() [all …]
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D | air_en8811h.c | 192 static int air_phy_read_page(struct phy_device *phydev) in air_phy_read_page() argument 194 return __phy_read(phydev, AIR_EXT_PAGE_ACCESS); in air_phy_read_page() 197 static int air_phy_write_page(struct phy_device *phydev, int page) in air_phy_write_page() argument 199 return __phy_write(phydev, AIR_EXT_PAGE_ACCESS, page); in air_phy_write_page() 202 static int __air_buckpbus_reg_write(struct phy_device *phydev, in __air_buckpbus_reg_write() argument 207 ret = __phy_write(phydev, AIR_BPBUS_MODE, AIR_BPBUS_MODE_ADDR_FIXED); in __air_buckpbus_reg_write() 211 ret = __phy_write(phydev, AIR_BPBUS_WR_ADDR_HIGH, in __air_buckpbus_reg_write() 216 ret = __phy_write(phydev, AIR_BPBUS_WR_ADDR_LOW, in __air_buckpbus_reg_write() 221 ret = __phy_write(phydev, AIR_BPBUS_WR_DATA_HIGH, in __air_buckpbus_reg_write() 226 ret = __phy_write(phydev, AIR_BPBUS_WR_DATA_LOW, in __air_buckpbus_reg_write() [all …]
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D | micrel.c | 389 struct phy_device *phydev; member 407 struct phy_device *phydev; member 499 static int kszphy_extended_write(struct phy_device *phydev, in kszphy_extended_write() argument 502 phy_write(phydev, MII_KSZPHY_EXTREG, KSZPHY_EXTREG_WRITE | regnum); in kszphy_extended_write() 503 return phy_write(phydev, MII_KSZPHY_EXTREG_WRITE, val); in kszphy_extended_write() 506 static int kszphy_extended_read(struct phy_device *phydev, in kszphy_extended_read() argument 509 phy_write(phydev, MII_KSZPHY_EXTREG, regnum); in kszphy_extended_read() 510 return phy_read(phydev, MII_KSZPHY_EXTREG_READ); in kszphy_extended_read() 513 static int kszphy_ack_interrupt(struct phy_device *phydev) in kszphy_ack_interrupt() argument 518 rc = phy_read(phydev, MII_KSZPHY_INTCS); in kszphy_ack_interrupt() [all …]
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/linux-6.12.1/drivers/net/ethernet/realtek/ |
D | r8169_phy_config.c | 18 struct phy_device *phydev); 20 static void r8168d_modify_extpage(struct phy_device *phydev, int extpage, in r8168d_modify_extpage() argument 23 int oldpage = phy_select_page(phydev, 0x0007); in r8168d_modify_extpage() 25 __phy_write(phydev, 0x1e, extpage); in r8168d_modify_extpage() 26 __phy_modify(phydev, reg, mask, val); in r8168d_modify_extpage() 28 phy_restore_page(phydev, oldpage, 0); in r8168d_modify_extpage() 31 static void r8168d_phy_param(struct phy_device *phydev, u16 parm, in r8168d_phy_param() argument 34 int oldpage = phy_select_page(phydev, 0x0005); in r8168d_phy_param() 36 __phy_write(phydev, 0x05, parm); in r8168d_phy_param() 37 __phy_modify(phydev, 0x06, mask, val); in r8168d_phy_param() [all …]
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/linux-6.12.1/drivers/net/phy/mscc/ |
D | mscc_ptp.c | 26 /* phydev->bus->mdio_lock should be locked when using this function */ 27 static int phy_ts_base_write(struct phy_device *phydev, u32 regnum, u16 val) in phy_ts_base_write() argument 29 struct vsc8531_private *priv = phydev->priv; in phy_ts_base_write() 31 WARN_ON_ONCE(!mutex_is_locked(&phydev->mdio.bus->mdio_lock)); in phy_ts_base_write() 32 return __mdiobus_write(phydev->mdio.bus, priv->ts_base_addr, regnum, in phy_ts_base_write() 36 /* phydev->bus->mdio_lock should be locked when using this function */ 37 static int phy_ts_base_read(struct phy_device *phydev, u32 regnum) in phy_ts_base_read() argument 39 struct vsc8531_private *priv = phydev->priv; in phy_ts_base_read() 41 WARN_ON_ONCE(!mutex_is_locked(&phydev->mdio.bus->mdio_lock)); in phy_ts_base_read() 42 return __mdiobus_read(phydev->mdio.bus, priv->ts_base_addr, regnum); in phy_ts_base_read() [all …]
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D | mscc_main.c | 113 static int vsc85xx_phy_read_page(struct phy_device *phydev) in vsc85xx_phy_read_page() argument 115 return __phy_read(phydev, MSCC_EXT_PAGE_ACCESS); in vsc85xx_phy_read_page() 118 static int vsc85xx_phy_write_page(struct phy_device *phydev, int page) in vsc85xx_phy_write_page() argument 120 return __phy_write(phydev, MSCC_EXT_PAGE_ACCESS, page); in vsc85xx_phy_write_page() 123 static int vsc85xx_get_sset_count(struct phy_device *phydev) in vsc85xx_get_sset_count() argument 125 struct vsc8531_private *priv = phydev->priv; in vsc85xx_get_sset_count() 133 static void vsc85xx_get_strings(struct phy_device *phydev, u8 *data) in vsc85xx_get_strings() argument 135 struct vsc8531_private *priv = phydev->priv; in vsc85xx_get_strings() 146 static u64 vsc85xx_get_stat(struct phy_device *phydev, int i) in vsc85xx_get_stat() argument 148 struct vsc8531_private *priv = phydev->priv; in vsc85xx_get_stat() [all …]
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D | mscc_serdes.c | 14 static int pll5g_detune(struct phy_device *phydev) in pll5g_detune() argument 19 rd_dat = vsc85xx_csr_read(phydev, MACRO_CTRL, PHY_S6G_PLL5G_CFG2); in pll5g_detune() 22 ret = vsc85xx_csr_write(phydev, MACRO_CTRL, in pll5g_detune() 25 dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); in pll5g_detune() 29 static int pll5g_tune(struct phy_device *phydev) in pll5g_tune() argument 34 rd_dat = vsc85xx_csr_read(phydev, MACRO_CTRL, PHY_S6G_PLL5G_CFG2); in pll5g_tune() 36 ret = vsc85xx_csr_write(phydev, MACRO_CTRL, in pll5g_tune() 39 dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); in pll5g_tune() 43 static int vsc85xx_sd6g_pll_cfg_wr(struct phy_device *phydev, in vsc85xx_sd6g_pll_cfg_wr() argument 50 ret = vsc85xx_csr_write(phydev, MACRO_CTRL, in vsc85xx_sd6g_pll_cfg_wr() [all …]
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D | mscc_macsec.c | 22 static u32 vsc8584_macsec_phy_read(struct phy_device *phydev, in vsc8584_macsec_phy_read() argument 29 rc = phy_select_page(phydev, MSCC_PHY_PAGE_MACSEC); in vsc8584_macsec_phy_read() 33 __phy_write(phydev, MSCC_EXT_PAGE_MACSEC_20, in vsc8584_macsec_phy_read() 42 __phy_write(phydev, MSCC_EXT_PAGE_MACSEC_19, in vsc8584_macsec_phy_read() 49 val = __phy_read(phydev, MSCC_EXT_PAGE_MACSEC_19); in vsc8584_macsec_phy_read() 52 val_l = __phy_read(phydev, MSCC_EXT_PAGE_MACSEC_17); in vsc8584_macsec_phy_read() 53 val_h = __phy_read(phydev, MSCC_EXT_PAGE_MACSEC_18); in vsc8584_macsec_phy_read() 56 phy_restore_page(phydev, rc, rc); in vsc8584_macsec_phy_read() 61 static void vsc8584_macsec_phy_write(struct phy_device *phydev, in vsc8584_macsec_phy_write() argument 67 rc = phy_select_page(phydev, MSCC_PHY_PAGE_MACSEC); in vsc8584_macsec_phy_write() [all …]
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/linux-6.12.1/drivers/net/phy/qcom/ |
D | qca808x.c | 98 static int qca808x_phy_fast_retrain_config(struct phy_device *phydev) in qca808x_phy_fast_retrain_config() argument 103 ret = genphy_c45_fast_retrain(phydev, true); in qca808x_phy_fast_retrain_config() 107 phy_write_mmd(phydev, MDIO_MMD_AN, QCA808X_PHY_MMD7_TOP_OPTION1, in qca808x_phy_fast_retrain_config() 109 phy_write_mmd(phydev, MDIO_MMD_PMAPMD, QCA808X_PHY_MMD1_MSE_THRESHOLD_20DB, in qca808x_phy_fast_retrain_config() 111 phy_write_mmd(phydev, MDIO_MMD_PMAPMD, QCA808X_PHY_MMD1_MSE_THRESHOLD_17DB, in qca808x_phy_fast_retrain_config() 113 phy_write_mmd(phydev, MDIO_MMD_PMAPMD, QCA808X_PHY_MMD1_MSE_THRESHOLD_27DB, in qca808x_phy_fast_retrain_config() 115 phy_write_mmd(phydev, MDIO_MMD_PMAPMD, QCA808X_PHY_MMD1_MSE_THRESHOLD_28DB, in qca808x_phy_fast_retrain_config() 117 phy_write_mmd(phydev, MDIO_MMD_PCS, QCA808X_PHY_MMD3_DEBUG_1, in qca808x_phy_fast_retrain_config() 119 phy_write_mmd(phydev, MDIO_MMD_PCS, QCA808X_PHY_MMD3_DEBUG_4, in qca808x_phy_fast_retrain_config() 121 phy_write_mmd(phydev, MDIO_MMD_PCS, QCA808X_PHY_MMD3_DEBUG_5, in qca808x_phy_fast_retrain_config() [all …]
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D | qcom-phy-lib.c | 17 int at803x_debug_reg_read(struct phy_device *phydev, u16 reg) in at803x_debug_reg_read() argument 21 ret = phy_write(phydev, AT803X_DEBUG_ADDR, reg); in at803x_debug_reg_read() 25 return phy_read(phydev, AT803X_DEBUG_DATA); in at803x_debug_reg_read() 29 int at803x_debug_reg_mask(struct phy_device *phydev, u16 reg, in at803x_debug_reg_mask() argument 35 ret = at803x_debug_reg_read(phydev, reg); in at803x_debug_reg_mask() 43 return phy_write(phydev, AT803X_DEBUG_DATA, val); in at803x_debug_reg_mask() 47 int at803x_debug_reg_write(struct phy_device *phydev, u16 reg, u16 data) in at803x_debug_reg_write() argument 51 ret = phy_write(phydev, AT803X_DEBUG_ADDR, reg); in at803x_debug_reg_write() 55 return phy_write(phydev, AT803X_DEBUG_DATA, data); in at803x_debug_reg_write() 59 int at803x_set_wol(struct phy_device *phydev, in at803x_set_wol() argument [all …]
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