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/linux-6.12.1/Documentation/devicetree/bindings/spi/
Dspi-sifive.yaml62 enum: [0, 1, 2, 3, 4, 5, 6, 7, 8]
77 reg = <0x10040000 0x1000>, <0x20000000 0x10000000>;
82 #size-cells = <0>;
/linux-6.12.1/arch/arm/boot/dts/st/
Dstm32mp157a-microgea-stm32mp1.dtsi13 reg = <0xc0000000 0x10000000>;
23 reg = <0x10000000 0x40000>;
29 reg = <0x10040000 0x1000>;
35 reg = <0x10041000 0x1000>;
41 reg = <0x10042000 0x4000>;
47 reg = <0x30000000 0x40000>;
53 reg = <0x38000000 0x10000>;
100 pinctrl-0 = <&fmc_pins_a>;
104 nand-controller@4,0 {
107 nand@0 {
[all …]
Dstm32mp157a-icore-stm32mp1.dtsi13 reg = <0xc0000000 0x20000000>;
23 reg = <0x10000000 0x40000>;
29 reg = <0x10040000 0x1000>;
35 reg = <0x10041000 0x1000>;
41 reg = <0x10042000 0x4000>;
47 reg = <0x30000000 0x40000>;
53 reg = <0x38000000 0x10000>;
159 pinctrl-0 = <&i2c2_pins_a>;
176 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
Dstm32mp15xx-osd32.dtsi19 reg = <0x10000000 0x40000>;
25 reg = <0x10040000 0x1000>;
31 reg = <0x10041000 0x1000>;
37 reg = <0x10042000 0x4000>;
43 reg = <0x30000000 0x40000>;
49 reg = <0x38000000 0x10000>;
57 pinctrl-0 = <&i2c4_pins_a>;
66 reg = <0x33>;
67 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
84 regulator-initial-mode = <0>;
[all …]
Dstm32mp15xx-dhcor-som.dtsi20 reg = <0xc0000000 0x40000000>;
30 reg = <0x10000000 0x40000>;
36 reg = <0x10040000 0x1000>;
42 reg = <0x10041000 0x1000>;
48 reg = <0x10042000 0x4000>;
54 reg = <0x30000000 0x40000>;
60 reg = <0x38000000 0x10000>;
76 pinctrl-0 = <&i2c4_pins_a>;
85 reg = <0x33>;
86 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
[all …]
Dstm32mp157c-odyssey-som.dtsi22 reg = <0xc0000000 0x20000000>;
32 reg = <0x10000000 0x40000>;
38 reg = <0x10040000 0x1000>;
44 reg = <0x10041000 0x1000>;
50 reg = <0x10042000 0x4000>;
56 reg = <0x30000000 0x40000>;
62 reg = <0x38000000 0x10000>;
80 pinctrl-0 = <&i2c2_pins_a>;
90 reg = <0x33>;
91 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
[all …]
Dstm32mp157c-ed1.dts30 reg = <0xC0000000 0x40000000>;
40 reg = <0x10000000 0x40000>;
46 reg = <0x10040000 0x1000>;
52 reg = <0x10041000 0x1000>;
58 reg = <0x10042000 0x4000>;
64 reg = <0x30000000 0x40000>;
70 reg = <0x38000000 0x10000>;
95 gpios-states = <0>;
96 states = <1800000 0x1>,
97 <2900000 0x0>;
[all …]
Dstm32mp157c-emstamp-argon.dtsi28 reg = <0xc0000000 0x20000000>;
38 reg = <0x10000000 0x40000>;
44 reg = <0x10040000 0x2000>;
50 reg = <0x10042000 0x2000>;
56 reg = <0x10044000 0x4000>;
62 reg = <0x30000000 0x40000>;
68 reg = <0x38000000 0x10000>;
75 led-0 {
97 adc1: adc@0 {
99 pinctrl-0 = <&adc1_in6_pins_a>;
[all …]
Dstm32mp15xx-dhcom-som.dtsi21 reg = <0xC0000000 0x40000000>;
31 reg = <0x10000000 0x40000>;
37 reg = <0x10040000 0x1000>;
43 reg = <0x10041000 0x1000>;
49 reg = <0x10042000 0x4000>;
55 reg = <0x30000000 0x40000>;
61 reg = <0x38000000 0x10000>;
86 channel@0 {
87 reg = <0>;
105 pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
[all …]
Dstm32mp157c-phycore-stm32mp15-som.dtsi55 reg = <0x38000000 0x10000>;
61 reg = <0x30000000 0x40000>;
67 reg = <0x10000000 0x40000>;
73 reg = <0x10040000 0x1000>;
79 reg = <0x10041000 0x1000>;
85 reg = <0x10042000 0x4000>;
110 pinctrl-0 = <&ethernet0_rgmii_pins_d>;
121 #size-cells = <0>;
141 pinctrl-0 = <&i2c1_pins_b>;
149 reg = <0x18>;
[all …]
Dstm32mp15x-mecio1-io.dtsi31 reg = <0xC0000000 0x10000000>;
41 reg = <0x10000000 0x40000>;
47 reg = <0x10040000 0x1000>;
53 reg = <0x10041000 0x1000>;
59 reg = <0x10042000 0x4000>;
65 reg = <0x30000000 0x40000>;
71 reg = <0x38000000 0x10000>;
94 pinctrl-0 = <&adc12_pins_mecsbc>;
105 channel@0 {
106 reg = <0>;
[all …]
Dstm32mp15xx-dkx.dtsi19 reg = <0xc0000000 0x20000000>;
29 reg = <0x10000000 0x40000>;
35 reg = <0x10040000 0x1000>;
41 reg = <0x10041000 0x1000>;
47 reg = <0x10042000 0x4000>;
53 reg = <0x30000000 0x40000>;
59 reg = <0x38000000 0x10000>;
96 pinctrl-0 = <&adc12_usb_cc_pins_a>;
101 adc1: adc@0 {
134 pinctrl-0 = <&cec_pins_b>;
[all …]
/linux-6.12.1/arch/arm/mach-imx/
Dmx2x.h16 #define MX2x_AIPI_BASE_ADDR 0x10000000
18 #define MX2x_DMA_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x01000)
19 #define MX2x_WDOG_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x02000)
20 #define MX2x_GPT1_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x03000)
21 #define MX2x_GPT2_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x04000)
22 #define MX2x_GPT3_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x05000)
23 #define MX2x_PWM_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x06000)
24 #define MX2x_RTC_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x07000)
25 #define MX2x_KPP_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x08000)
26 #define MX2x_OWIRE_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x09000)
[all …]
/linux-6.12.1/arch/arm/boot/dts/arm/
Darm-realview-eb.dts31 arm,hbi = <0x140>;
56 reg = <0x10041000 0x1000>,
57 <0x10040000 0x100>;
69 interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
74 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
79 interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
84 interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH>,
85 <0 18 IRQ_TYPE_LEVEL_HIGH>;
90 interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>;
95 interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
[all …]
Darm-realview-eb-mp.dtsi46 reg = <0x1f001000 0x1000>,
47 <0x1f000100 0x100>;
56 reg = <0x10041000 0x1000>,
57 <0x10040000 0x100>;
59 interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
64 reg = <0x1f002000 0x1000>;
66 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>,
67 <0 30 IRQ_TYPE_LEVEL_HIGH>,
68 <0 31 IRQ_TYPE_LEVEL_HIGH>;
88 reg = <0x1f000000 0x100>;
[all …]
Darm-realview-pb1176.dts45 /* 128 MiB memory @ 0x0 */
46 reg = <0x00000000 0x08000000>;
67 #clock-cells = <0>;
73 #clock-cells = <0>;
82 #clock-cells = <0>;
84 clock-frequency = <0>;
89 reg = <0x30000000 0x4000000>;
98 reg = <0x38000000 0x800000>;
113 reg = <0x3c000000 0x4000000>;
121 reg = <0x3a000000 0x10000>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/soc/samsung/
Dexynos-pmu.yaml85 pattern: '^clkout([0-9]|[12][0-9]|3[0-1])$'
193 reg = <0x10040000 0x5000>;
203 #phy-cells = <0>;
/linux-6.12.1/lib/crypto/
Ddes.c31 0x00, 0x00, 0x40, 0x04, 0x10, 0x10, 0x50, 0x14,
32 0x04, 0x40, 0x44, 0x44, 0x14, 0x50, 0x54, 0x54,
33 0x02, 0x02, 0x42, 0x06, 0x12, 0x12, 0x52, 0x16,
34 0x06, 0x42, 0x46, 0x46, 0x16, 0x52, 0x56, 0x56,
35 0x80, 0x08, 0xc0, 0x0c, 0x90, 0x18, 0xd0, 0x1c,
36 0x84, 0x48, 0xc4, 0x4c, 0x94, 0x58, 0xd4, 0x5c,
37 0x82, 0x0a, 0xc2, 0x0e, 0x92, 0x1a, 0xd2, 0x1e,
38 0x86, 0x4a, 0xc6, 0x4e, 0x96, 0x5a, 0xd6, 0x5e,
39 0x20, 0x20, 0x60, 0x24, 0x30, 0x30, 0x70, 0x34,
40 0x24, 0x60, 0x64, 0x64, 0x34, 0x70, 0x74, 0x74,
[all …]
/linux-6.12.1/arch/riscv/boot/dts/sifive/
Dfu540-c000.dtsi24 #size-cells = <0>;
25 cpu0: cpu@0 {
31 reg = <0>;
182 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
183 reg = <0x0 0xc000000 0x0 0x4000000>;
184 #address-cells = <0>;
188 <&cpu0_intc 0xffffffff>,
189 <&cpu1_intc 0xffffffff>, <&cpu1_intc 9>,
190 <&cpu2_intc 0xffffffff>, <&cpu2_intc 9>,
191 <&cpu3_intc 0xffffffff>, <&cpu3_intc 9>,
[all …]
Dfu740-c000.dtsi24 #size-cells = <0>;
25 cpu0: cpu@0 {
32 reg = <0x0>;
59 reg = <0x1>;
86 reg = <0x2>;
113 reg = <0x3>;
140 reg = <0x4>;
184 #address-cells = <0>;
185 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
186 reg = <0x0 0xc000000 0x0 0x4000000>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/samsung/
Dexynos5410.dtsi31 #size-cells = <0>;
33 cpu0: cpu@0 {
36 reg = <0x0>;
43 reg = <0x1>;
50 reg = <0x2>;
57 reg = <0x3>;
70 reg = <0x10040000 0x5000>;
78 reg = <0x10010000 0x30000>;
84 reg = <0x03810000 0x0c>;
92 reg = <0x10060000 0x100>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/nxp/imx/
Dimx27.dtsi47 reg = <0x10040000 0x1000>;
53 #clock-cells = <0>;
59 #size-cells = <0>;
62 cpu: cpu@0 {
64 reg = <0>;
88 reg = <0x10000000 0x20000>;
93 reg = <0x10001000 0x1000>;
104 reg = <0x10002000 0x1000>;
111 reg = <0x10003000 0x1000>;
120 reg = <0x10004000 0x1000>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/exynos/
Dexynos7.dtsi44 #clock-cells = <0>;
49 #size-cells = <0>;
51 cpu_atlas0: cpu@0 {
54 reg = <0x0>;
56 i-cache-size = <0xc000>;
59 d-cache-size = <0x8000>;
68 reg = <0x1>;
70 i-cache-size = <0xc000>;
73 d-cache-size = <0x8000>;
82 reg = <0x2>;
[all …]
Dexynos850.dtsi52 #clock-cells = <0>;
57 #size-cells = <0>;
91 cpu0: cpu@0 {
94 reg = <0x0>;
102 reg = <0x1>;
108 reg = <0x2>;
114 reg = <0x3>;
120 reg = <0x100>;
128 reg = <0x101>;
134 reg = <0x102>;
[all …]
/linux-6.12.1/drivers/net/wan/
Dwanxlfw.S2 .psize 0
14 0x000 - 0x050 TX#0 0x050 - 0x140 RX#0
15 0x140 - 0x190 TX#1 0x190 - 0x280 RX#1
16 0x280 - 0x2D0 TX#2 0x2D0 - 0x3C0 RX#2
17 0x3C0 - 0x410 TX#3 0x410 - 0x500 RX#3
43 PCI9060_VECTOR = 0x0000006C
44 CPM_IRQ_BASE = 0x40
46 SCC1_VECTOR = (CPM_IRQ_BASE + 0x1E) * 4
47 SCC2_VECTOR = (CPM_IRQ_BASE + 0x1D) * 4
48 SCC3_VECTOR = (CPM_IRQ_BASE + 0x1C) * 4
[all …]

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