Lines Matching +full:0 +full:x10040000
55 reg = <0x38000000 0x10000>;
61 reg = <0x30000000 0x40000>;
67 reg = <0x10000000 0x40000>;
73 reg = <0x10040000 0x1000>;
79 reg = <0x10041000 0x1000>;
85 reg = <0x10042000 0x4000>;
110 pinctrl-0 = <ðernet0_rgmii_pins_d>;
121 #size-cells = <0>;
141 pinctrl-0 = <&i2c1_pins_b>;
149 reg = <0x18>;
150 #sound-dai-cells = <0>;
163 #size-cells = <0>;
165 tlv320_tx_endpoint: endpoint@0 {
166 reg = <0>;
183 reg = <0x44>;
193 st,ref-sel = <0>;
205 reg = <0x62>;
207 led-0 {
230 pinctrl-0 = <&i2c4_pins_a>;
238 reg = <0x33>;
239 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
264 regulator-initial-mode = <0>;
272 regulator-initial-mode = <0>;
281 regulator-initial-mode = <0>;
289 regulator-initial-mode = <0>;
297 interrupts = <IT_CURLIM_LDO1 0>;
306 interrupts = <IT_CURLIM_LDO2 0>;
320 interrupts = <IT_CURLIM_LDO4 0>;
327 interrupts = <IT_CURLIM_LDO5 0>;
336 interrupts = <IT_CURLIM_LDO6 0>;
347 interrupts = <IT_OCP_BOOST 0>;
352 interrupts = <IT_OCP_OTG 0>;
358 interrupts = <IT_OCP_SWOUT 0>;
365 interrupts = <IT_PONKEY_F 0>,
366 <IT_PONKEY_R 0>;
380 reg = <0x50>;
385 reg = <0x52>;
400 pinctrl-0 = <&m_can2_pins_a>;
408 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
422 pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
426 flash0: flash@0 {
428 reg = <0>;
449 pinctrl-0 = <&sai2a_pins_b>, <&sai2b_pins_d>;
459 #clock-cells = <0>;
473 #clock-cells = <0>;
487 pinctrl-0 = <&sdmmc1_b4_pins_b>;
500 pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_e>;
515 pinctrl-0 = <&spi1_pins_a>;
517 cs-gpios = <&gpioz 3 0>;
523 pinctrl-0 = <&uart4_pins_a>;
534 pinctrl-0 = <&usart1_pins_b &usart1_pins_a>;
543 pinctrl-0 = <&usart3_pins_a>;
558 phys = <&usbphyc_port1 0>;