Lines Matching +full:0 +full:x10040000
30 reg = <0xC0000000 0x40000000>;
40 reg = <0x10000000 0x40000>;
46 reg = <0x10040000 0x1000>;
52 reg = <0x10041000 0x1000>;
58 reg = <0x10042000 0x4000>;
64 reg = <0x30000000 0x40000>;
70 reg = <0x38000000 0x10000>;
95 gpios-states = <0>;
96 states = <1800000 0x1>,
97 <2900000 0x0>;
111 pinctrl-0 = <&adc1_in6_pins_a>;
117 adc1: adc@0 {
119 channel@0 {
120 reg = <0>;
145 pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
166 pinctrl-0 = <&i2c4_pins_a>;
178 reg = <0x33>;
179 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
206 regulator-initial-mode = <0>;
215 regulator-initial-mode = <0>;
225 regulator-initial-mode = <0>;
235 regulator-initial-mode = <0>;
242 interrupts = <IT_CURLIM_LDO1 0>;
249 interrupts = <IT_CURLIM_LDO2 0>;
262 interrupts = <IT_CURLIM_LDO4 0>;
269 interrupts = <IT_CURLIM_LDO5 0>;
277 interrupts = <IT_CURLIM_LDO6 0>;
287 interrupts = <IT_OCP_BOOST 0>;
292 interrupts = <IT_OCP_OTG 0>;
297 interrupts = <IT_OCP_SWOUT 0>;
304 interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
329 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
351 pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
371 pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
397 pinctrl-0 = <&uart4_pins_a>;