dts/st/stm32mp15xx-dkx.dtsi

19 		reg = <0xc0000000 0x20000000>;
29 			reg = <0x10000000 0x40000>;
35 			reg = <0x10040000 0x1000>;
41 			reg = <0x10041000 0x1000>;
47 			reg = <0x10042000 0x4000>;
53 			reg = <0x30000000 0x40000>;
59 			reg = <0x38000000 0x10000>;
96 	pinctrl-0 = <&adc12_usb_cc_pins_a>;
101 	adc1: adc@0 {
134 	pinctrl-0 = <&cec_pins_b>;
149 	pinctrl-0 = <&ethernet0_rgmii_pins_a>;
158 		#size-cells = <0>;
160 		phy0: ethernet-phy@0 {
161 			reg = <0>;
172 	pinctrl-0 = <&i2c1_pins_a>;
182 		reg = <0x39>;
188 		#sound-dai-cells = <0>;
193 			#size-cells = <0>;
195 			port@0 {
196 				reg = <0>;
213 		reg = <0x4a>;
214 		#sound-dai-cells = <0>;
226 			#size-cells = <0>;
228 			cs42l51_tx_endpoint: endpoint@0 {
229 				reg = <0>;
247 	pinctrl-0 = <&i2c4_pins_a>;
259 		reg = <0x28>;
263 		pinctrl-0 = <&stusb1600_pins_a>;
283 		reg = <0x33>;
284 		interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
311 				regulator-initial-mode = <0>;
320 				regulator-initial-mode = <0>;
330 				regulator-initial-mode = <0>;
340 				regulator-initial-mode = <0>;
348 				interrupts = <IT_CURLIM_LDO1 0>;
356 				interrupts = <IT_CURLIM_LDO2 0>;
369 				interrupts = <IT_CURLIM_LDO4 0>;
376 				interrupts = <IT_CURLIM_LDO5 0>;
385 				interrupts = <IT_CURLIM_LDO6 0>;
395 				interrupts = <IT_OCP_BOOST 0>;
400 				interrupts = <IT_OCP_OTG 0>;
405 				interrupts = <IT_OCP_SWOUT 0>;
412 			interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
427 	pinctrl-0 = <&i2c5_pins_a>;
442 	pinctrl-0 = <&i2s2_pins_a>;
466 	pinctrl-0 = <&ltdc_pins_a>;
480 	mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
504 	pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pins_b>;
509 		#clock-cells = <0>;
545 	pinctrl-0 = <&sdmmc1_b4_pins_a>;
558 	pinctrl-0 = <&sdmmc3_b4_pins_a>;
574 		pinctrl-0 = <&pwm1_pins_a>;
579 	timer@0 {
589 		pinctrl-0 = <&pwm3_pins_a>;
604 		pinctrl-0 = <&pwm4_pins_a &pwm4_pins_b>;
619 		pinctrl-0 = <&pwm5_pins_a>;
643 		pinctrl-0 = <&pwm12_pins_a>;
655 	pinctrl-0 = <&uart4_pins_a>;
665 	pinctrl-0 = <&uart7_pins_c>;
675 	pinctrl-0 = <&usart3_pins_c>;
685 	#size-cells = <0>;
695 	phys = <&usbphyc_port1 0>;