/linux-6.12.1/drivers/input/keyboard/ |
D | imx_keypad.c | 49 void __iomem *mmio_base; member 94 reg_val = readw(keypad->mmio_base + KPDR); in imx_keypad_scan_matrix() 96 writew(reg_val, keypad->mmio_base + KPDR); in imx_keypad_scan_matrix() 98 reg_val = readw(keypad->mmio_base + KPCR); in imx_keypad_scan_matrix() 100 writew(reg_val, keypad->mmio_base + KPCR); in imx_keypad_scan_matrix() 104 reg_val = readw(keypad->mmio_base + KPCR); in imx_keypad_scan_matrix() 106 writew(reg_val, keypad->mmio_base + KPCR); in imx_keypad_scan_matrix() 113 reg_val = readw(keypad->mmio_base + KPDR); in imx_keypad_scan_matrix() 115 writew(reg_val, keypad->mmio_base + KPDR); in imx_keypad_scan_matrix() 127 reg_val = readw(keypad->mmio_base + KPDR); in imx_keypad_scan_matrix() [all …]
|
/linux-6.12.1/drivers/pwm/ |
D | pwm-tiecap.c | 36 void __iomem *mmio_base; member 74 value = readw(pc->mmio_base + ECCTL2); in ecap_pwm_config() 79 writew(value, pc->mmio_base + ECCTL2); in ecap_pwm_config() 83 writel(duty_cycles, pc->mmio_base + CAP2); in ecap_pwm_config() 84 writel(period_cycles, pc->mmio_base + CAP1); in ecap_pwm_config() 91 writel(duty_cycles, pc->mmio_base + CAP4); in ecap_pwm_config() 92 writel(period_cycles, pc->mmio_base + CAP3); in ecap_pwm_config() 96 value = readw(pc->mmio_base + ECCTL2); in ecap_pwm_config() 99 writew(value, pc->mmio_base + ECCTL2); in ecap_pwm_config() 115 value = readw(pc->mmio_base + ECCTL2); in ecap_pwm_set_polarity() [all …]
|
D | pwm-tiehrpwm.c | 109 void __iomem *mmio_base; member 210 ehrpwm_modify(pc->mmio_base, aqctl_reg, aqctl_mask, aqctl_val); in configure_polarity() 277 ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_CLKDIV_MASK, tb_divval); in ehrpwm_pwm_config() 284 ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_PRDLD_MASK, TBCTL_PRDLD_SHDW); in ehrpwm_pwm_config() 286 ehrpwm_write(pc->mmio_base, TBPRD, period_cycles); in ehrpwm_pwm_config() 289 ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_CTRMODE_MASK, in ehrpwm_pwm_config() 299 ehrpwm_write(pc->mmio_base, cmp_reg, duty_cycles); in ehrpwm_pwm_config() 337 ehrpwm_modify(pc->mmio_base, AQSFRC, AQSFRC_RLDCSF_MASK, in ehrpwm_pwm_enable() 340 ehrpwm_modify(pc->mmio_base, AQCSFRC, aqcsfrc_mask, aqcsfrc_val); in ehrpwm_pwm_enable() 371 ehrpwm_modify(pc->mmio_base, AQSFRC, AQSFRC_RLDCSF_MASK, in ehrpwm_pwm_disable() [all …]
|
D | pwm-imx27.c | 85 void __iomem *mmio_base; member 135 val = readl(imx->mmio_base + MX3_PWMCR); in pwm_imx27_get_state() 155 val = readl(imx->mmio_base + MX3_PWMPR); in pwm_imx27_get_state() 167 val = readl(imx->mmio_base + MX3_PWMSAR); in pwm_imx27_get_state() 186 writel(MX3_PWMCR_SWR, imx->mmio_base + MX3_PWMCR); in pwm_imx27_sw_reset() 189 cr = readl(imx->mmio_base + MX3_PWMCR); in pwm_imx27_sw_reset() 206 sr = readl(imx->mmio_base + MX3_PWMSR); in pwm_imx27_wait_fifo_slot() 213 sr = readl(imx->mmio_base + MX3_PWMSR); in pwm_imx27_wait_fifo_slot() 266 writel(duty_cycles, imx->mmio_base + MX3_PWMSAR); in pwm_imx27_apply() 267 writel(period_cycles, imx->mmio_base + MX3_PWMPR); in pwm_imx27_apply() [all …]
|
D | pwm-imx1.c | 30 void __iomem *mmio_base; member 87 max = readl(imx->mmio_base + MX1_PWMP); in pwm_imx1_config() 90 writel(max - p, imx->mmio_base + MX1_PWMS); in pwm_imx1_config() 105 value = readl(imx->mmio_base + MX1_PWMC); in pwm_imx1_enable() 107 writel(value, imx->mmio_base + MX1_PWMC); in pwm_imx1_enable() 117 value = readl(imx->mmio_base + MX1_PWMC); in pwm_imx1_disable() 119 writel(value, imx->mmio_base + MX1_PWMC); in pwm_imx1_disable() 181 imx->mmio_base = devm_platform_ioremap_resource(pdev, 0); in pwm_imx1_probe() 182 if (IS_ERR(imx->mmio_base)) in pwm_imx1_probe() 183 return PTR_ERR(imx->mmio_base); in pwm_imx1_probe()
|
D | pwm-pxa.c | 55 void __iomem *mmio_base; member 95 writel(prescale | PWMCR_SD, pc->mmio_base + offset + PWMCR); in pxa_pwm_config() 96 writel(dc, pc->mmio_base + offset + PWMDCR); in pxa_pwm_config() 97 writel(pv, pc->mmio_base + offset + PWMPCR); in pxa_pwm_config() 187 pc->mmio_base = devm_platform_ioremap_resource(pdev, 0); in pwm_probe() 188 if (IS_ERR(pc->mmio_base)) in pwm_probe() 189 return PTR_ERR(pc->mmio_base); in pwm_probe()
|
D | pwm-spear.c | 53 void __iomem *mmio_base; member 65 return readl_relaxed(chip->mmio_base + (num << 4) + offset); in spear_pwm_readl() 72 writel_relaxed(val, chip->mmio_base + (num << 4) + offset); in spear_pwm_writel() 205 pc->mmio_base = devm_platform_ioremap_resource(pdev, 0); in spear_pwm_probe() 206 if (IS_ERR(pc->mmio_base)) in spear_pwm_probe() 207 return PTR_ERR(pc->mmio_base); in spear_pwm_probe() 226 val = readl_relaxed(pc->mmio_base + PWMMCR); in spear_pwm_probe() 228 writel_relaxed(val, pc->mmio_base + PWMMCR); in spear_pwm_probe()
|
/linux-6.12.1/drivers/edac/ |
D | al_mc_edac.c | 57 void __iomem *mmio_base; member 83 eccerrcnt = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_ERR_COUNT); in handle_ce() 88 ecccaddr0 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_ADDR0); in handle_ce() 89 ecccaddr1 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_ADDR1); in handle_ce() 90 ecccsyn0 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_SYND0); in handle_ce() 91 ecccsyn1 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_SYND1); in handle_ce() 92 ecccsyn2 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_SYND2); in handle_ce() 95 al_mc->mmio_base + AL_MC_ECC_CLEAR); in handle_ce() 128 eccerrcnt = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_ERR_COUNT); in handle_ue() 133 eccuaddr0 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_UE_ADDR0); in handle_ue() [all …]
|
/linux-6.12.1/drivers/net/wireless/broadcom/b43/ |
D | pio.h | 72 u16 mmio_base; member 101 u16 mmio_base; member 111 return b43_read16(q->dev, q->mmio_base + offset); in b43_piotx_read16() 116 return b43_read32(q->dev, q->mmio_base + offset); in b43_piotx_read32() 122 b43_write16(q->dev, q->mmio_base + offset, value); in b43_piotx_write16() 128 b43_write32(q->dev, q->mmio_base + offset, value); in b43_piotx_write32() 134 return b43_read16(q->dev, q->mmio_base + offset); in b43_piorx_read16() 139 return b43_read32(q->dev, q->mmio_base + offset); in b43_piorx_read32() 145 b43_write16(q->dev, q->mmio_base + offset, value); in b43_piorx_write16() 151 b43_write32(q->dev, q->mmio_base + offset, value); in b43_piorx_write32()
|
/linux-6.12.1/drivers/ata/ |
D | sata_sil.c | 254 void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR]; in sil_bmdma_stop() local 255 void __iomem *bmdma2 = mmio_base + sil_port[ap->port_no].bmdma2; in sil_bmdma_stop() 280 void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR]; in sil_bmdma_start() local 281 void __iomem *bmdma2 = mmio_base + sil_port[ap->port_no].bmdma2; in sil_bmdma_start() 348 void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR]; in sil_set_mode() local 349 void __iomem *addr = mmio_base + sil_port[ap->port_no].xfer_mode; in sil_set_mode() 509 void __iomem *mmio_base = host->iomap[SIL_MMIO_BAR]; in sil_interrupt() local 517 u32 bmdma2 = readl(mmio_base + sil_port[ap->port_no].bmdma2); in sil_interrupt() 538 void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR]; in sil_freeze() local 542 writel(0, mmio_base + sil_port[ap->port_no].sien); in sil_freeze() [all …]
|
D | pata_pdc2027x.c | 461 void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR]; in pdc_read_counter() local 467 bccrl = ioread32(mmio_base + PDC_BYTE_COUNT) & 0x7fff; in pdc_read_counter() 468 bccrh = ioread32(mmio_base + PDC_BYTE_COUNT + 0x100) & 0x7fff; in pdc_read_counter() 471 bccrlv = ioread32(mmio_base + PDC_BYTE_COUNT) & 0x7fff; in pdc_read_counter() 472 bccrhv = ioread32(mmio_base + PDC_BYTE_COUNT + 0x100) & 0x7fff; in pdc_read_counter() 502 void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR]; in pdc_adjust_pll() local 521 pll_ctl = ioread16(mmio_base + PDC_PLL_CTL); in pdc_adjust_pll() 560 iowrite16(pll_ctl, mmio_base + PDC_PLL_CTL); in pdc_adjust_pll() 561 ioread16(mmio_base + PDC_PLL_CTL); /* flush */ in pdc_adjust_pll() 570 pll_ctl = ioread16(mmio_base + PDC_PLL_CTL); in pdc_adjust_pll() [all …]
|
D | sata_qstor.c | 192 u8 __iomem *mmio_base = qs_mmio_base(ap->host); in qs_freeze() local 194 writeb(0, mmio_base + QS_HCT_CTRL); /* disable host interrupts */ in qs_freeze() 200 u8 __iomem *mmio_base = qs_mmio_base(ap->host); in qs_thaw() local 203 writeb(1, mmio_base + QS_HCT_CTRL); /* enable host interrupts */ in qs_thaw() 354 u8 __iomem *mmio_base = qs_mmio_base(host); in qs_intr_pkt() local 357 u32 sff0 = readl(mmio_base + QS_HST_SFF); in qs_intr_pkt() 358 u32 sff1 = readl(mmio_base + QS_HST_SFF + 4); in qs_intr_pkt() 460 void __iomem *mmio_base = qs_mmio_base(ap->host); in qs_port_start() local 461 void __iomem *chan = mmio_base + (ap->port_no * 0x4000); in qs_port_start() 482 void __iomem *mmio_base = qs_mmio_base(host); in qs_host_stop() local [all …]
|
D | pata_sil680.c | 340 void __iomem *mmio_base; in sil680_init_one() local 380 mmio_base = host->iomap[SIL680_MMIO_BAR]; in sil680_init_one() 381 host->ports[0]->ioaddr.bmdma_addr = mmio_base + 0x00; in sil680_init_one() 382 host->ports[0]->ioaddr.cmd_addr = mmio_base + 0x80; in sil680_init_one() 383 host->ports[0]->ioaddr.ctl_addr = mmio_base + 0x8a; in sil680_init_one() 384 host->ports[0]->ioaddr.altstatus_addr = mmio_base + 0x8a; in sil680_init_one() 386 host->ports[1]->ioaddr.bmdma_addr = mmio_base + 0x08; in sil680_init_one() 387 host->ports[1]->ioaddr.cmd_addr = mmio_base + 0xc0; in sil680_init_one() 388 host->ports[1]->ioaddr.ctl_addr = mmio_base + 0xca; in sil680_init_one() 389 host->ports[1]->ioaddr.altstatus_addr = mmio_base + 0xca; in sil680_init_one()
|
D | sata_inic162x.c | 234 void __iomem *mmio_base; member 268 return hpriv->mmio_base + ap->port_no * PORT_SIZE; in inic_port_base() 426 host_irq_stat = readw(hpriv->mmio_base + HOST_IRQ_STAT); in inic_interrupt() 752 static int init_controller(void __iomem *mmio_base, u16 hctl) in init_controller() argument 762 writew(hctl | HCTL_SOFTRST, mmio_base + HOST_CTL); in init_controller() 763 readw(mmio_base + HOST_CTL); /* flush */ in init_controller() 767 val = readw(mmio_base + HOST_CTL); in init_controller() 777 void __iomem *port_base = mmio_base + i * PORT_SIZE; in init_controller() 784 writew(hctl & ~HCTL_IRQOFF, mmio_base + HOST_CTL); in init_controller() 785 val = readw(mmio_base + HOST_IRQ_MASK); in init_controller() [all …]
|
/linux-6.12.1/drivers/usb/host/ |
D | ohci-pxa27x.c | 120 void __iomem *mmio_base; member 139 uint32_t uhcrhda = __raw_readl(pxa_ohci->mmio_base + UHCRHDA); in pxa27x_ohci_select_pmm() 140 uint32_t uhcrhdb = __raw_readl(pxa_ohci->mmio_base + UHCRHDB); in pxa27x_ohci_select_pmm() 164 __raw_writel(uhcrhda, pxa_ohci->mmio_base + UHCRHDA); in pxa27x_ohci_select_pmm() 165 __raw_writel(uhcrhdb, pxa_ohci->mmio_base + UHCRHDB); in pxa27x_ohci_select_pmm() 220 uint32_t uhchr = __raw_readl(pxa_ohci->mmio_base + UHCHR); in pxa27x_setup_hc() 221 uint32_t uhcrhda = __raw_readl(pxa_ohci->mmio_base + UHCRHDA); in pxa27x_setup_hc() 253 __raw_writel(uhchr, pxa_ohci->mmio_base + UHCHR); in pxa27x_setup_hc() 254 __raw_writel(uhcrhda, pxa_ohci->mmio_base + UHCRHDA); in pxa27x_setup_hc() 259 uint32_t uhchr = __raw_readl(pxa_ohci->mmio_base + UHCHR); in pxa27x_reset_hc() [all …]
|
/linux-6.12.1/drivers/clk/mmp/ |
D | clk-audio.c | 61 void __iomem *mmio_base; member 125 aud_pll_ctrl0 = readl(priv->mmio_base + SSPA_AUD_PLL_CTRL0); in audio_pll_recalc_rate() 133 aud_pll_ctrl1 = readl(priv->mmio_base + SSPA_AUD_PLL_CTRL1); in audio_pll_recalc_rate() 216 writel(val, priv->mmio_base + SSPA_AUD_PLL_CTRL0); in audio_pll_set_rate() 220 writel(val, priv->mmio_base + SSPA_AUD_PLL_CTRL1); in audio_pll_set_rate() 257 priv->sspa_mux.reg = priv->mmio_base + SSPA_AUD_CTRL; in register_clocks() 267 priv->sysclk_div.reg = priv->mmio_base + SSPA_AUD_CTRL; in register_clocks() 280 priv->sysclk_gate.reg = priv->mmio_base + SSPA_AUD_CTRL; in register_clocks() 288 priv->sspa0_div.reg = priv->mmio_base + SSPA_AUD_CTRL; in register_clocks() 301 priv->sspa0_gate.reg = priv->mmio_base + SSPA_AUD_CTRL; in register_clocks() [all …]
|
/linux-6.12.1/drivers/thermal/ |
D | thermal_mmio.c | 12 void __iomem *mmio_base; member 13 u32 (*read_mmio)(void __iomem *mmio_base); 18 static u32 thermal_mmio_readb(void __iomem *mmio_base) in thermal_mmio_readb() argument 20 return readb(mmio_base); in thermal_mmio_readb() 28 t = sensor->read_mmio(sensor->mmio_base) & sensor->mask; in thermal_mmio_get_temperature() 53 sensor->mmio_base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); in thermal_mmio_probe() 54 if (IS_ERR(sensor->mmio_base)) in thermal_mmio_probe() 55 return PTR_ERR(sensor->mmio_base); in thermal_mmio_probe()
|
/linux-6.12.1/drivers/misc/vmw_vmci/ |
D | vmci_guest.c | 55 void __iomem *mmio_base; member 104 if (dev->mmio_base != NULL) in vmci_read_reg() 105 return readl(dev->mmio_base + reg); in vmci_read_reg() 111 if (dev->mmio_base != NULL) in vmci_write_reg() 112 writel(val, dev->mmio_base + reg); in vmci_write_reg() 120 if (vmci_dev->mmio_base == NULL) in vmci_read_data() 152 if (dev->mmio_base != NULL) { in vmci_write_data() 312 bool is_io_port = vmci_dev->mmio_base == NULL; in vmci_dispatch_dgs() 555 if (vmci_dev->mmio_base != NULL) { in vmci_free_dg_buffers() 579 void __iomem *mmio_base = NULL; in vmci_guest_probe_device() local [all …]
|
/linux-6.12.1/drivers/gpu/drm/xe/ |
D | xe_hw_engine.c | 48 u32 mmio_base; member 58 .mmio_base = RENDER_RING_BASE, 66 .mmio_base = BLT_RING_BASE, 74 .mmio_base = XEHPC_BCS1_RING_BASE, 82 .mmio_base = XEHPC_BCS2_RING_BASE, 90 .mmio_base = XEHPC_BCS3_RING_BASE, 98 .mmio_base = XEHPC_BCS4_RING_BASE, 106 .mmio_base = XEHPC_BCS5_RING_BASE, 114 .mmio_base = XEHPC_BCS6_RING_BASE, 122 .mmio_base = XEHPC_BCS7_RING_BASE, [all …]
|
/linux-6.12.1/drivers/rtc/ |
D | rtc-ep93xx.c | 30 void __iomem *mmio_base; member 40 comp = readl(ep93xx_rtc->mmio_base + EP93XX_RTC_SWCOMP); in ep93xx_rtc_get_swcomp() 58 time = readl(ep93xx_rtc->mmio_base + EP93XX_RTC_DATA); in ep93xx_rtc_read_time() 69 writel(secs + 1, ep93xx_rtc->mmio_base + EP93XX_RTC_LOAD); in ep93xx_rtc_set_time() 132 ep93xx_rtc->mmio_base = devm_platform_ioremap_resource(pdev, 0); in ep93xx_rtc_probe() 133 if (IS_ERR(ep93xx_rtc->mmio_base)) in ep93xx_rtc_probe() 134 return PTR_ERR(ep93xx_rtc->mmio_base); in ep93xx_rtc_probe()
|
/linux-6.12.1/drivers/thermal/intel/int340x_thermal/ |
D | processor_thermal_mbox.c | 29 data = readl(proc_priv->mmio_base + MBOX_OFFSET_INTERFACE); in wait_for_mbox_ready() 52 writel(data, (proc_priv->mmio_base + MBOX_OFFSET_DATA)); in send_mbox_write_cmd() 55 writel(reg_data, (proc_priv->mmio_base + MBOX_OFFSET_INTERFACE)); in send_mbox_write_cmd() 73 writel(reg_data, (proc_priv->mmio_base + MBOX_OFFSET_INTERFACE)); in send_mbox_read_cmd() 80 *resp = readl(proc_priv->mmio_base + MBOX_OFFSET_DATA); in send_mbox_read_cmd() 82 *resp = readq(proc_priv->mmio_base + MBOX_OFFSET_DATA); in send_mbox_read_cmd()
|
/linux-6.12.1/drivers/video/fbdev/mb862xx/ |
D | mb862xxfbdrv.c | 624 par->host = par->mmio_base; in mb862xx_gdc_init() 625 par->i2c = par->mmio_base + MB862XX_I2C_BASE; in mb862xx_gdc_init() 626 par->disp = par->mmio_base + MB862XX_DISP_BASE; in mb862xx_gdc_init() 627 par->cap = par->mmio_base + MB862XX_CAP_BASE; in mb862xx_gdc_init() 628 par->draw = par->mmio_base + MB862XX_DRAW_BASE; in mb862xx_gdc_init() 629 par->geo = par->mmio_base + MB862XX_GEO_BASE; in mb862xx_gdc_init() 630 par->pio = par->mmio_base + MB862XX_PIO_BASE; in mb862xx_gdc_init() 725 par->mmio_base = ioremap(par->mmio_base_phys, par->mmio_len); in of_platform_mb862xx_probe() 726 if (par->mmio_base == NULL) { in of_platform_mb862xx_probe() 772 iounmap(par->mmio_base); in of_platform_mb862xx_probe() [all …]
|
/linux-6.12.1/drivers/soundwire/ |
D | intel_init.c | 66 link->mmio_base = res->mmio_base; in intel_link_dev_register() 68 link->registers = res->mmio_base + SDW_LINK_BASE in intel_link_dev_register() 71 link->shim = res->mmio_base + res->shim_base; in intel_link_dev_register() 72 link->alh = res->mmio_base + res->alh_base; in intel_link_dev_register() 75 link->registers = res->mmio_base + SDW_IP_BASE(link_id); in intel_link_dev_register() 77 link->shim = res->mmio_base + SDW_SHIM2_GENERIC_BASE(link_id); in intel_link_dev_register() 78 link->shim_vs = res->mmio_base + SDW_SHIM2_VS_BASE(link_id); in intel_link_dev_register() 206 ctx->mmio_base = res->mmio_base; in sdw_intel_probe_controller()
|
/linux-6.12.1/drivers/net/ethernet/broadcom/ |
D | bgmac.c | 46 if (!ring->mmio_base) in bgmac_dma_tx_reset() 53 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL, in bgmac_dma_tx_reset() 56 val = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS); in bgmac_dma_tx_reset() 68 ring->mmio_base, val); in bgmac_dma_tx_reset() 71 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL, 0); in bgmac_dma_tx_reset() 73 ring->mmio_base + BGMAC_DMA_TX_STATUS, in bgmac_dma_tx_reset() 77 ring->mmio_base); in bgmac_dma_tx_reset() 79 val = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS); in bgmac_dma_tx_reset() 82 ring->mmio_base); in bgmac_dma_tx_reset() 91 ctl = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL); in bgmac_dma_tx_enable() [all …]
|
/linux-6.12.1/drivers/platform/mellanox/ |
D | mlxbf-pmc.c | 121 void __iomem *mmio_base; member 1099 return mlxbf_pmc_write(pmc->block[blk_num].mmio_base + in mlxbf_pmc_config_l3_counters() 1118 pmcaddr = pmc->block[blk_num].mmio_base + in mlxbf_pmc_program_l3_counter() 1123 pmcaddr = pmc->block[blk_num].mmio_base + in mlxbf_pmc_program_l3_counter() 1175 addr = pmc->block[blk_num].mmio_base + in mlxbf_pmc_program_crspace_counter() 1197 addr = pmc->block[blk_num].mmio_base + in mlxbf_pmc_clear_crspace_counter() 1234 if (mlxbf_pmc_write(pmc->block[blk_num].mmio_base + in mlxbf_pmc_program_counter() 1248 if (mlxbf_pmc_write(pmc->block[blk_num].mmio_base + in mlxbf_pmc_program_counter() 1259 if (mlxbf_pmc_write(pmc->block[blk_num].mmio_base + in mlxbf_pmc_program_counter() 1274 status = mlxbf_pmc_readl(pmc->block[blk_num].mmio_base + in mlxbf_pmc_read_l3_counter() [all …]
|