254 	void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR];  in sil_bmdma_stop()  local
255 	void __iomem *bmdma2 = mmio_base + sil_port[ap->port_no].bmdma2;  in sil_bmdma_stop()
280 	void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR];  in sil_bmdma_start()  local
281 	void __iomem *bmdma2 = mmio_base + sil_port[ap->port_no].bmdma2;  in sil_bmdma_start()
348 	void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR];  in sil_set_mode()  local
349 	void __iomem *addr = mmio_base + sil_port[ap->port_no].xfer_mode;  in sil_set_mode()
509 	void __iomem *mmio_base = host->iomap[SIL_MMIO_BAR];  in sil_interrupt()  local
517 		u32 bmdma2 = readl(mmio_base + sil_port[ap->port_no].bmdma2);  in sil_interrupt()
538 	void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR];  in sil_freeze()  local
542 	writel(0, mmio_base + sil_port[ap->port_no].sien);  in sil_freeze()
545 	tmp = readl(mmio_base + SIL_SYSCFG);  in sil_freeze()
547 	writel(tmp, mmio_base + SIL_SYSCFG);  in sil_freeze()
548 	readl(mmio_base + SIL_SYSCFG);	/* flush */  in sil_freeze()
566 	void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR];  in sil_thaw()  local
575 		writel(SIL_SIEN_N, mmio_base + sil_port[ap->port_no].sien);  in sil_thaw()
578 	tmp = readl(mmio_base + SIL_SYSCFG);  in sil_thaw()
580 	writel(tmp, mmio_base + SIL_SYSCFG);  in sil_thaw()
653 	void __iomem *mmio_base = host->iomap[SIL_MMIO_BAR];  in sil_init_controller()  local
665 			       mmio_base + sil_port[i].fifo_cfg);  in sil_init_controller()
675 			tmp = readl(mmio_base + sil_port[i].sfis_cfg);  in sil_init_controller()
681 			writel(tmp & ~0x3, mmio_base + sil_port[i].sfis_cfg);  in sil_init_controller()
688 		tmp = readl(mmio_base + sil_port[2].bmdma);  in sil_init_controller()
691 			       mmio_base + sil_port[2].bmdma);  in sil_init_controller()
727 	void __iomem *mmio_base;  in sil_init_one()  local
765 	mmio_base = host->iomap[SIL_MMIO_BAR];  in sil_init_one()
771 		ioaddr->cmd_addr = mmio_base + sil_port[i].tf;  in sil_init_one()
773 		ioaddr->ctl_addr = mmio_base + sil_port[i].ctl;  in sil_init_one()
774 		ioaddr->bmdma_addr = mmio_base + sil_port[i].bmdma;  in sil_init_one()
775 		ioaddr->scr_addr = mmio_base + sil_port[i].scr;  in sil_init_one()