| /linux-6.12.1/drivers/fpga/ |
| D | altera-freeze-bridge.c | 1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/fpga/fpga-bridge.h>
35 bool enable; member
39 * Poll status until status bit is set or we have a timeout.
42 u32 timeout, u32 req_ack) in altera_freeze_br_req_ack() argument
44 struct device *dev = priv->dev; in altera_freeze_br_req_ack()
45 void __iomem *csr_illegal_req_addr = priv->base_addr + in altera_freeze_br_req_ack()
48 int ret = -ETIMEDOUT; in altera_freeze_br_req_ack()
62 ret = -EINVAL; in altera_freeze_br_req_ack()
66 status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET); in altera_freeze_br_req_ack()
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| /linux-6.12.1/drivers/watchdog/ |
| D | smsc37b787_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * any of this software. This material is provided "AS-IS" in
12 * (C) Copyright 2003-2006 Sven Anders <anders@anduras.de>
15 * 2003 - Created version 1.0 for Linux 2.4.x.
16 * 2006 - Ported to Linux 2.6, added nowayout and MAGICCLOSE
33 * reset the system (causing a reboot) after the timeout occurs.
38 * For an example userspace keep-alive daemon, see:
60 /* enable support for minutes as units? */
77 static int timeout = 60; /* timeout value: default is 60 "units" */ variable
86 /* -- Low level function ----------------------------------------*/
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| D | meson_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
35 static unsigned int timeout; variable
38 unsigned int enable; member
44 .enable = BIT(22),
50 .enable = BIT(19),
67 tc_reboot |= meson_wdt->data->enable; in meson_wdt_restart()
70 writel(tc_reboot, meson_wdt->wdt_base + MESON_WDT_TC); in meson_wdt_restart()
81 writel(0, meson_wdt->wdt_base + MESON_WDT_RESET); in meson_wdt_ping()
87 unsigned int timeout) in meson_wdt_change_timeout() argument
92 reg = readl(meson_wdt->wdt_base + MESON_WDT_TC); in meson_wdt_change_timeout()
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| D | sprd_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2017 Spreadtrum - http://www.spreadtrum.com
62 struct clk *enable; member
86 sprd_wdt_unlock(wdt->base); in sprd_wdt_isr()
87 writel_relaxed(SPRD_WDT_INT_CLEAR_BIT, wdt->base + SPRD_WDT_INT_CLR); in sprd_wdt_isr()
88 sprd_wdt_lock(wdt->base); in sprd_wdt_isr()
89 watchdog_notify_pretimeout(&wdt->wdd); in sprd_wdt_isr()
97 val = readl_relaxed(wdt->base + SPRD_WDT_CNT_HIGH) << in sprd_wdt_get_cnt_value()
99 val |= readl_relaxed(wdt->base + SPRD_WDT_CNT_LOW) & in sprd_wdt_get_cnt_value()
105 static int sprd_wdt_load_value(struct sprd_wdt *wdt, u32 timeout, in sprd_wdt_load_value() argument
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| D | pc87413_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * NS pc87413-wdt Watchdog Timer driver for Linux 2.6.x.x
12 * This material is provided "AS-IS" and at no charge.
42 #define DPFX MODNAME " - DEBUG: "
48 #define WDCTL 0x10 /* Watchdog-Timer-Control-Register */
49 #define WDTO 0x11 /* Watchdog timeout register */
55 static int swc_base_addr = -1;
57 static int timeout = DEFAULT_TIMEOUT; /* timeout value */ variable
66 /* -- Low level function ----------------------------------------*/
92 /* Enable SWC functions */
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| D | imx7ulp_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0
78 return -ETIMEDOUT; in imx7ulp_wdt_wait_ulk()
86 u32 val = readl(wdt->base + WDOG_CS); in imx7ulp_wdt_wait_rcs()
87 u64 timeout = (val & WDOG_CS_PRES) ? in imx7ulp_wdt_wait_rcs() local
93 readl_poll_timeout(wdt->base + WDOG_CS, val, val & WDOG_CS_RCS, 100, in imx7ulp_wdt_wait_rcs()
94 timeout)) in imx7ulp_wdt_wait_rcs()
95 ret = -ETIMEDOUT; in imx7ulp_wdt_wait_rcs()
98 if (wdt->hw->post_rcs_wait) in imx7ulp_wdt_wait_rcs()
104 static int _imx7ulp_wdt_enable(struct imx7ulp_wdt_device *wdt, bool enable) in _imx7ulp_wdt_enable() argument
106 u32 val = readl(wdt->base + WDOG_CS); in _imx7ulp_wdt_enable()
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| D | ftwdt010_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 * Inspired by the out-of-tree drivers from OpenWRT:
51 unsigned int timeout, in ftwdt010_enable() argument
54 u32 enable; in ftwdt010_enable() local
56 writel(timeout * WDT_CLOCK, gwdt->base + FTWDT010_WDLOAD); in ftwdt010_enable()
57 writel(WDRESTART_MAGIC, gwdt->base + FTWDT010_WDRESTART); in ftwdt010_enable()
59 enable = WDCR_CLOCK_5MHZ | WDCR_SYS_RST; in ftwdt010_enable()
60 writel(enable, gwdt->base + FTWDT010_WDCR); in ftwdt010_enable()
62 enable |= WDCR_WDINTR; in ftwdt010_enable()
63 enable |= WDCR_ENABLE; in ftwdt010_enable()
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| D | npcm_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0
19 #define NPCM_WTE BIT(7) /* Enable */
20 #define NPCM_WTIE BIT(6) /* Enable irq */
24 #define NPCM_WTRE BIT(1) /* Reset enable */
60 val = readl(wdt->reg); in npcm_wdt_ping()
61 writel(val | NPCM_WTR, wdt->reg); in npcm_wdt_ping()
71 if (wdt->clk) in npcm_wdt_start()
72 clk_prepare_enable(wdt->clk); in npcm_wdt_start()
74 if (wdd->timeout < 2) in npcm_wdt_start()
76 else if (wdd->timeout < 3) in npcm_wdt_start()
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| D | via_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0-only
26 #define VIA_WDT_CONF 0xec /* watchdog enable state */
29 #define VIA_WDT_CONF_ENABLE 0x01 /* 1: enable watchdog */
30 #define VIA_WDT_CONF_MMIO 0x02 /* 1: enable watchdog MMIO */
53 /* User space timeout in seconds */
56 static int timeout = WDT_TIMEOUT; variable
57 module_param(timeout, int, 0);
58 MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds, between 1 and 1023 "
103 /* calculate when the next userspace timeout will be */ in wdt_ping()
104 next_heartbeat = jiffies + wdd->timeout * HZ; in wdt_ping()
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| D | mtk_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0+
12 #include <dt-bindings/reset/mt2712-resets.h>
13 #include <dt-bindings/reset/mediatek,mt6795-resets.h>
14 #include <dt-bindings/reset/mt7986-resets.h>
15 #include <dt-bindings/reset/mt8183-resets.h>
16 #include <dt-bindings/reset/mt8186-resets.h>
17 #include <dt-bindings/reset/mt8188-resets.h>
18 #include <dt-bindings/reset/mt8192-resets.h>
19 #include <dt-bindings/reset/mt8195-resets.h>
29 #include <linux/reset-controller.h>
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| D | starfive-wdt.c | 1 // SPDX-License-Identifier: GPL-2.0
35 * [0]: reset enable;
36 * [1]: interrupt enable && watchdog enable
83 unsigned int control; /* Watchdog Control Resgister for reset enable */
86 unsigned int enable; /* Watchdog Enable Register */ member
97 bool double_timeout; /* The watchdog need twice timeout to reboot */
108 u32 count; /* count of timeout */
117 .enable = STARFIVE_WDT_JH7100_EN,
134 .enable = STARFIVE_WDT_JH7110_CONTROL,
150 ret = clk_prepare_enable(wdt->apb_clk); in starfive_wdt_enable_clock()
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| D | st_lpc_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2014 STMicroelectronics -- All Rights Reserved
22 #include <dt-bindings/mfd/st-lpc.h>
57 .compatible = "st,stih407-lpc",
64 static void st_wdog_setup(struct st_wdog *st_wdog, bool enable) in st_wdog_setup() argument
66 /* Type of watchdog reset - 0: Cold 1: Warm */ in st_wdog_setup()
67 if (st_wdog->syscfg->reset_type_reg) in st_wdog_setup()
68 regmap_update_bits(st_wdog->regmap, in st_wdog_setup()
69 st_wdog->syscfg->reset_type_reg, in st_wdog_setup()
70 st_wdog->syscfg->reset_type_mask, in st_wdog_setup()
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| /linux-6.12.1/drivers/accel/ivpu/ |
| D | ivpu_hw.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020 - 2024 Intel Corporation
48 vdev->platform = IVPU_PLATFORM_SIMICS; in platform_init()
50 vdev->platform = IVPU_PLATFORM_SILICON; in platform_init()
53 platform_to_str(vdev->platform), vdev->platform); in platform_init()
58 vdev->wa.punit_disabled = ivpu_is_fpga(vdev); in wa_init()
59 vdev->wa.clear_runtime_mem = false; in wa_init()
62 vdev->wa.interrupt_clear_with_0 = ivpu_hw_btrs_irqs_clear_with_0_mtl(vdev); in wa_init()
66 vdev->wa.disable_clock_relinquish = true; in wa_init()
69 vdev->wa.wp0_during_power_up = true; in wa_init()
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| /linux-6.12.1/drivers/leds/flash/ |
| D | leds-sgm3140.c | 1 // SPDX-License-Identifier: GPL-2.0
5 #include <linux/led-class-flash.h>
10 #include <media/v4l2-flash-led-class.h>
27 /* current timeout in us */
28 u32 timeout; member
29 /* maximum timeout in us */
43 if (priv->enabled == state) in sgm3140_strobe_set()
47 ret = regulator_enable(priv->vin_regulator); in sgm3140_strobe_set()
49 dev_err(fled_cdev->led_cdev.dev, in sgm3140_strobe_set()
50 "failed to enable regulator: %d\n", ret); in sgm3140_strobe_set()
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| /linux-6.12.1/drivers/pmdomain/actions/ |
| D | owl-sps-helper.c | 1 // SPDX-License-Identifier: GPL-2.0+
13 #include <linux/soc/actions/owl-sps.h>
17 int owl_sps_set_pg(void __iomem *base, u32 pwr_mask, u32 ack_mask, bool enable) in owl_sps_set_pg() argument
21 int timeout; in owl_sps_set_pg() local
25 if (ack == enable) in owl_sps_set_pg()
28 if (enable) in owl_sps_set_pg()
35 for (timeout = 5000; timeout > 0; timeout -= 50) { in owl_sps_set_pg()
37 if ((val & ack_mask) == (enable ? ack_mask : 0)) in owl_sps_set_pg()
41 if (timeout <= 0) in owl_sps_set_pg()
42 return -ETIMEDOUT; in owl_sps_set_pg()
|
| /linux-6.12.1/Documentation/devicetree/bindings/mfd/ |
| D | rohm,bd9576-pmic.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd9576-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 powering the R-Car series processors.
21 - rohm,bd9576
22 - rohm,bd9573
32 rohm,vout1-en-low:
34 BD9576 and BD9573 VOUT1 regulator enable state can be individually
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| /linux-6.12.1/drivers/rtc/ |
| D | rtc-snvs.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (C) 2011-2012 Freescale Semiconductor, Inc.
56 regmap_read(data->regmap, data->offset + SNVS_LPSRTCMR, &msb); in rtc_read_lpsrt()
57 regmap_read(data->regmap, data->offset + SNVS_LPSRTCLR, &lsb); in rtc_read_lpsrt()
68 unsigned int timeout = 100; in rtc_read_lp_counter() local
78 diff = read1 - read2; in rtc_read_lp_counter()
79 } while (((diff < 0) || (diff > MAX_RTC_READ_DIFF_CYCLES)) && --timeout); in rtc_read_lp_counter()
80 if (!timeout) in rtc_read_lp_counter()
81 dev_err(&data->rtc->dev, "Timeout trying to get valid LPSRT Counter read\n"); in rtc_read_lp_counter()
83 /* Convert 47-bit counter to 32-bit raw second count */ in rtc_read_lp_counter()
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| /linux-6.12.1/Documentation/devicetree/bindings/hwmon/ |
| D | max6697.txt | 4 - compatible:
16 - reg: I2C address
20 - smbus-timeout-disable
21 Set to disable SMBus timeout. If not specified, SMBus timeout will be
23 - extended-range-enable
24 Only valid for MAX6581. Set to enable extended temperature range.
26 - beta-compensation-enable
27 Only valid for MAX6693 and MX6694. Set to enable beta compensation on
30 - alert-mask
34 - over-temperature-mask
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| /linux-6.12.1/include/linux/ |
| D | fsl_ifc.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
21 * - IFC version 1.0 implements 4 banks.
22 * - IFC version 1.1 onward implements 8 banks.
35 * CSPR - Chip Select Property Register
69 (__ilog2(n) - IFC_AMASK_SHIFT))
74 /* Enable ECC Encoder */
81 /* Enable ECC Decoder */
110 #define CSOR_NAND_PB(n) ((__ilog2(n) - 5) << CSOR_NAND_PB_SHIFT)
111 /* Time for Read Enable High to Output High Impedance */
123 * Chip Select Option Register - NOR Flash Mode
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| /linux-6.12.1/sound/arm/ |
| D | aaci.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver
23 #define AACI_IE 0x010 /* 7 bits Int Enable */
36 #define AACI_SLIEN 0x070 /* slot interrupt enable */
51 #define CR_FEN (1 << 16) /* fifo enable */
69 #define CR_EN (1 << 0) /* transmit enable */
74 #define SR_RXTOFE (1 << 11) /* rx timeout fifo empty */
75 #define SR_TXTO (1 << 10) /* rx timeout fifo nonempty */
95 #define ISR_RXTOINTR (1 << 1) /* tx timeout */
99 * interrupt enable register bits.
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| /linux-6.12.1/drivers/s390/net/ |
| D | qeth_l2_sys.c | 1 // SPDX-License-Identifier: GPL-2.0
24 mutex_lock(&card->sbp_lock); in qeth_bridge_port_role_state_show()
26 card->options.sbp.supported_funcs) in qeth_bridge_port_role_state_show()
28 &card->options.sbp.role, &state); in qeth_bridge_port_role_state_show()
39 rc = -EIO; in qeth_bridge_port_role_state_show()
42 switch (card->options.sbp.role) { in qeth_bridge_port_role_state_show()
50 rc = -EIO; in qeth_bridge_port_role_state_show()
54 card->options.sbp.role, state); in qeth_bridge_port_role_state_show()
58 mutex_unlock(&card->sbp_lock); in qeth_bridge_port_role_state_show()
88 return -EINVAL; in qeth_bridge_port_role_store()
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| /linux-6.12.1/drivers/gpu/drm/i915/display/ |
| D | intel_dp_hdcp.c | 1 /* SPDX-License-Identifier: MIT */
40 int timeout) in intel_dp_hdcp_wait_for_cp_irq() argument
43 struct intel_dp *dp = &dig_port->dp; in intel_dp_hdcp_wait_for_cp_irq()
44 struct intel_hdcp *hdcp = &dp->attached_connector->hdcp; in intel_dp_hdcp_wait_for_cp_irq()
47 #define C (hdcp->cp_irq_count_cached != atomic_read(&hdcp->cp_irq_count)) in intel_dp_hdcp_wait_for_cp_irq()
48 ret = wait_event_interruptible_timeout(hdcp->cp_irq_queue, C, in intel_dp_hdcp_wait_for_cp_irq()
49 msecs_to_jiffies(timeout)); in intel_dp_hdcp_wait_for_cp_irq()
52 drm_dbg_kms(connector->base.dev, in intel_dp_hdcp_wait_for_cp_irq()
60 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in intel_dp_hdcp_write_an_aksv()
65 dpcd_ret = drm_dp_dpcd_write(&dig_port->dp.aux, DP_AUX_HDCP_AN, in intel_dp_hdcp_write_an_aksv()
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| /linux-6.12.1/sound/hda/ |
| D | hdac_controller.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * HD-audio controller helpers
17 int timeout; in azx_clear_corbrp() local
19 for (timeout = 1000; timeout > 0; timeout--) { in azx_clear_corbrp()
24 if (timeout <= 0) in azx_clear_corbrp()
25 dev_err(bus->dev, "CORB reset timeout#1, CORBRP = %d\n", in azx_clear_corbrp()
29 for (timeout = 1000; timeout > 0; timeout--) { in azx_clear_corbrp()
34 if (timeout <= 0) in azx_clear_corbrp()
35 dev_err(bus->dev, "CORB reset timeout#2, CORBRP = %d\n", in azx_clear_corbrp()
40 * snd_hdac_bus_init_cmd_io - set up CORB/RIRB buffers
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| /linux-6.12.1/Documentation/devicetree/bindings/input/ |
| D | iqs269a.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 - $ref: input.yaml#
16 The Azoteq IQS269A is an 8-channel capacitive touch controller that features
17 additional Hall-effect and inductive sensing capabilities.
24 - azoteq,iqs269a
25 - azoteq,iqs269a-00
26 - azoteq,iqs269a-d0
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| /linux-6.12.1/Documentation/ABI/testing/ |
| D | sysfs-platform-dell-laptop | 9 light sensor. Write 1 to this file to enable the auto
31 enabled are preceded by '+', those disabled by '-'.
33 To enable a trigger, write its name preceded by '+' to
35 by '-' instead.
37 For example, to enable the keyboard as trigger run::
43 echo -keyboard > /sys/class/leds/dell::kbd_backlight/start_triggers
59 To configure the timeout, write to this file a value along
63 For example, to set the timeout to 10 minutes run::
68 expressed in a different unit than the one used when the timeout
72 some systems might fall back to a specific timeout in case
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