Lines Matching +full:timeout +full:- +full:enable
1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (C) 2011-2012 Freescale Semiconductor, Inc.
56 regmap_read(data->regmap, data->offset + SNVS_LPSRTCMR, &msb); in rtc_read_lpsrt()
57 regmap_read(data->regmap, data->offset + SNVS_LPSRTCLR, &lsb); in rtc_read_lpsrt()
68 unsigned int timeout = 100; in rtc_read_lp_counter() local
78 diff = read1 - read2; in rtc_read_lp_counter()
79 } while (((diff < 0) || (diff > MAX_RTC_READ_DIFF_CYCLES)) && --timeout); in rtc_read_lp_counter()
80 if (!timeout) in rtc_read_lp_counter()
81 dev_err(&data->rtc->dev, "Timeout trying to get valid LPSRT Counter read\n"); in rtc_read_lp_counter()
83 /* Convert 47-bit counter to 32-bit raw second count */ in rtc_read_lp_counter()
92 unsigned int timeout = 100; in rtc_read_lp_counter_lsb() local
94 regmap_read(data->regmap, data->offset + SNVS_LPSRTCLR, &count1); in rtc_read_lp_counter_lsb()
97 regmap_read(data->regmap, data->offset + SNVS_LPSRTCLR, &count1); in rtc_read_lp_counter_lsb()
98 diff = count1 - count2; in rtc_read_lp_counter_lsb()
99 } while (((diff < 0) || (diff > MAX_RTC_READ_DIFF_CYCLES)) && --timeout); in rtc_read_lp_counter_lsb()
100 if (!timeout) { in rtc_read_lp_counter_lsb()
101 dev_err(&data->rtc->dev, "Timeout trying to get valid LPSRT Counter read\n"); in rtc_read_lp_counter_lsb()
102 return -ETIMEDOUT; in rtc_read_lp_counter_lsb()
113 unsigned int timeout = 1000; in rtc_write_sync_lp() local
120 /* Wait for 3 CKIL cycles, about 61.0-91.5 µs */ in rtc_write_sync_lp()
125 elapsed = count2 - count1; /* wrap around _is_ handled! */ in rtc_write_sync_lp()
126 } while (elapsed < 3 && --timeout); in rtc_write_sync_lp()
127 if (!timeout) { in rtc_write_sync_lp()
128 dev_err(&data->rtc->dev, "Timeout waiting for LPSRT Counter to change\n"); in rtc_write_sync_lp()
129 return -ETIMEDOUT; in rtc_write_sync_lp()
134 static int snvs_rtc_enable(struct snvs_rtc_data *data, bool enable) in snvs_rtc_enable() argument
136 int timeout = 1000; in snvs_rtc_enable() local
139 regmap_update_bits(data->regmap, data->offset + SNVS_LPCR, SNVS_LPCR_SRTC_ENV, in snvs_rtc_enable()
140 enable ? SNVS_LPCR_SRTC_ENV : 0); in snvs_rtc_enable()
142 while (--timeout) { in snvs_rtc_enable()
143 regmap_read(data->regmap, data->offset + SNVS_LPCR, &lpcr); in snvs_rtc_enable()
145 if (enable) { in snvs_rtc_enable()
154 if (!timeout) in snvs_rtc_enable()
155 return -ETIMEDOUT; in snvs_rtc_enable()
166 ret = clk_enable(data->clk); in snvs_rtc_read_time()
173 clk_disable(data->clk); in snvs_rtc_read_time()
184 ret = clk_enable(data->clk); in snvs_rtc_set_time()
193 /* Write 32-bit time to 47-bit timer, leaving 15 LSBs blank */ in snvs_rtc_set_time()
194 regmap_write(data->regmap, data->offset + SNVS_LPSRTCLR, time << CNTR_TO_SECS_SH); in snvs_rtc_set_time()
195 regmap_write(data->regmap, data->offset + SNVS_LPSRTCMR, time >> (32 - CNTR_TO_SECS_SH)); in snvs_rtc_set_time()
197 /* Enable RTC again */ in snvs_rtc_set_time()
200 clk_disable(data->clk); in snvs_rtc_set_time()
211 ret = clk_enable(data->clk); in snvs_rtc_read_alarm()
215 regmap_read(data->regmap, data->offset + SNVS_LPTAR, &lptar); in snvs_rtc_read_alarm()
216 rtc_time64_to_tm(lptar, &alrm->time); in snvs_rtc_read_alarm()
218 regmap_read(data->regmap, data->offset + SNVS_LPSR, &lpsr); in snvs_rtc_read_alarm()
219 alrm->pending = (lpsr & SNVS_LPSR_LPTA) ? 1 : 0; in snvs_rtc_read_alarm()
221 clk_disable(data->clk); in snvs_rtc_read_alarm()
226 static int snvs_rtc_alarm_irq_enable(struct device *dev, unsigned int enable) in snvs_rtc_alarm_irq_enable() argument
231 ret = clk_enable(data->clk); in snvs_rtc_alarm_irq_enable()
235 regmap_update_bits(data->regmap, data->offset + SNVS_LPCR, in snvs_rtc_alarm_irq_enable()
237 enable ? (SNVS_LPCR_LPTA_EN | SNVS_LPCR_LPWUI_EN) : 0); in snvs_rtc_alarm_irq_enable()
241 clk_disable(data->clk); in snvs_rtc_alarm_irq_enable()
249 unsigned long time = rtc_tm_to_time64(&alrm->time); in snvs_rtc_set_alarm()
252 ret = clk_enable(data->clk); in snvs_rtc_set_alarm()
256 regmap_update_bits(data->regmap, data->offset + SNVS_LPCR, SNVS_LPCR_LPTA_EN, 0); in snvs_rtc_set_alarm()
260 regmap_write(data->regmap, data->offset + SNVS_LPTAR, time); in snvs_rtc_set_alarm()
263 regmap_write(data->regmap, data->offset + SNVS_LPSR, SNVS_LPSR_LPTA); in snvs_rtc_set_alarm()
265 clk_disable(data->clk); in snvs_rtc_set_alarm()
267 return snvs_rtc_alarm_irq_enable(dev, alrm->enabled); in snvs_rtc_set_alarm()
285 clk_enable(data->clk); in snvs_rtc_irq_handler()
287 regmap_read(data->regmap, data->offset + SNVS_LPSR, &lpsr); in snvs_rtc_irq_handler()
292 /* RTC alarm should be one-shot */ in snvs_rtc_irq_handler()
295 rtc_update_irq(data->rtc, 1, events); in snvs_rtc_irq_handler()
299 regmap_write(data->regmap, data->offset + SNVS_LPSR, lpsr); in snvs_rtc_irq_handler()
301 clk_disable(data->clk); in snvs_rtc_irq_handler()
323 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); in snvs_rtc_probe()
325 return -ENOMEM; in snvs_rtc_probe()
327 data->rtc = devm_rtc_allocate_device(&pdev->dev); in snvs_rtc_probe()
328 if (IS_ERR(data->rtc)) in snvs_rtc_probe()
329 return PTR_ERR(data->rtc); in snvs_rtc_probe()
331 data->regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "regmap"); in snvs_rtc_probe()
333 if (IS_ERR(data->regmap)) { in snvs_rtc_probe()
334 dev_warn(&pdev->dev, "snvs rtc: you use old dts file, please update it\n"); in snvs_rtc_probe()
340 data->regmap = devm_regmap_init_mmio(&pdev->dev, mmio, &snvs_rtc_config); in snvs_rtc_probe()
342 data->offset = SNVS_LPREGISTER_OFFSET; in snvs_rtc_probe()
343 of_property_read_u32(pdev->dev.of_node, "offset", &data->offset); in snvs_rtc_probe()
346 if (IS_ERR(data->regmap)) { in snvs_rtc_probe()
347 dev_err(&pdev->dev, "Can't find snvs syscon\n"); in snvs_rtc_probe()
348 return -ENODEV; in snvs_rtc_probe()
351 data->irq = platform_get_irq(pdev, 0); in snvs_rtc_probe()
352 if (data->irq < 0) in snvs_rtc_probe()
353 return data->irq; in snvs_rtc_probe()
355 data->clk = devm_clk_get(&pdev->dev, "snvs-rtc"); in snvs_rtc_probe()
356 if (IS_ERR(data->clk)) { in snvs_rtc_probe()
357 data->clk = NULL; in snvs_rtc_probe()
359 ret = clk_prepare_enable(data->clk); in snvs_rtc_probe()
361 dev_err(&pdev->dev, in snvs_rtc_probe()
362 "Could not prepare or enable the snvs clock\n"); in snvs_rtc_probe()
367 ret = devm_add_action_or_reset(&pdev->dev, snvs_rtc_action, data->clk); in snvs_rtc_probe()
374 regmap_write(data->regmap, data->offset + SNVS_LPPGDR, SNVS_LPPGDR_INIT); in snvs_rtc_probe()
377 regmap_write(data->regmap, data->offset + SNVS_LPSR, 0xffffffff); in snvs_rtc_probe()
379 /* Enable RTC */ in snvs_rtc_probe()
382 dev_err(&pdev->dev, "failed to enable rtc %d\n", ret); in snvs_rtc_probe()
386 device_init_wakeup(&pdev->dev, true); in snvs_rtc_probe()
387 ret = dev_pm_set_wake_irq(&pdev->dev, data->irq); in snvs_rtc_probe()
389 dev_err(&pdev->dev, "failed to enable irq wake\n"); in snvs_rtc_probe()
391 ret = devm_request_irq(&pdev->dev, data->irq, snvs_rtc_irq_handler, in snvs_rtc_probe()
392 IRQF_SHARED, "rtc alarm", &pdev->dev); in snvs_rtc_probe()
394 dev_err(&pdev->dev, "failed to request irq %d: %d\n", in snvs_rtc_probe()
395 data->irq, ret); in snvs_rtc_probe()
399 data->rtc->ops = &snvs_rtc_ops; in snvs_rtc_probe()
400 data->rtc->range_max = U32_MAX; in snvs_rtc_probe()
402 return devm_rtc_register_device(data->rtc); in snvs_rtc_probe()
409 clk_disable(data->clk); in snvs_rtc_suspend_noirq()
418 if (data->clk) in snvs_rtc_resume_noirq()
419 return clk_enable(data->clk); in snvs_rtc_resume_noirq()
429 { .compatible = "fsl,sec-v4.0-mon-rtc-lp", },