Lines Matching +full:timeout +full:- +full:enable
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver
23 #define AACI_IE 0x010 /* 7 bits Int Enable */
36 #define AACI_SLIEN 0x070 /* slot interrupt enable */
51 #define CR_FEN (1 << 16) /* fifo enable */
69 #define CR_EN (1 << 0) /* transmit enable */
74 #define SR_RXTOFE (1 << 11) /* rx timeout fifo empty */
75 #define SR_TXTO (1 << 10) /* rx timeout fifo nonempty */
95 #define ISR_RXTOINTR (1 << 1) /* tx timeout */
99 * interrupt enable register bits.
112 #define ISR_RXTOFE (1 << 6) /* rx timeout fifo empty */
117 #define ISR_RXTO (1 << 1) /* rx timeout */
121 * interrupt enable. P52
123 #define IE_RXTOFE (1 << 6) /* rx timeout fifo empty */
128 #define IE_RXTO (1 << 1) /* rx timeout */
134 #define SLFR_RWIS (1 << 13) /* raw wake-up interrupt status */
170 #define MAINCR_DMAEN (1 << 9) /* dma enable */
171 #define MAINCR_SL12TXEN (1 << 8) /* slot 12 transmit enable */
172 #define MAINCR_SL12RXEN (1 << 7) /* slot 12 receive enable */
173 #define MAINCR_SL2TXEN (1 << 6) /* slot 2 transmit enable */
174 #define MAINCR_SL2RXEN (1 << 5) /* slot 2 receive enable */
175 #define MAINCR_SL1TXEN (1 << 4) /* slot 1 transmit enable */
176 #define MAINCR_SL1RXEN (1 << 3) /* slot 1 receive enable */
179 #define MAINCR_IE (1 << 0) /* aaci interface enable */