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/linux-6.12.1/sound/soc/
Dsoc-jack.c1 // SPDX-License-Identifier: GPL-2.0+
3 // soc-jack.c -- ALSA SoC jack handling
20 * snd_soc_jack_report - Report the current status for a jack
36 struct snd_soc_jack_pin *pin; in snd_soc_jack_report() local
39 if (!jack || !jack->jack) in snd_soc_jack_report()
43 dapm = &jack->card->dapm; in snd_soc_jack_report()
45 mutex_lock(&jack->mutex); in snd_soc_jack_report()
47 jack->status &= ~mask; in snd_soc_jack_report()
48 jack->status |= status & mask; in snd_soc_jack_report()
52 list_for_each_entry(pin, &jack->pins, list) { in snd_soc_jack_report()
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Dsoc-dapm.c1 // SPDX-License-Identifier: GPL-2.0+
3 // soc-dapm.c -- ALSA SoC Dynamic Audio Power Management
12 // o Platform power domain - can support external components i.e. amps and
15 // o Jack insertion power event initiation - e.g. hp insertion will enable
43 #define DAPM_UPDATE_STAT(widget, val) widget->dapm->card->dapm_stats.val++;
68 /* dapm power sequences - make this per codec in the future */
153 if (snd_soc_card_is_instantiated(dapm->card)) in dapm_assert_locked()
186 return !list_empty(&w->dirty); in dapm_dirty_widget()
191 dapm_assert_locked(w->dapm); in dapm_mark_dirty()
194 dev_vdbg(w->dapm->dev, "Marking %s dirty due to %s\n", in dapm_mark_dirty()
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/linux-6.12.1/drivers/gpio/
Dgpio-dln2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for the Diolan DLN-2 USB-GPIO adapter
51 * Cache pin direction to save us one transfer, since the hardware has
56 /* active IRQs - not synced to hardware */
58 /* active IRQS - synced to hardware */
65 __le16 pin; member
69 __le16 pin __packed;
76 __le16 count; in dln2_gpio_get_pin_count() local
77 int len = sizeof(count); in dln2_gpio_get_pin_count()
79 ret = dln2_transfer_rx(pdev, DLN2_GPIO_GET_PIN_COUNT, &count, &len); in dln2_gpio_get_pin_count()
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Dgpiolib-acpi.c1 // SPDX-License-Identifier: GPL-2.0
24 #include "gpiolib-acpi.h"
26 static int run_edge_events_on_boot = -1;
29 "Run edge _AEI event-handlers at boot: 0=no, 1=yes, -1=auto");
34 "controller@pin combos on which to ignore the ACPI wake flag "
35 "ignore_wake=controller@pin[,controller@pin[,...]]");
40 "controller@pin combos on which to ignore interrupt "
41 "ignore_interrupt=controller@pin[,controller@pin[,...]]");
50 * struct acpi_gpio_event - ACPI GPIO event handler data
52 * @node: list-entry of the events list of the struct acpi_gpio_chip
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/linux-6.12.1/include/sound/
Dsoc-jack.h1 /* SPDX-License-Identifier: GPL-2.0
3 * soc-jack.h
12 * struct snd_soc_jack_pin - Describes a pin to update based on jack detection
14 * @pin: name of the pin to update
16 * @invert: if non-zero then pin is enabled when status is not reported
21 const char *pin; member
27 * struct snd_soc_jack_zone - Describes voltage zones of jack detection
45 * struct snd_soc_jack_gpio - Describes a gpio pin for jack detection
92 int snd_soc_jack_add_pins(struct snd_soc_jack *jack, int count,
98 int snd_soc_jack_add_zones(struct snd_soc_jack *jack, int count,
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/linux-6.12.1/drivers/tty/serial/
Dsh-sci.h1 /* SPDX-License-Identifier: GPL-2.0 */
20 SCFDR, /* FIFO Data Count Register */
24 SCTFDR, /* Transmit FIFO Data Count Register */
25 SCRFDR, /* Receive FIFO Data Count Register */
32 HSRTRGR, /* Rx FIFO Data Count Trigger Register */
33 HSTTRGR, /* Tx FIFO Data Count Trigger Register */
42 #define SCSMR_CSYNC BIT(7) /* - Clocked synchronous mode */
43 #define SCSMR_ASYNC 0 /* - Asynchronous mode */
44 #define SCSMR_CHR BIT(6) /* 7-bit Character Length */
69 /* Serial Control Register, HSCIF-only bits */
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/linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/
Dqcom,mpm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/qcom,mpm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawn.guo@linaro.org>
14 MSM Power Manager (MPM) that is in always-on domain. In addition to managing
21 - $ref: /schemas/interrupt-controller.yaml#
26 - const: qcom,mpm
34 qcom,rpm-msg-ram:
49 interrupt-controller: true
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/linux-6.12.1/drivers/net/ethernet/intel/ice/
Dice_dpll.c1 // SPDX-License-Identifier: GPL-2.0
16 * enum ice_dpll_pin_type - enumerate ice pin types:
17 * @ICE_DPLL_PIN_INVALID: invalid pin type
18 * @ICE_DPLL_PIN_TYPE_INPUT: input pin
19 * @ICE_DPLL_PIN_TYPE_OUTPUT: output pin
20 * @ICE_DPLL_PIN_TYPE_RCLK_INPUT: recovery clock input pin
32 [ICE_DPLL_PIN_TYPE_RCLK_INPUT] = "rclk-input",
40 * ice_dpll_is_reset - check if reset is in progress
47 * * false - no reset in progress
48 * * true - reset in progress
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/linux-6.12.1/sound/pci/lola/
Dlola_mixer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Support for Digigram Lola PCI-e boards
18 static int lola_init_pin(struct lola *chip, struct lola_pin *pin, in lola_init_pin() argument
24 pin->nid = nid; in lola_init_pin()
27 dev_err(chip->card->dev, "Can't read wcaps for 0x%x\n", nid); in lola_init_pin()
32 pin->is_analog = false; in lola_init_pin()
34 pin->is_analog = true; in lola_init_pin()
36 pin->is_analog = true; in lola_init_pin()
38 dev_err(chip->card->dev, "Invalid wcaps 0x%x for 0x%x\n", val, nid); in lola_init_pin()
39 return -EINVAL; in lola_init_pin()
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/linux-6.12.1/drivers/pinctrl/ti/
Dpinctrl-ti-iodelay.c5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/
23 #include <linux/pinctrl/pinconf-generic.h>
30 #define DRIVER_NAME "ti-iodelay"
33 * struct ti_iodelay_reg_data - Describes the registers for the iodelay instance
44 * @coarse_delay_count_mask: Coarse delay count mask
45 * @coarse_ref_count_mask: Coarse ref count mask
47 * @fine_delay_count_mask: Fine delay count mask
48 * @fine_ref_count_mask: Fine ref count mask
54 * @reg_nr_per_pin: Number of iodelay registers for each pin
89 * struct ti_iodelay_reg_values - Computed io_reg configuration values (see TRM)
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/linux-6.12.1/drivers/gpu/drm/i915/display/
Dintel_hotplug.c54 * pulses, with failures and non-MST long pulses triggering regular hotplug
65 * number of interrupts per hotplug pin per a period of time, and if the number
67 * while before being re-enabled. The intention is to mitigate issues raising
81 * intel_hpd_pin_default - return default pin associated with certain port.
83 * @port: the hpd port to get associated pin
87 * Return pin that is associatade with @port.
92 return HPD_PORT_A + port - PORT_A; in intel_hpd_pin_default()
113 return encoder ? encoder->hpd_pin : HPD_NONE; in intel_connector_hpd_pin()
117 * intel_hpd_irq_storm_detect - gather stats and detect HPD IRQ storm on a pin
119 * @pin: the pin to gather stats on
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/linux-6.12.1/drivers/pinctrl/spear/
Dpinctrl-plgpio.c27 #define PIN_OFFSET(pin) (pin % MAX_GPIO_PER_REG) argument
28 #define REG_OFFSET(base, reg, pin) (base + reg + (pin / MAX_GPIO_PER_REG) \ argument
59 * p2o: function ptr for pin to offset conversion. This is required only for
60 * machines where mapping b/w pin and offset is not 1-to-1.
61 * o2p: function ptr for offset to pin conversion. This is required only for
62 * machines where mapping b/w pin and offset is not 1-to-1.
72 int (*p2o)(int pin); /* pin_to_offset */
82 static inline u32 is_plgpio_set(struct regmap *regmap, u32 pin, u32 reg) in is_plgpio_set() argument
84 u32 offset = PIN_OFFSET(pin); in is_plgpio_set()
85 u32 reg_off = REG_OFFSET(0, reg, pin); in is_plgpio_set()
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/linux-6.12.1/sound/pci/hda/
Dhda_generic.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Generic BIOS auto-parser helper functions for HD-audio
16 /* table entry for multi-io paths */
18 hda_nid_t pin; /* multi-io widget pin NID */ member
20 unsigned int ctl_in; /* cached input-pin control value */
25 * For output, stored in the order of DAC -> ... -> pin,
26 * for input, pin -> ... -> ADC.
30 * multi[] indicates whether it's a selector widget with multi-connectors
52 bool pin_fixed:1; /* path with fixed pin */
56 /* mic/line-in auto switching entry */
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/linux-6.12.1/drivers/firmware/xilinx/
Dzynqmp.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2022 Xilinx, Inc.
6 * Copyright (C) 2022 - 2023, Advanced Micro Devices, Inc.
14 #include <linux/arm-smccc.h>
27 #include <linux/firmware/xlnx-zynqmp.h>
28 #include <linux/firmware/xlnx-event-manager.h>
29 #include "zynqmp-debug.h"
36 /* BOOT_PIN_CTRL- Used to control the mode pins after boot */
38 /* BOOT_PIN_CTRL_MASK- out_val[11:8], out_en[3:0] */
52 * struct zynqmp_devinfo - Structure for Zynqmp device instance
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/linux-6.12.1/Documentation/devicetree/bindings/arm/hisilicon/
Dlow-pin-count.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/hisilicon/low-pin-count.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Hisilicon HiP06 Low Pin Count device
10 - Wei Xu <xuwei5@hisilicon.com>
13 Hisilicon HiP06 SoCs implement a Low Pin Count (LPC) controller, which
21 pattern: '^isa@[0-9a-f]+$'
28 - hisilicon,hip06-lpc
29 - hisilicon,hip07-lpc
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/linux-6.12.1/arch/arm/mach-orion5x/
Dterastation_pro2-setup.c1 // SPDX-License-Identifier: GPL-2.0-or-later
18 #include <asm/mach-types.h>
31 * - Marvell 88F5281-D0
32 * - Marvell 88SX6042 SATA controller (PCI)
33 * - Marvell 88E1118 Gigabit Ethernet PHY
34 * - 256KB NOR flash
35 * - 128MB of DDR RAM
36 * - PCIe port (not equipped)
57 .end = TSP2_NOR_BOOT_BASE + TSP2_NOR_BOOT_SIZE - 1,
61 .name = "physmap-flash",
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/linux-6.12.1/drivers/pinctrl/nuvoton/
Dpinctrl-ma35.c1 // SPDX-License-Identifier: GPL-2.0
5 * Author: Shan-Chun Hung <schung@nuvoton.com>
24 #include "pinctrl-ma35.h"
59 /* GPIO pull-up and pull-down selection control */
66 * The MA35_GP_REG_INTEN bits 0 ~ 15 control low-level or falling edge trigger,
67 * while bits 16 ~ 31 control high-level or rising edge trigger.
84 /* Non-constant mask variant of FIELD_GET() and FIELD_PREP() */
85 #define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1))
86 #define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask))
162 return npctl->ngroups; in ma35_get_groups_count()
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/linux-6.12.1/drivers/staging/media/atomisp/pci/
Datomisp_csi2_bridge.c1 // SPDX-License-Identifier: GPL-2.0
8 * Based on drivers/media/pci/intel/ipu3/cio2-bridge.c written by:
18 #include <media/ipu-bridge.h>
19 #include <media/v4l2-fwnode.h>
28 * 79234640-9e10-4fea-a5c1-b5aa8b19756f
30 * Function number 1 returns a count of the GPIO lines that are mapped.
52 * 822ace8f-2814-4174-a56b-5f029fe079ee
61 * dc2f6c4f-045b-4f1d-97b9-882a6860a4be
70 * 75c9a639-5c8a-4a00-9f48-a9c3b5da789f
94 * Once all sensors are moved to v4l2-async probing atomisp_gmin_platform.c can
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/linux-6.12.1/drivers/pinctrl/sunxi/
Dpinctrl-sunxi.c6 * Maxime Ripard <maxime.ripard@free-electrons.com>
28 #include <linux/pinctrl/pinconf-generic.h>
33 #include <dt-bindings/pinctrl/sun4i-a10.h>
36 #include "pinctrl-sunxi.h"
51 * - Mux config
52 * - Data value
53 * - Drive level
54 * - Pull direction
59 * They take a pin number which is relative to the start of the current device.
62 u32 pin, u32 *reg, u32 *shift, u32 *mask) in sunxi_mux_reg() argument
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/linux-6.12.1/include/uapi/sound/
Dsnd_sst_tokens.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * snd_sst_tokens.h - Intel SST tokens definition
17 * %SKL_TKN_U8_IN_PIN_TYPE: Input pin type,
20 * %SKL_TKN_U8_OUT_PIN_TYPE: Output pin type,
22 * %SKL_TKN_U8_DYN_IN_PIN: Configure Input pin dynamically
25 * %SKL_TKN_U8_DYN_OUT_PIN: Configure Output pin dynamically
65 * %SKL_TKN_U16_PIN_INST_ID: Stores the pin instance id
96 * formats and the pin count.
99 * the pin count value.
107 * %SKL_TKN_U32_FMT_CH: Supported channel count
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/linux-6.12.1/sound/soc/ti/
Dams-delta.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * ams-delta.c -- SoC audio for Amstrad E3 (Delta) videophone
19 #include <linux/platform_data/asoc-ti-mcbsp.h>
21 #include "omap-mcbsp.h"
68 /* Selection <-> pin translation */
102 struct snd_soc_dapm_context *dapm = &card->dapm; in ams_delta_set_audio_mode()
103 struct soc_enum *control = (struct soc_enum *)kcontrol->private_value; in ams_delta_set_audio_mode()
105 int pin, changed = 0; in ams_delta_set_audio_mode() local
108 if (!cx20442_codec->card->pop_time) in ams_delta_set_audio_mode()
109 return -EUNATCH; in ams_delta_set_audio_mode()
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/linux-6.12.1/rust/kernel/sync/
Darc.rs1 // SPDX-License-Identifier: GPL-2.0
3 //! A reference-counted pointer.
5 //! This module implements a way for users to create reference-counted objects and pointers to
6 //! them. Such a pointer automatically increments and decrements the count, and drops the
13 //! 3. It saturates the reference count instead of aborting when it goes over a threshold.
17 //! [`Arc`]: https://doc.rust-lang.org/std/sync/struct.Arc.html
33 pin::Pin,
40 /// A reference-counted pointer to an instance of `T`.
42 /// The reference count is incremented when new instances of [`Arc`] are created, and decremented
43 /// when they are dropped. When the count reaches zero, the underlying `T` is also dropped.
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/linux-6.12.1/rust/kernel/
Dtypes.rs1 // SPDX-License-Identifier: GPL-2.0
12 pin::Pin,
16 /// Used to transfer ownership to and from foreign (non-Rust) languages.
28 /// Converts a Rust-owned object to a foreign-owned one.
34 fn into_foreign(self) -> *const core::ffi::c_void; in into_foreign()
36 /// Borrows a foreign-owned object.
42 unsafe fn borrow<'a>(ptr: *const core::ffi::c_void) -> Self::Borrowed<'a>; in borrow()
44 /// Converts a foreign-owned object back to a Rust-owned one.
52 unsafe fn from_foreign(ptr: *const core::ffi::c_void) -> Self; in from_foreign()
54 /// Tries to convert a foreign-owned object back to a Rust-owned one.
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/linux-6.12.1/drivers/pinctrl/
Dpinconf-generic.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Core driver for the generic pin config portions of the pin control subsystem
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
22 #include <linux/pinctrl/pinconf-generic.h>
28 #include "pinctrl-utils.h"
37 "input bias pull to pin specific state", "ohms", true),
49 PCONFDUMP(PIN_CONFIG_MODE_LOW_POWER, "pin low power", "mode", true),
51 PCONFDUMP(PIN_CONFIG_OUTPUT, "pin output", "level", true),
53 PCONFDUMP(PIN_CONFIG_POWER_SOURCE, "pin power source", "selector", true),
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/linux-6.12.1/drivers/usb/misc/
Dbrcmstb-usb-pinmap.c1 // SPDX-License-Identifier: GPL-2.0
60 static void sync_in_pin(struct in_pin *pin) in sync_in_pin() argument
64 val = gpiod_get_value(pin->gpiod); in sync_in_pin()
66 pinmap_set(pin->pdata->regs, pin->value_mask); in sync_in_pin()
68 pinmap_unset(pin->pdata->regs, pin->value_mask); in sync_in_pin()
83 pr_debug("%s: reg: 0x%x\n", __func__, readl(pdata->regs)); in brcmstb_usb_pinmap_ovr_isr()
84 pout = pdata->out_pins; in brcmstb_usb_pinmap_ovr_isr()
85 for (x = 0; x < pdata->out_count; x++) { in brcmstb_usb_pinmap_ovr_isr()
86 val = readl(pdata->regs); in brcmstb_usb_pinmap_ovr_isr()
87 if (val & pout->changed_mask) { in brcmstb_usb_pinmap_ovr_isr()
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