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Searched full:infracfg_ao (Results 1 – 24 of 24) sorted by relevance

/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt8188.dtsi910 infracfg_ao: syscon@10001000 { label
964 mediatek,infracfg = <&infracfg_ao>;
1025 mediatek,infracfg = <&infracfg_ao>;
1044 mediatek,infracfg = <&infracfg_ao>;
1060 mediatek,infracfg = <&infracfg_ao>;
1068 mediatek,infracfg = <&infracfg_ao>;
1076 mediatek,infracfg = <&infracfg_ao>;
1087 mediatek,infracfg = <&infracfg_ao>;
1102 mediatek,infracfg = <&infracfg_ao>;
1140 mediatek,infracfg = <&infracfg_ao>;
[all …]
Dmt8186.dtsi854 infracfg_ao: syscon@10001000 { label
855 compatible = "mediatek,mt8186-infracfg_ao", "syscon";
908 mediatek,infracfg = <&infracfg_ao>;
937 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>;
944 clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>,
945 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>;
968 mediatek,infracfg = <&infracfg_ao>;
976 mediatek,infracfg = <&infracfg_ao>;
993 mediatek,infracfg = <&infracfg_ao>;
1003 mediatek,infracfg = <&infracfg_ao>;
[all …]
Dmt8195.dtsi489 infracfg_ao: syscon@10001000 { label
490 compatible = "mediatek,mt8195-infracfg_ao", "syscon", "simple-mfd";
546 mediatek,infracfg = <&infracfg_ao>;
615 mediatek,infracfg = <&infracfg_ao>;
624 mediatek,infracfg = <&infracfg_ao>;
632 mediatek,infracfg = <&infracfg_ao>;
648 mediatek,infracfg = <&infracfg_ao>;
660 mediatek,infracfg = <&infracfg_ao>;
672 mediatek,infracfg = <&infracfg_ao>;
680 mediatek,infracfg = <&infracfg_ao>;
[all …]
Dmt6779.dtsi156 infracfg_ao: clock-controller@10001000 { label
157 compatible = "mediatek,mt6779-infracfg_ao", "syscon";
197 clocks = <&clk26m>, <&infracfg_ao CLK_INFRA_PMIC_AP>;
205 clocks = <&infracfg_ao CLK_INFRA_DEVICE_APC>;
214 clocks = <&clk26m>, <&infracfg_ao CLK_INFRA_UART0>;
224 clocks = <&clk26m>, <&infracfg_ao CLK_INFRA_UART1>;
234 clocks = <&clk26m>, <&infracfg_ao CLK_INFRA_UART2>;
/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dmediatek,mt7986-afe.yaml142 clocks = <&infracfg_ao CLK_INFRA_AUD_BUS_CK>,
143 <&infracfg_ao CLK_INFRA_AUD_26M_CK>,
144 <&infracfg_ao CLK_INFRA_AUD_L_CK>,
145 <&infracfg_ao CLK_INFRA_AUD_AUD_CK>,
146 <&infracfg_ao CLK_INFRA_AUD_EG2_CK>;
Dmt8186-afe-pcm.yaml123 clocks = <&infracfg_ao 44>, //CLK_INFRA_AO_AUDIO
124 <&infracfg_ao 54>, //CLK_INFRA_AO_AUDIO_26M_BCLK
Dmt8195-afe-pcm.yaml177 <&infracfg_ao 50>, //CLK_INFRA_AO_AUDIO_26M_B
Dmediatek,mt8188-afe.yaml187 mediatek,infracfg = <&infracfg_ao>;
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dmediatek,mt8195-sys-clock.yaml22 The infracfg_ao and pericfg_ao provides clock gate in peripheral and infrastructure IP blocks.
29 - mediatek,mt8195-infracfg_ao
58 infracfg_ao: syscon@10001000 {
59 compatible = "mediatek,mt8195-infracfg_ao", "syscon";
Dmediatek,mt8186-sys-clock.yaml22 The infracfg_ao provides clock gate in peripheral and infrastructure IP blocks.
32 - mediatek,mt8186-infracfg_ao
Dmediatek,mt8365-sys-clock.yaml15 The infracfg_ao and pericfg_ao provides clock gate in peripheral and infrastructure IP blocks.
Dmediatek,mt8188-sys-clock.yaml22 The infracfg_ao provides clock gate in peripheral and infrastructure IP blocks.
Dmediatek,infracfg.yaml27 - mediatek,mt6779-infracfg_ao
/linux-6.12.1/Documentation/devicetree/bindings/thermal/
Dmediatek,lvts-thermal.yaml120 clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;
121 resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>;
/linux-6.12.1/Documentation/devicetree/bindings/ufs/
Dmediatek,ufs.yaml61 clocks = <&infracfg_ao CLK_INFRA_UFS>;
/linux-6.12.1/Documentation/devicetree/bindings/soc/mediatek/
Ddevapc.yaml59 clocks = <&infracfg_ao CLK_INFRA_DEVICE_APC>;
/linux-6.12.1/include/dt-bindings/clock/
Dmediatek,mt7988-clk.h139 /* INFRACFG_AO */
Dmt8183-clk.h183 /* INFRACFG_AO */
Dmt8186-clk.h157 /* INFRACFG_AO */
Dmediatek,mt8188-clk.h218 /* INFRACFG_AO */
Dmt8195-clk.h259 /* INFRACFG_AO */
/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt8195-infra_ao.c226 .compatible = "mediatek,mt8195-infracfg_ao",
Dclk-mt8186-infra_ao.c224 .compatible = "mediatek,mt8186-infracfg_ao",
Dclk-mt6779.c1301 { .compatible = "mediatek,mt6779-infracfg_ao", .data = &infra_desc },