dts/mediatek/mt8186.dtsi

854 		infracfg_ao: syscon@10001000 {  label
855 			compatible = "mediatek,mt8186-infracfg_ao", "syscon";
908 						mediatek,infracfg = <&infracfg_ao>;
937 						 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>;
944 					clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>,
945 						 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>;
968 							mediatek,infracfg = <&infracfg_ao>;
976 					mediatek,infracfg = <&infracfg_ao>;
993 					mediatek,infracfg = <&infracfg_ao>;
1003 						mediatek,infracfg = <&infracfg_ao>;
1020 						mediatek,infracfg = <&infracfg_ao>;
1041 						mediatek,infracfg = <&infracfg_ao>;
1064 						mediatek,infracfg = <&infracfg_ao>;
1073 						mediatek,infracfg = <&infracfg_ao>;
1085 						mediatek,infracfg = <&infracfg_ao>;
1110 			clocks = <&infracfg_ao CLK_INFRA_AO_PMIC_AP>,
1111 				 <&infracfg_ao CLK_INFRA_AO_PMIC_TMR>;
1119 			clocks = <&infracfg_ao CLK_INFRA_AO_PMIC_AP>,
1120 				 <&infracfg_ao CLK_INFRA_AO_PMIC_TMR>,
1141 			clocks = <&infracfg_ao CLK_INFRA_AO_GCE>;
1189 				 <&infracfg_ao CLK_INFRA_AO_SPINOR>,
1190 				 <&infracfg_ao CLK_INFRA_AO_FLASHIF_133M>,
1191 				 <&infracfg_ao CLK_INFRA_AO_FLASHIF_66M>;
1203 			clocks = <&infracfg_ao CLK_INFRA_AO_AUXADC>;
1212 			clocks = <&clk26m>, <&infracfg_ao CLK_INFRA_AO_UART0>;
1222 			clocks = <&clk26m>, <&infracfg_ao CLK_INFRA_AO_UART1>;
1233 				 <&infracfg_ao CLK_INFRA_AO_AP_DMA>;
1247 				 <&infracfg_ao CLK_INFRA_AO_AP_DMA>;
1261 				 <&infracfg_ao CLK_INFRA_AO_AP_DMA>;
1275 				 <&infracfg_ao CLK_INFRA_AO_AP_DMA>;
1289 				 <&infracfg_ao CLK_INFRA_AO_AP_DMA>;
1303 				 <&infracfg_ao CLK_INFRA_AO_AP_DMA>;
1317 				 <&infracfg_ao CLK_INFRA_AO_AP_DMA>;
1331 				 <&infracfg_ao CLK_INFRA_AO_AP_DMA>;
1345 				 <&infracfg_ao CLK_INFRA_AO_AP_DMA>;
1361 				 <&infracfg_ao CLK_INFRA_AO_SPI0>;
1370 			clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;
1371 			resets = <&infracfg_ao MT8186_INFRA_THERMAL_CTRL_RST>;
1381 			clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;
1385 			resets = <&infracfg_ao MT8186_INFRA_PTP_CTRL_RST>;
1395 				 <&infracfg_ao CLK_INFRA_AO_DISP_PWM>;
1408 				 <&infracfg_ao CLK_INFRA_AO_SPI1>;
1421 				 <&infracfg_ao CLK_INFRA_AO_SPI2>;
1434 				 <&infracfg_ao CLK_INFRA_AO_SPI3>;
1447 				 <&infracfg_ao CLK_INFRA_AO_SPI4>;
1460 				 <&infracfg_ao CLK_INFRA_AO_SPI5>;
1476 			clocks = <&clk26m>, <&infracfg_ao CLK_INFRA_AO_UART2>;
1487 				 <&infracfg_ao CLK_INFRA_AO_AP_DMA>;
1498 			clocks = <&infracfg_ao CLK_INFRA_AO_AUDIO>,
1499 				 <&infracfg_ao CLK_INFRA_AO_AUDIO_26M_BCLK>,
1550 			mediatek,infracfg = <&infracfg_ao>;
1562 				 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>,
1563 				 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_HCLK>,
1564 				 <&infracfg_ao CLK_INFRA_AO_ICUSB>,
1565 				 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_XHCI>;
1580 					 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>,
1581 					 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_HCLK>,
1582 					 <&infracfg_ao CLK_INFRA_AO_ICUSB>,
1583 					 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_XHCI>;
1598 				 <&infracfg_ao CLK_INFRA_AO_MSDC0>,
1599 				 <&infracfg_ao CLK_INFRA_AO_MSDC0_SRC>,
1600 				 <&infracfg_ao CLK_INFRA_AO_MSDCFDE>;
1614 				 <&infracfg_ao CLK_INFRA_AO_MSDC1>,
1615 				 <&infracfg_ao CLK_INFRA_AO_MSDC1_SRC>;
1627 			clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>,
1628 				 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>,
1629 				 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_HCLK>,
1631 				 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_XHCI>;
1645 				clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>,
1646 					 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>,
1647 					 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_HCLK>,
1649 					 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_XHCI>;