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/linux-6.12.1/drivers/gpu/drm/i915/display/
Dintel_hotplug.c44 * handlers gather the hotplug detect (HPD) information from relevant registers
54 * pulses, with failures and non-MST long pulses triggering regular hotplug
65 * number of interrupts per hotplug pin per a period of time, and if the number
67 * while before being re-enabled. The intention is to mitigate issues raising
73 * callback is handled by i915_digport_work_func reenabling of hpd is not
81 * intel_hpd_pin_default - return default pin associated with certain port.
83 * @port: the hpd port to get associated pin
87 * Return pin that is associatade with @port.
92 return HPD_PORT_A + port - PORT_A; in intel_hpd_pin_default()
113 return encoder ? encoder->hpd_pin : HPD_NONE; in intel_connector_hpd_pin()
[all …]
Dintel_hotplug_irq.c1 // SPDX-License-Identifier: MIT
16 typedef bool (*long_pulse_detect_func)(enum hpd_pin pin, u32 val);
18 typedef u32 (*hotplug_mask_func)(enum hpd_pin pin);
136 struct intel_hotplug *hpd = &dev_priv->display.hotplug; in intel_hpd_init_pins() local
141 hpd->hpd = hpd_status_g4x; in intel_hpd_init_pins()
143 hpd->hpd = hpd_status_i915; in intel_hpd_init_pins()
148 hpd->hpd = hpd_xelpdp; in intel_hpd_init_pins()
150 hpd->hpd = hpd_gen11; in intel_hpd_init_pins()
152 hpd->hpd = hpd_bxt; in intel_hpd_init_pins()
154 hpd->hpd = NULL; /* no north HPD on SKL */ in intel_hpd_init_pins()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/gpio/
Dhw_hpd.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
38 hpd->shifts->field_name, hpd->masks->field_name
41 hpd->base.base.ctx
43 (hpd->regs->reg)
48 struct hw_hpd *pin) in dal_hw_hpd_destruct() argument
50 dal_hw_gpio_destruct(&pin->base); in dal_hw_hpd_destruct()
56 struct hw_hpd *hpd = HW_HPD_FROM_BASE(*ptr); in dal_hw_hpd_destroy() local
58 dal_hw_hpd_destruct(hpd); in dal_hw_hpd_destroy()
60 kfree(hpd); in dal_hw_hpd_destroy()
69 struct hw_hpd *hpd = HW_HPD_FROM_BASE(ptr); in get_value() local
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Dgpio_base.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
27 * Pre-requisites: headers required by header of this unit
40 * Post-requisites: headers required by this unit
63 if (gpio->pin) { in dal_gpio_open_ex()
69 if (!gpio->hw_container.ddc) { in dal_gpio_open_ex()
73 gpio->mode = mode; in dal_gpio_open_ex()
82 if (!gpio->pin) { in dal_gpio_get_value()
87 return gpio->pin->funcs->get_value(gpio->pin, value); in dal_gpio_get_value()
94 if (!gpio->pin) { in dal_gpio_set_value()
99 return gpio->pin->funcs->set_value(gpio->pin, value); in dal_gpio_set_value()
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/linux-6.12.1/Documentation/ABI/testing/
Dsysfs-driver-typec-displayport20 USB Type-C Standard. Functionally it equals to the situation
22 Documentation/ABI/testing/sysfs-bus-typec, and use file
29 VESA DisplayPort Alt Mode on USB Type-C Standard defines six
30 different pin assignments for USB Type-C connector that are
31 labeled A, B, C, D, E, and F. The supported pin assignments are
39 Pin assignment can be changed by writing to the file. It is
40 possible to set pin assignment before configuration has been
44 Note. As of VESA DisplayPort Alt Mode on USB Type-C Standard
45 version 1.0b, pin assignments A, B, and F are deprecated. Only
46 pin assignment D can now carry simultaneously one channel of
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/linux-6.12.1/Documentation/userspace-api/media/cec/
Dcec-ioc-dqevent.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 CEC_DQEVENT - Dequeue a CEC event
35 non-blocking mode and no event is pending, then it will return -1 and
38 The internal event queues are per-filehandle and per-event type. If
43 two :ref:`CEC_EVENT_STATE_CHANGE <CEC-EVENT-STATE-CHANGE>` events with
51 .. flat-table:: struct cec_event_state_change
52 :header-rows: 0
53 :stub-columns: 0
56 * - __u16
57 - ``phys_addr``
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/linux-6.12.1/Documentation/admin-guide/media/
Dcec.rst1 .. SPDX-License-Identifier: GPL-2.0
12 - Exynos4
13 - Exynos5
14 - STIH4xx HDMI CEC
15 - V4L2 adv7511 (same HW, but a different driver from the drm adv7511)
16 - stm32
17 - Allwinner A10 (sun4i)
18 - Raspberry Pi
19 - dw-hdmi (Synopsis IP)
20 - amlogic (meson ao-cec and ao-cec-g12a)
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/gpio/dcn10/
Dhw_factory_dcn10.c2 * Copyright 2013-15 Advanced Micro Devices, Inc.
43 #define block HPD
151 static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en) in define_generic_registers() argument
153 struct hw_generic *generic = HW_GENERIC_FROM_BASE(pin); in define_generic_registers()
155 generic->regs = &generic_regs[en]; in define_generic_registers()
156 generic->shifts = &generic_shift[en]; in define_generic_registers()
157 generic->masks = &generic_mask[en]; in define_generic_registers()
158 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
162 struct hw_gpio_pin *pin, in define_ddc_registers() argument
165 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/gpio/dce120/
Dhw_factory_dce120.c2 * Copyright 2013-15 Advanced Micro Devices, Inc.
42 #define block HPD
130 struct hw_gpio_pin *pin, in define_ddc_registers() argument
133 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers()
135 switch (pin->id) { in define_ddc_registers()
137 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers()
138 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers()
141 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers()
142 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers()
149 ddc->shifts = &ddc_shift; in define_ddc_registers()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/gpio/dcn21/
Dhw_factory_dcn21.c2 * Copyright 2013-15 Advanced Micro Devices, Inc.
47 #define block HPD
159 static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en) in define_generic_registers() argument
161 struct hw_generic *generic = HW_GENERIC_FROM_BASE(pin); in define_generic_registers()
163 generic->regs = &generic_regs[en]; in define_generic_registers()
164 generic->shifts = &generic_shift[en]; in define_generic_registers()
165 generic->masks = &generic_mask[en]; in define_generic_registers()
166 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
170 struct hw_gpio_pin *pin, in define_ddc_registers() argument
173 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/gpio/dcn401/
Dhw_factory_dcn401.c1 // SPDX-License-Identifier: MIT
29 #define block HPD
184 static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en) in define_generic_registers() argument
186 struct hw_generic *generic = HW_GENERIC_FROM_BASE(pin); in define_generic_registers()
188 generic->regs = &generic_regs[en]; in define_generic_registers()
189 generic->shifts = &generic_shift[en]; in define_generic_registers()
190 generic->masks = &generic_mask[en]; in define_generic_registers()
191 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
195 struct hw_gpio_pin *pin, in define_ddc_registers() argument
198 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/gpio/dcn20/
Dhw_factory_dcn20.c2 * Copyright 2013-15 Advanced Micro Devices, Inc.
49 #define block HPD
182 struct hw_gpio_pin *pin, in define_ddc_registers() argument
185 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers()
187 switch (pin->id) { in define_ddc_registers()
189 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers()
190 ddc->base.regs = &ddc_data_regs_dcn[en].gpio; in define_ddc_registers()
193 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers()
194 ddc->base.regs = &ddc_clk_regs_dcn[en].gpio; in define_ddc_registers()
201 ddc->shifts = &ddc_shift[en]; in define_ddc_registers()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/gpio/dcn30/
Dhw_factory_dcn30.c56 #define block HPD
188 static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en) in define_generic_registers() argument
190 struct hw_generic *generic = HW_GENERIC_FROM_BASE(pin); in define_generic_registers()
192 generic->regs = &generic_regs[en]; in define_generic_registers()
193 generic->shifts = &generic_shift[en]; in define_generic_registers()
194 generic->masks = &generic_mask[en]; in define_generic_registers()
195 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
199 struct hw_gpio_pin *pin, in define_ddc_registers() argument
202 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers()
204 switch (pin->id) { in define_ddc_registers()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/gpio/dcn315/
Dhw_factory_dcn315.c53 #define block HPD
180 static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en) in define_generic_registers() argument
182 struct hw_generic *generic = HW_GENERIC_FROM_BASE(pin); in define_generic_registers()
184 generic->regs = &generic_regs[en]; in define_generic_registers()
185 generic->shifts = &generic_shift[en]; in define_generic_registers()
186 generic->masks = &generic_mask[en]; in define_generic_registers()
187 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
191 struct hw_gpio_pin *pin, in define_ddc_registers() argument
194 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers()
196 switch (pin->id) { in define_ddc_registers()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/gpio/dce110/
Dhw_factory_dce110.c2 * Copyright 2013-15 Advanced Micro Devices, Inc.
113 struct hw_gpio_pin *pin, in define_ddc_registers() argument
116 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers()
118 switch (pin->id) { in define_ddc_registers()
120 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers()
121 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers()
124 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers()
125 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers()
132 ddc->shifts = &ddc_shift; in define_ddc_registers()
133 ddc->masks = &ddc_mask; in define_ddc_registers()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/gpio/dce80/
Dhw_factory_dce80.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
117 struct hw_gpio_pin *pin, in define_ddc_registers() argument
120 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers()
122 switch (pin->id) { in define_ddc_registers()
124 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers()
125 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers()
128 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers()
129 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers()
136 ddc->shifts = &ddc_shift; in define_ddc_registers()
137 ddc->masks = &ddc_mask; in define_ddc_registers()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/gpio/dce60/
Dhw_factory_dce60.c117 struct hw_gpio_pin *pin, in define_ddc_registers() argument
120 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers()
122 switch (pin->id) { in define_ddc_registers()
124 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers()
125 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers()
128 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers()
129 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers()
136 ddc->shifts = &ddc_shift; in define_ddc_registers()
137 ddc->masks = &ddc_mask; in define_ddc_registers()
141 static void define_hpd_registers(struct hw_gpio_pin *pin, uint32_t en) in define_hpd_registers() argument
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/linux-6.12.1/drivers/usb/typec/altmodes/
Ddisplayport.c1 // SPDX-License-Identifier: GPL-2.0
3 * USB Typec-C DisplayPort Alternate Mode driver
20 #define DP_HEADER(_dp, ver, cmd) (VDO((_dp)->alt->svid, 1, ver, cmd) \
30 /* Pin assignments that use USB3.1 Gen2 signaling to carry DP protocol */
34 /* Pin assignments that use DP v1.3 signaling to carry DP protocol */
40 /* DP only pin assignments */
45 /* Pin assignments where one channel is for USB */
66 bool hpd; member
82 if (dp->data.conf) { in dp_altmode_notify()
83 state = get_count_order(DP_CONF_GET_PIN_ASSIGN(dp->data.conf)); in dp_altmode_notify()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/gpio/dcn32/
Dhw_factory_dcn32.c49 #define block HPD
192 static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en) in define_generic_registers() argument
194 struct hw_generic *generic = HW_GENERIC_FROM_BASE(pin); in define_generic_registers()
196 generic->regs = &generic_regs[en]; in define_generic_registers()
197 generic->shifts = &generic_shift[en]; in define_generic_registers()
198 generic->masks = &generic_mask[en]; in define_generic_registers()
199 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
203 struct hw_gpio_pin *pin, in define_ddc_registers() argument
206 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers()
208 switch (pin->id) { in define_ddc_registers()
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/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Ddce_v11_0.c55 static void dce_v11_0_hpd_int_ack(struct amdgpu_device *adev, int hpd);
94 uint32_t hpd; member
100 .hpd = DISP_INTERRUPT_STATUS__DC_HPD1_INTERRUPT_MASK
105 .hpd = DISP_INTERRUPT_STATUS_CONTINUE__DC_HPD2_INTERRUPT_MASK
110 .hpd = DISP_INTERRUPT_STATUS_CONTINUE2__DC_HPD3_INTERRUPT_MASK
115 .hpd = DISP_INTERRUPT_STATUS_CONTINUE3__DC_HPD4_INTERRUPT_MASK
120 .hpd = DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK
125 .hpd = DISP_INTERRUPT_STATUS_CONTINUE5__DC_HPD6_INTERRUPT_MASK
165 switch (adev->asic_type) { in dce_v11_0_init_golden_registers()
202 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v11_0_audio_endpt_rreg()
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Ddce_v10_0.c55 static void dce_v10_0_hpd_int_ack(struct amdgpu_device *adev, int hpd);
90 uint32_t hpd; member
96 .hpd = DISP_INTERRUPT_STATUS__DC_HPD1_INTERRUPT_MASK
101 .hpd = DISP_INTERRUPT_STATUS_CONTINUE__DC_HPD2_INTERRUPT_MASK
106 .hpd = DISP_INTERRUPT_STATUS_CONTINUE2__DC_HPD3_INTERRUPT_MASK
111 .hpd = DISP_INTERRUPT_STATUS_CONTINUE3__DC_HPD4_INTERRUPT_MASK
116 .hpd = DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK
121 .hpd = DISP_INTERRUPT_STATUS_CONTINUE5__DC_HPD6_INTERRUPT_MASK
150 switch (adev->asic_type) { in dce_v10_0_init_golden_registers()
178 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v10_0_audio_endpt_rreg()
[all …]
Ddce_v8_0.c82 (0x13830 - 0x7030) >> 2,
89 uint32_t hpd; member
95 .hpd = DISP_INTERRUPT_STATUS__DC_HPD1_INTERRUPT_MASK
100 .hpd = DISP_INTERRUPT_STATUS_CONTINUE__DC_HPD2_INTERRUPT_MASK
105 .hpd = DISP_INTERRUPT_STATUS_CONTINUE2__DC_HPD3_INTERRUPT_MASK
110 .hpd = DISP_INTERRUPT_STATUS_CONTINUE3__DC_HPD4_INTERRUPT_MASK
115 .hpd = DISP_INTERRUPT_STATUS_CONTINUE4__DC_HPD5_INTERRUPT_MASK
120 .hpd = DISP_INTERRUPT_STATUS_CONTINUE5__DC_HPD6_INTERRUPT_MASK
129 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v8_0_audio_endpt_rreg()
132 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v8_0_audio_endpt_rreg()
[all …]
Ddce_v6_0.c72 mmDC_HPD1_INT_STATUS - mmDC_HPD1_INT_STATUS,
73 mmDC_HPD2_INT_STATUS - mmDC_HPD1_INT_STATUS,
74 mmDC_HPD3_INT_STATUS - mmDC_HPD1_INT_STATUS,
75 mmDC_HPD4_INT_STATUS - mmDC_HPD1_INT_STATUS,
76 mmDC_HPD5_INT_STATUS - mmDC_HPD1_INT_STATUS,
77 mmDC_HPD6_INT_STATUS - mmDC_HPD1_INT_STATUS,
87 (0x13830 - 0x7030) >> 2,
94 uint32_t hpd; member
100 .hpd = DISP_INTERRUPT_STATUS__DC_HPD1_INTERRUPT_MASK
105 .hpd = DISP_INTERRUPT_STATUS_CONTINUE__DC_HPD2_INTERRUPT_MASK
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/linux-6.12.1/Documentation/devicetree/bindings/media/cec/
Dcec-common.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/media/cec/cec-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hans Verkuil <hverkuil@xs4all.nl>
14 pattern: "^cec(@[0-9a-f]+|-[0-9]+)?$"
16 hdmi-phandle:
21 needs-hpd:
24 The CEC support is only available when the HPD is high. Some boards only
25 let the CEC pin through if the HPD is high, for example if there is a
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/linux-6.12.1/Documentation/devicetree/bindings/display/bridge/
Dti,sn65dsi86.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Douglas Anderson <dianders@chromium.org>
23 enable-gpios:
25 description: GPIO specifier for bridge_en pin (active high).
27 suspend-gpios:
29 description: GPIO specifier for GPIO1 pin on bridge (active low).
31 no-hpd:
34 Set if the HPD line on the bridge isn't hooked up to anything or is
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