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/linux-6.12.1/drivers/staging/media/tegra-video/
DTODO2 * Add support for Ganged mode.
5 * Make sure v4l2-compliance tests pass with all of the above implementations.
Dcsi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 #include <media/media-entity.h>
10 #include <media/v4l2-async.h>
11 #include <media/v4l2-subdev.h>
22 /* Maximum 2 CSI x4 ports can be ganged up for streaming */
42 * struct tegra_csi_channel - Tegra CSI channel
50 * @numgangports: number of immediate ports ganged up to meet the
51 * channel bus-width
54 * @pg_mode: test pattern generator mode for channel
82 * struct tpg_framerate - Tegra CSI TPG framerate configuration
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Dcsi.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include <media/v4l2-fwnode.h>
70 return -ENOIOCTLCMD; in csi_enum_bus_code()
72 if (code->index >= ARRAY_SIZE(tegra_csi_tpg_fmts)) in csi_enum_bus_code()
73 return -EINVAL; in csi_enum_bus_code()
75 code->code = tegra_csi_tpg_fmts[code->index].code; in csi_enum_bus_code()
87 return -ENOIOCTLCMD; in csi_get_format()
89 fmt->format = csi_chan->format; in csi_get_format()
100 frmrate = csi->soc->tpg_frmrate_table; in csi_get_frmrate_table_index()
101 for (i = 0; i < csi->soc->tpg_frmrate_table_size; i++) { in csi_get_frmrate_table_index()
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Dtegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
150 writel_relaxed(val, chan->vi->iomem + addr); in tegra_vi_write()
155 return readl_relaxed(chan->vi->iomem + addr); in tegra_vi_read()
164 vi_csi_base = chan->vi->iomem + TEGRA210_VI_CSI_BASE(portno); in vi_csi_write()
174 vi_csi_base = chan->vi->iomem + TEGRA210_VI_CSI_BASE(portno); in vi_csi_read()
185 struct tegra_vi *vi = chan->vi; in tegra210_channel_host1x_syncpt_init()
191 for (i = 0; i < chan->numgangports; i++) { in tegra210_channel_host1x_syncpt_init()
192 fs_sp = host1x_syncpt_request(&vi->client, flags); in tegra210_channel_host1x_syncpt_init()
194 dev_err(vi->dev, "failed to request frame start syncpoint\n"); in tegra210_channel_host1x_syncpt_init()
195 ret = -ENOMEM; in tegra210_channel_host1x_syncpt_init()
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/linux-6.12.1/Documentation/devicetree/bindings/usb/
Dusb251xb.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip USB 2.0 Hi-Speed Hub Controller
10 - Richard Leitner <richard.leitner@skidata.com>
15 - microchip,usb2422
16 - microchip,usb2512b
17 - microchip,usb2512bi
18 - microchip,usb2513b
19 - microchip,usb2513bi
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/linux-6.12.1/drivers/gpu/drm/tegra/
Ddsi.c1 // SPDX-License-Identifier: GPL-2.0-only
30 #include "mipi-phy.h"
81 /* for ganged-mode support */
104 return to_dsi_state(dsi->output.connector.state); in tegra_dsi_get_state()
109 u32 value = readl(dsi->regs + (offset << 2)); in tegra_dsi_readl()
111 trace_dsi_readl(dsi->dev, offset, value); in tegra_dsi_readl()
119 trace_dsi_writel(dsi->dev, offset, value); in tegra_dsi_writel()
120 writel(value, dsi->regs + (offset << 2)); in tegra_dsi_writel()
201 struct drm_info_node *node = s->private; in tegra_dsi_show_regs()
202 struct tegra_dsi *dsi = node->info_ent->data; in tegra_dsi_show_regs()
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/linux-6.12.1/Documentation/devicetree/bindings/display/panel/
Djdi,lpm102a188a.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
13 This panel requires a dual-channel DSI host to operate. It supports two modes:
14 - left-right: each channel drives the left or right half of the screen
15 - even-odd: each channel drives the even or odd lines of the screen
18 driven by the first link (DSI-LINK1) is considered the primary peripheral
20 peripheral driven by the second link (DSI-LINK2).
23 - $ref: panel-common.yaml#
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/linux-6.12.1/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra20-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - enum:
17 - nvidia,tegra20-dsi
18 - nvidia,tegra30-dsi
19 - nvidia,tegra114-dsi
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/linux-6.12.1/drivers/usb/misc/
Dusb251xb.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for Microchip USB251xB USB 2.0 Hi-Speed Hub Controller
9 * a not-accepted patch by Fabien Lahoudere, see:
110 #define DRIVER_DESC "Microchip USB 2.0 Hi-Speed Hub Controller"
234 if (dev->type == &i2c_adapter_type) { in usb251xb_check_dev_children()
244 struct gpio_chip *gc = gpiod_to_chip(hub->gpio_reset); in usb251x_check_gpio_chip()
245 struct i2c_adapter *adap = hub->i2c->adapter; in usb251x_check_gpio_chip()
248 if (!hub->gpio_reset) in usb251x_check_gpio_chip()
252 return -EINVAL; in usb251x_check_gpio_chip()
254 ret = usb251xb_check_dev_children(&adap->dev, gc->parent); in usb251x_check_gpio_chip()
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/linux-6.12.1/drivers/edac/
Damd64_edac.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * cleared to prevent re-enabling the hardware by this driver.
19 if (!pvt->flags.zn_regs_v2) in get_umc_reg()
31 /* Per-node stuff */
39 * bandwidth to a valid bit pattern. The 'set' operation finds the 'matching-
81 func, PCI_FUNC(pdev->devfn), offset); in __amd64_read_pci_cfg_dword()
94 func, PCI_FUNC(pdev->devfn), offset); in __amd64_write_pci_cfg_dword()
106 amd64_read_pci_cfg(pvt->F1, DCT_CFG_SEL, &reg); in f15h_select_dct()
107 reg &= (pvt->model == 0x30) ? ~3 : ~1; in f15h_select_dct()
109 amd64_write_pci_cfg(pvt->F1, DCT_CFG_SEL, reg); in f15h_select_dct()
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/linux-6.12.1/arch/arm/boot/dts/nvidia/
Dtegra114-asus-tf701t.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
13 chassis-type = "convertible";
29 trusted-foundations {
30 compatible = "tlm,trusted-foundations";
31 tlm,version-major = <2>;
32 tlm,version-minor = <8>;
40 reserved-memory {
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/linux-6.12.1/arch/arm64/boot/dts/nvidia/
Dtegra210-smaug.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/mfd/max77620.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
12 compatible = "google,smaug-rev8", "google,smaug-rev7",
13 "google,smaug-rev6", "google,smaug-rev5",
14 "google,smaug-rev4", "google,smaug-rev3",
15 "google,smaug-rev2", "google,smaug-rev1",
25 stdout-path = "serial0:115200n8";
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/linux-6.12.1/drivers/usb/host/
Dohci-hcd.c1 // SPDX-License-Identifier: GPL-1.0+
8 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
16 * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
17 * interfaces (though some non-x86 Intel chips use it). It supports
39 #include <linux/dma-mapping.h>
54 /*-------------------------------------------------------------------------*/
56 /* For initializing controller (mask in an HCFS mode too) */
63 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
72 /*-------------------------------------------------------------------------*/
81 #include "pci-quirks.h"
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/linux-6.12.1/drivers/gpu/drm/i915/display/
Dintel_display.c2 * Copyright © 2006-2007 Intel Corporation
27 #include <linux/dma-resv.h>
161 drm_WARN(&dev_priv->drm, (val & CCK_FREQUENCY_STATUS) != in vlv_get_cck_clock()
175 if (dev_priv->hpll_freq == 0) in vlv_get_cck_clock_hpll()
176 dev_priv->hpll_freq = vlv_get_hpll_vco(dev_priv); in vlv_get_cck_clock_hpll()
178 hpll = vlv_get_cck_clock(dev_priv, name, reg, dev_priv->hpll_freq); in vlv_get_cck_clock_hpll()
190 dev_priv->czclk_freq = vlv_get_cck_clock_hpll(dev_priv, "czclk", in intel_update_czclk()
193 drm_dbg(&dev_priv->drm, "CZ clock rate: %d kHz\n", in intel_update_czclk()
194 dev_priv->czclk_freq); in intel_update_czclk()
199 return (crtc_state->active_planes & in is_hdr_mode()
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/linux-6.12.1/drivers/usb/core/
Dhub.c1 // SPDX-License-Identifier: GPL-2.0
70 /* Protect struct usb_device->state and ->children members
71 * Note: Both are also protected by ->dev.sem, except that ->state can
79 /* synchronize hub-port add/remove and peering operations */
89 * 10 seconds to send reply for the initial 64-byte descriptor request.
91 /* define initial 64-byte descriptor request timeout in milliseconds */
95 "initial 64-byte descriptor request timeout in milliseconds "
96 "(default 5000 - 5.0 seconds)");
140 if (hub_is_superspeedplus(hub->hdev)) in portspeed()
142 if (hub_is_superspeed(hub->hdev)) in portspeed()
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