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/linux-6.12.1/Documentation/ABI/testing/
Dsysfs-bus-iio-adc-mt63603 Contact: gene_chen@richtek.com
6 Calculating with scale and offset returns voltage in uV
10 Contact: gene_chen@richtek.com
12 Indicated MT6360 VBUS ADC with lower accuracy(+-75mA)
14 Calculating with scale and offset returns voltage in uV
18 Contact: gene_chen@richtek.com
20 Indicated MT6360 VBUS ADC with higher accuracy(+-30mA)
22 Calculating with scale and offset returns voltage in uV
26 Contact: gene_chen@richtek.com
29 Calculating with scale and offset returns voltage in uV
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Ddebugfs-tpmi1 What: /sys/kernel/debug/tpmi-<n>/pfs_dump
4 Contact: srinivas.pandruvada@linux.intel.com
8 tpmi_id, number of entries, entry size, offset, vsec offset, lock status
12 What: /sys/kernel/debug/tpmi-<n>/tpmi-id-<n>/mem_dump
15 Contact: srinivas.pandruvada@linux.intel.com
20 What: /sys/kernel/debug/tpmi-<n>/tpmi-id-<n>/mem_write
23 Contact: srinivas.pandruvada@linux.intel.com
25 Allows to write at any offset. It doesn't check for Read/Write access
26 as hardware will not allow to write at read-only memory. This write is
27 at offset multiples of 4. The format is instance,offset,contents.
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/linux-6.12.1/drivers/gpio/
Dgpio-tps68470.c1 // SPDX-License-Identifier: GPL-2.0
8 * Antti Laakso <antti.laakso@intel.com>
9 * Tianshu Qiu <tian.shu.qiu@intel.com>
10 * Jian Xu Zheng <jian.xu.zheng@intel.com>
11 * Yuning Pu <yuning.pu@intel.com>
29 static int tps68470_gpio_get(struct gpio_chip *gc, unsigned int offset) in tps68470_gpio_get() argument
32 struct regmap *regmap = tps68470_gpio->tps68470_regmap; in tps68470_gpio_get()
36 if (offset >= TPS68470_N_REGULAR_GPIO) { in tps68470_gpio_get()
37 offset -= TPS68470_N_REGULAR_GPIO; in tps68470_gpio_get()
43 dev_err(tps68470_gpio->gc.parent, "reg 0x%x read failed\n", in tps68470_gpio_get()
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Dgpio-lp87565.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
4 * Keerthy <j-keerthy@ti.com>
21 static int lp87565_gpio_get(struct gpio_chip *chip, unsigned int offset) in lp87565_gpio_get() argument
26 ret = regmap_read(gpio->map, LP87565_REG_GPIO_IN, &val); in lp87565_gpio_get()
30 return !!(val & BIT(offset)); in lp87565_gpio_get()
33 static void lp87565_gpio_set(struct gpio_chip *chip, unsigned int offset, in lp87565_gpio_set() argument
38 regmap_update_bits(gpio->map, LP87565_REG_GPIO_OUT, in lp87565_gpio_set()
39 BIT(offset), value ? BIT(offset) : 0); in lp87565_gpio_set()
43 unsigned int offset) in lp87565_gpio_get_direction() argument
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Dgpio-tps65086.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2015-2023 Texas Instruments Incorporated - https://www.ti.com/
4 * Andrew Davis <afd@ti.com>
21 unsigned offset) in tps65086_gpio_get_direction() argument
28 unsigned offset) in tps65086_gpio_direction_input() argument
31 return -EINVAL; in tps65086_gpio_direction_input()
35 unsigned offset, int value) in tps65086_gpio_direction_output() argument
40 regmap_update_bits(gpio->tps->regmap, TPS65086_GPOCTRL, in tps65086_gpio_direction_output()
41 BIT(4 + offset), value ? BIT(4 + offset) : 0); in tps65086_gpio_direction_output()
46 static int tps65086_gpio_get(struct gpio_chip *chip, unsigned offset) in tps65086_gpio_get() argument
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Dgpio-lp873x.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
4 * Keerthy <j-keerthy@ti.com>
25 unsigned int offset) in lp873x_gpio_get_direction() argument
32 unsigned int offset) in lp873x_gpio_direction_input() argument
35 return -EINVAL; in lp873x_gpio_direction_input()
39 unsigned int offset, int value) in lp873x_gpio_direction_output() argument
44 return regmap_update_bits(gpio->lp873->regmap, LP873X_REG_GPO_CTRL, in lp873x_gpio_direction_output()
45 BIT(offset * BITS_PER_GPO), in lp873x_gpio_direction_output()
46 value ? BIT(offset * BITS_PER_GPO) : 0); in lp873x_gpio_direction_output()
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Dgpio-tps65912.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
6 * Andrew F. Davis <afd@ti.com>
24 unsigned offset) in tps65912_gpio_get_direction() argument
30 ret = regmap_read(gpio->tps->regmap, TPS65912_GPIO1 + offset, &val); in tps65912_gpio_get_direction()
40 static int tps65912_gpio_direction_input(struct gpio_chip *gc, unsigned offset) in tps65912_gpio_direction_input() argument
44 return regmap_update_bits(gpio->tps->regmap, TPS65912_GPIO1 + offset, in tps65912_gpio_direction_input()
49 unsigned offset, int value) in tps65912_gpio_direction_output() argument
54 regmap_update_bits(gpio->tps->regmap, TPS65912_GPIO1 + offset, in tps65912_gpio_direction_output()
57 return regmap_update_bits(gpio->tps->regmap, TPS65912_GPIO1 + offset, in tps65912_gpio_direction_output()
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Dgpio-bd71815.c1 // SPDX-License-Identifier: GPL-2.0
5 * Author: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
8 * Author: yanglsh@embest-tech.com
18 #include <linux/mfd/rohm-bd71815.h>
28 static int bd71815gpo_get(struct gpio_chip *chip, unsigned int offset) in bd71815gpo_get() argument
33 ret = regmap_read(bd71815->regmap, BD71815_REG_GPO, &val); in bd71815gpo_get()
37 return (val >> offset) & 1; in bd71815gpo_get()
40 static void bd71815gpo_set(struct gpio_chip *chip, unsigned int offset, in bd71815gpo_set() argument
46 bit = BIT(offset); in bd71815gpo_set()
49 ret = regmap_set_bits(bd71815->regmap, BD71815_REG_GPO, bit); in bd71815gpo_set()
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Dgpio-tpic2810.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015-2023 Texas Instruments Incorporated - https://www.ti.com/
4 * Andrew Davis <afd@ti.com>
15 * struct tpic2810 - GPIO driver data
28 static void tpic2810_set(struct gpio_chip *chip, unsigned offset, int value);
31 unsigned offset) in tpic2810_get_direction() argument
38 unsigned offset) in tpic2810_direction_input() argument
41 return -EINVAL; in tpic2810_direction_input()
45 unsigned offset, int value) in tpic2810_direction_output() argument
48 tpic2810_set(chip, offset, value); in tpic2810_direction_output()
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/linux-6.12.1/Documentation/devicetree/bindings/display/
Dsolomon,ssd1307fb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Maxime Ripard <mripard@kernel.org>
11 - Javier Martinez Canillas <javierm@redhat.com>
17 - enum:
18 - solomon,ssd1305fb-i2c
19 - solomon,ssd1306fb-i2c
20 - solomon,ssd1307fb-i2c
21 - solomon,ssd1309fb-i2c
[all …]
/linux-6.12.1/drivers/clk/meson/
Dmeson8b.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Author: Carlo Caione <carlo@endlessm.com>
7 * Michael Turquette <mturquette@baylibre.com>
20 * [0] https://dn.odroid.com/S805/Datasheet/S805_Datasheet%20V0.8%2020150126.pdf
22 #define HHI_GP_PLL_CNTL 0x40 /* 0x10 offset in data sheet */
23 #define HHI_GP_PLL_CNTL2 0x44 /* 0x11 offset in data sheet */
24 #define HHI_GP_PLL_CNTL3 0x48 /* 0x12 offset in data sheet */
25 #define HHI_GP_PLL_CNTL4 0x4C /* 0x13 offset in data sheet */
26 #define HHI_GP_PLL_CNTL5 0x50 /* 0x14 offset in data sheet */
27 #define HHI_VIID_CLK_DIV 0x128 /* 0x4a offset in data sheet */
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/linux-6.12.1/include/crypto/
Dscatterwalk.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
6 * Copyright (c) 2002 Adam J. Richter <adam@yggdrasil.com>
7 * Copyright (c) 2004 Jean-Luc Cooke <jlcooke@certainkey.com>
31 unsigned int len = walk->sg->offset + walk->sg->length - walk->offset; in scatterwalk_pagelen()
32 unsigned int len_this_page = offset_in_page(~walk->offset) + 1; in scatterwalk_pagelen()
46 walk->offset += nbytes; in scatterwalk_advance()
51 return sg_page(walk->sg) + (walk->offset >> PAGE_SHIFT); in scatterwalk_page()
62 walk->sg = sg; in scatterwalk_start()
63 walk->offset = sg->offset; in scatterwalk_start()
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/linux-6.12.1/drivers/net/dsa/mv88e6xxx/
Dptp.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 * Erik Hons <erik.hons@ni.com>
9 * Brandon Streiff <brandon.streiff@ni.com>
10 * Dane Wagner <dane.wagner@ni.com>
18 /* Offset 0x00: TAI Global Config */
33 /* Offset 0x01: Timestamp Clock Period (ps) */
36 /* Offset 0x02/0x03: Trigger Generation Amount */
40 /* Offset 0x04: Clock Compensation */
43 /* Offset 0x05: Trigger Configuration */
46 /* Offset 0x06: Ingress Rate Limiter Clock Generation Amount */
[all …]
Dhwtstamp.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 * Erik Hons <erik.hons@ni.com>
9 * Brandon Streiff <brandon.streiff@ni.com>
10 * Dane Wagner <dane.wagner@ni.com>
19 /* Offset 0x00: PTP EtherType */
22 /* Offset 0x01: Message Type Timestamp Enables */
30 /* Offset 0x02: Timestamp Arrival Capture Pointers */
33 /* Offset 0x05: PTP Global Configuration */
39 /* Offset 0x07: PTP Global Configuration */
48 /* Offset 0x08: PTP Interrupt Status */
[all …]
/linux-6.12.1/drivers/gpu/drm/i915/gvt/
Dmmio.h2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
25 * Kevin Tian <kevin.tian@intel.com>
29 * Tina Zhang <tina.zhang@intel.com>
30 * Min He <min.he@intel.com>
31 * Niu Bing <bing.niu@intel.com>
32 * Zhi Wang <zhi.a.wang@intel.com>
63 u32 offset; member
77 int (*handler)(struct intel_gvt *gvt, u32 offset, void *data),
81 unsigned int offset);
94 int intel_vgpu_default_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,
[all …]
Dmmio.c2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
25 * Kevin Tian <kevin.tian@intel.com>
29 * Tina Zhang <tina.zhang@intel.com>
30 * Min He <min.he@intel.com>
31 * Niu Bing <bing.niu@intel.com>
32 * Zhi Wang <zhi.a.wang@intel.com>
46 * intel_vgpu_gpa_to_mmio_offset - translate a GPA to MMIO offset
56 return gpa - gttmmio_gpa; in intel_vgpu_gpa_to_mmio_offset()
60 (reg >= 0 && reg < gvt->device_info.mmio_size)
63 (reg >= gvt->device_info.gtt_start_offset \
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Dcfg_space.c2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
24 * Eddie Dong <eddie.dong@intel.com>
25 * Jike Song <jike.song@intel.com>
28 * Zhi Wang <zhi.a.wang@intel.com>
29 * Min He <min.he@intel.com>
30 * Bing Niu <bing.niu@intel.com>
45 /* bitmap for writable bits (RW or RW1C bits, but cannot co-exist in one
53 [PCI_BASE_ADDRESS_0 ... PCI_CARDBUS_CIS - 1] = 0xff,
59 * vgpu_pci_cfg_mem_write - write virtual cfg space memory
61 * @off: offset
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/linux-6.12.1/drivers/fpga/
Ddfl-afu.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2017-2018 Intel Corporation, Inc.
8 * Wu Hao <hao.wu@intel.com>
9 * Xiao Guangrong <guangrong.xiao@linux.intel.com>
10 * Joseph Grecco <joe.grecco@intel.com>
11 * Enno Luebbers <enno.luebbers@intel.com>
12 * Tim Whisonant <tim.whisonant@intel.com>
13 * Ananda Ravuri <ananda.ravuri@intel.com>
14 * Henry Mitchel <henry.mitchel@intel.com>
25 * struct dfl_afu_mmio_region - afu mmio region data structure
[all …]
Ddfl-pci.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2017-2018 Intel Corporation, Inc.
8 * Zhang Yi <Yi.Z.Zhang@intel.com>
9 * Xiao Guangrong <guangrong.xiao@linux.intel.com>
10 * Joseph Grecco <joe.grecco@intel.com>
11 * Enno Luebbers <enno.luebbers@intel.com>
12 * Tim Whisonant <tim.whisonant@intel.com>
13 * Ananda Ravuri <ananda.ravuri@intel.com>
14 * Henry Mitchel <henry.mitchel@intel.com>
18 #include <linux/dma-mapping.h>
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/linux-6.12.1/Documentation/iio/
Dad4695.rst1 .. SPDX-License-Identifier: GPL-2.0-only
16 * `AD4695 <https://www.analog.com/AD4695>`_
17 * `AD4696 <https://www.analog.com/AD4696>`_
18 * `AD4697 <https://www.analog.com/AD4697>`_
19 * `AD4698 <https://www.analog.com/AD4698>`_
26 ----------------
30 4-wire mode
35 .. code-block::
37 +-------------+ +-------------+
38 | CS |<-+------| CS |
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/linux-6.12.1/arch/hexagon/kernel/
Dasm-offsets.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
9 * Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.
21 files typically used in c. Specifically, it generates asm-offsets.h */
32 OFFSET(_PT_SYSCALL_NR, pt_regs, syscall_nr); in main()
33 OFFSET(_PT_GPUGP, pt_regs, gpugp); in main()
34 OFFSET(_PT_CS1CS0, pt_regs, cs1cs0); in main()
35 OFFSET(_PT_R3130, pt_regs, r3130); in main()
36 OFFSET(_PT_R2928, pt_regs, r2928); in main()
37 OFFSET(_PT_R2726, pt_regs, r2726); in main()
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/linux-6.12.1/drivers/target/iscsi/cxgbit/
Dcxgbit_ddp.c1 // SPDX-License-Identifier: GPL-2.0-only
14 unsigned int offset = sg_off ? *sg_off : 0; in cxgbit_set_one_ppod() local
19 memcpy(ppod, &ttinfo->hdr, sizeof(struct cxgbi_pagepod_hdr)); in cxgbit_set_one_ppod()
28 ppod->addr[i] = cpu_to_be64(addr + offset); in cxgbit_set_one_ppod()
29 offset += PAGE_SIZE; in cxgbit_set_one_ppod()
30 if (offset == (len + sg->offset)) { in cxgbit_set_one_ppod()
31 offset = 0; in cxgbit_set_one_ppod()
39 ppod->addr[i] = 0ULL; in cxgbit_set_one_ppod()
49 *sg_off = offset; in cxgbit_set_one_ppod()
52 if (offset == len) { in cxgbit_set_one_ppod()
[all …]
/linux-6.12.1/drivers/net/wwan/t7xx/
Dt7xx_pcie_mac.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2021-2022, Intel Corporation.
7 * Haijun Liu <haijun.liu@mediatek.com>
8 * Moises Veleta <moises.veleta@intel.com>
9 * Sreehari Kancharla <sreehari.kancharla@intel.com>
12 * Amir Hanania <amir.hanania@intel.com>
13 * Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.com>
14 * Ricardo Martinez <ricardo.martinez@linux.intel.com>
20 #include <linux/io-64-nonatomic-lo-hi.h>
73 int i, offset; in t7xx_pcie_mac_atr_tables_dis() local
[all …]
/linux-6.12.1/drivers/soc/fsl/qe/
Dqe_common.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Author: Scott Wood <scottwood@freescale.com>
7 * Copyright 2007-2008,2010 Freescale Semiconductor, Inc.
11 * Copyright (c) 1999-2001 Dan Malek <dan@embeddedalley.com>
12 * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com)
14 * Vitaly Bordug <vbordug@ru.mvista.com>
57 np = of_find_compatible_node(NULL, NULL, "fsl,cpm-muram-data"); in cpm_muram_init()
60 np = of_find_node_by_name(NULL, "data-only"); in cpm_muram_init()
63 ret = -ENODEV; in cpm_muram_init()
68 muram_pool = gen_pool_create(0, -1); in cpm_muram_init()
[all …]
/linux-6.12.1/lib/lzo/
Dlzo1x_decompress_safe.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 1996-2012 Markus F.X.J. Oberhumer <markus@oberhumer.com>
8 * http://www.oberhumer.com/opensource/lzo/
11 * Nitin Gupta <nitingupta910@gmail.com>
12 * Richard Purdie <rpurdie@openedhand.com>
23 #define HAVE_IP(x) ((size_t)(ip_end - ip) >= (size_t)(x))
24 #define HAVE_OP(x) ((size_t)(op_end - op) >= (size_t)(x))
37 #define MAX_255_COUNT ((((size_t)~0) / 255) - 2)
66 t = *ip++ - 17; in lzo1x_decompress_safe()
79 size_t offset; in lzo1x_decompress_safe() local
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