Home
last modified time | relevance | path

Searched +full:1 +full:- +full:5 (Results 1 – 25 of 1258) sorted by relevance

12345678910>>...51

/linux-6.12.1/drivers/pinctrl/tegra/
Dpinctrl-tegra234.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved.
16 #include "pinctrl-tegra.h"
1382 #define PINGROUP_REG_N(r) -1
1385 #define DRV_PINGROUP_N(r) -1
1388 .drv_reg = -1, \
1389 .drv_bank = -1, \
1390 .drvdn_bit = -1, \
1391 .drvup_bit = -1, \
1392 .slwr_bit = -1, \
[all …]
Dpinctrl-tegra194.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
23 #include "pinctrl-tegra.h"
1281 #define PINGROUP_REG_N(r) -1
1284 #define DRV_PINGROUP_N(r) -1
1287 .drv_reg = -1, \
1288 .drv_bank = -1, \
1289 .drvdn_bit = -1, \
1290 .drvup_bit = -1, \
1291 .slwr_bit = -1, \
[all …]
Dpinctrl-tegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include "pinctrl-tegra.h"
23 #define TEGRA_PIN_PEX_L0_CLKREQ_N_PA1 _GPIO(1)
27 #define TEGRA_PIN_SATA_LED_ACTIVE_PA5 _GPIO(5)
177 /* All non-GPIO pins follow */
178 #define NUM_GPIOS (TEGRA_PIN_QSPI_IO3_PEE5 + 1)
181 /* Non-GPIO pins */
183 #define TEGRA_PIN_CPU_PWR_REQ _PIN(1)
187 #define TEGRA_PIN_BATT_BCL _PIN(5)
1267 #define PINGROUP_REG_A 0x3000 /* bank 1 */
[all …]
/linux-6.12.1/Documentation/i2c/
Di2c_bus.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- Created with Inkscape (http://www.inkscape.org/) -->
3 <!-- Updated to inclusive terminology by Wolfram Sang -->
8 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
11 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
14 inkscape:version="0.92.3 (2405546, 2018-03-11)"
31 inkscape:connector-curvature="0"
33 …d="m -2.5,-1 c 0,2.76 -2.24,5 -5,5 -2.76,0 -5,-2.24 -5,-5 0,-2.76 2.24,-5 5,-5 2.76,0 5,2.24 5,5 z"
34 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro…
48 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro…
[all …]
/linux-6.12.1/arch/m68k/lib/
Dchecksum.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
19 * length-counter instead of the length counter
20 * (%1). Thanks to Roman Hodek for pointing this out.
22 * data-registers to hold input values and one tries to
43 * is aligned on either a 2-byte or 4-byte boundary. in csum_partial()
46 "btst #1,%3\n\t" /* Check alignment */ in csum_partial()
48 "subql #2,%1\n\t" /* buff%4==2: treat first word */ in csum_partial()
49 "jgt 1f\n\t" in csum_partial()
50 "addql #2,%1\n\t" /* len was == 2, treat only rest */ in csum_partial()
[all …]
/linux-6.12.1/arch/powerpc/lib/
Dfeature-fixups-test.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 #include <asm/feature-fixups.h>
9 #include <asm/asm-compat.h>
10 #include <asm/ppc-opcode.h>
19 or 1,1,1
26 or 1,1,1
31 or 1,1,1
36 or 1,1,1
43 or 1,1,1
51 or 1,1,1
[all …]
/linux-6.12.1/arch/alpha/lib/
Dmemmove.S1 /* SPDX-License-Identifier: GPL-2.0 */
7 * This is hand-massaged output from the original memcpy.c. We defer to
22 .prologue 1
25 addq $17,$18,$5
26 cmpule $4,$17,$1 /* dest + n <= src */
27 cmpule $5,$16,$2 /* dest >= src + n */
29 bis $1,$2,$1
32 bne $1,memcpy !samegp
34 and $2,7,$2 /* Test for src/dest co-alignment. */
35 and $16,7,$1
[all …]
Dev6-memset.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-memset.S
8 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
13 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
15 * E - either cluster
16 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
17 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
41 .align 5
48 * undertake a major re-write to interleave the constant materialization
49 * with other parts of the fall-through code. This is important, even
[all …]
/linux-6.12.1/Documentation/input/devices/
Delantech.rst4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
6 Extra information for hardware version 1 found and
15 1. Introduction
18 4. Hardware version 1
22 5. Hardware version 2
25 5.2.1 Parity checking and packet re-synchronization
31 6.2.1 One/Three finger touch
36 7.2.1 Status packet
42 8.2.1 Status Packet
50 hardware versions unimaginatively called version 1,version 2, version 3
[all …]
/linux-6.12.1/arch/powerpc/crypto/
Dpoly1305-p10le_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
10 # Poly1305 - this version mainly using vector/VSX/Scalar
11 # - 26 bits limbs
12 # - Handle multiple 64 byte blcok.
17 # p = 2^130 - 5
25 # 07/22/21 - this revison based on the above sum of products. Setup r^4, r^3, r^2, r and s3, s2, …
29 # vs [r^1, r^3, r^2, r^4]
35 # vs5 = [r1*5,...]
36 # vs6 = [r2*5,...]
[all …]
/linux-6.12.1/include/dt-bindings/pinctrl/
Dpads-imx8dxl.h1 /* SPDX-License-Identifier: GPL-2.0+ */
11 #define IMX8DXL_PCIE_CTRL0_CLKREQ_B 1
15 #define IMX8DXL_USB_SS3_TC1 5
150 … IMX8DXL_PCIE_CTRL0_PERST_B_LSIO_GPIO7_IO00 IMX8DXL_PCIE_CTRL0_PERST_B 5
153 … IMX8DXL_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO7_IO01 IMX8DXL_PCIE_CTRL0_CLKREQ_B 5
156 … IMX8DXL_PCIE_CTRL0_WAKE_B_LSIO_GPIO7_IO02 IMX8DXL_PCIE_CTRL0_WAKE_B 5
158 … IMX8DXL_USB_SS3_TC0_CONN_USB_OTG1_PWR IMX8DXL_USB_SS3_TC0 1
161 … IMX8DXL_USB_SS3_TC0_LSIO_GPIO7_IO03 IMX8DXL_USB_SS3_TC0 5
163 … IMX8DXL_USB_SS3_TC1_CONN_USB_OTG2_PWR IMX8DXL_USB_SS3_TC1 1
165 … IMX8DXL_USB_SS3_TC1_LSIO_GPIO7_IO04 IMX8DXL_USB_SS3_TC1 5
[all …]
/linux-6.12.1/drivers/gpu/drm/i915/display/
Dintel_qp_tables.c1 // SPDX-License-Identifier: MIT
41 { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
43 { 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
45 { 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
47 { 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1,
48 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
49 { 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1,
50 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0 },
51 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1,
52 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0 },
[all …]
/linux-6.12.1/drivers/edac/
Dpnd2_edac.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 u32 lock : 1;
31 u32 lock : 1;
41 u32 enable : 1;
54 u64 slice_1_disabled : 1;
55 u64 hvm_mode : 1;
57 u64 slice_0_mem_disabled : 1;
58 u64 reserved_0 : 1;
61 u64 enable_pmi_dual_data_mode : 1;
62 u64 ch_1_disabled : 1;
[all …]
/linux-6.12.1/lib/
Dtest_objagg.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
21 WARN_ON(1); in key_id_index()
60 if (!world->key_refs[key_id_index(key_id)]) { in world_obj_get()
61 world->objagg_objs[key_id_index(key_id)] = objagg_obj; in world_obj_get()
62 } else if (world->objagg_objs[key_id_index(key_id)] != objagg_obj) { in world_obj_get()
65 err = -EINVAL; in world_obj_get()
68 world->key_refs[key_id_index(key_id)]++; in world_obj_get()
81 if (!world->key_refs[key_id_index(key_id)]) in world_obj_put()
83 objagg_obj = world->objagg_objs[key_id_index(key_id)]; in world_obj_put()
85 world->key_refs[key_id_index(key_id)]--; in world_obj_put()
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/alderlake/
Dpipeline.json4 "Counter": "0,1,2,3,4,5,6,7",
5 "CounterMask": "1",
6 "Deprecated": "1",
15 "Counter": "0,1,2,3,4,5,6,7",
16 "CounterMask": "1",
19 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
26 "Counter": "0,1,2,3,4,5,6,7",
27 "CounterMask": "1",
28 "Deprecated": "1",
37 "Counter": "0,1,2,3,4,5,6,7",
[all …]
/linux-6.12.1/arch/arm64/include/asm/
Dsysreg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <linux/kasan-tags.h>
16 #include <asm/gpr-num.h>
22 * [20-19] : Op0
23 * [18-16] : Op1
24 * [15-12] : CRn
25 * [11-8] : CRm
26 * [7-5] : Op2
36 #define Op2_shift 5
83 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/meteorlake/
Dpipeline.json4 "Counter": "0,1,2,3,4,5,6,7",
5 "CounterMask": "1",
14 "Counter": "0,1,2,3,4,5,6,7",
15 "CounterMask": "1",
18 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
25 "Counter": "0,1,2,3,4,5,6,7",
26 "CounterMask": "1",
35 "Counter": "0,1,2,3,4,5,6,7",
45 "Counter": "0,1,2,3,4,5,6,7",
54 "Counter": "0,1,2,3,4,5,6,7",
[all …]
/linux-6.12.1/arch/mips/include/asm/
Dpgtable-32.h19 #include <asm-generic/pgtable-nopmd.h>
26 * Regarding 32-bit MIPS huge page support (and the tradeoff it entails):
28 * We use the same huge page sizes as 64-bit MIPS. Assuming a 4KB page size,
29 * our 2-level table layout would normally have a PGD entry cover a contiguous
30 * 4MB virtual address region (pointing to a 4KB PTE page of 1,024 32-bit pte_t
32 * spanning both halves of a TLB EntryLo0,1 pair, requires 2MB hardware page
33 * support, not one of the standard supported sizes (1MB,4MB,16MB,...).
37 * increases to match 64-bit MIPS, but PTE lookups remain CPU cache-friendly.
39 * NOTE: We don't yet support huge pages if extended-addressing is enabled
40 * (i.e. EVA, XPA, 36-bit Alchemy/Netlogic).
[all …]
/linux-6.12.1/drivers/misc/cardreader/
Drts5261.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Driver for Realtek PCI-Express card reader
4 * Copyright(c) 2018-2019 Realtek Semiconductor Corp. All rights reserved.
28 #define RTS5261_FORCE_PRSNT_LOW (1 << 6)
29 #define RTS5261_AUX_CLK_16M_EN (1 << 5)
32 #define RTS5261_PWD_SUSPND_EN (1 << 4)
35 #define PAD_GPIO_H3L1 (1 << 3)
51 /* EFUSE_MODE: 0=READ 1=PROGRAM */
70 #define RTS5261_INFORM_RTD3_COLD (0x01<<5)
75 #define RTS5261_LDO12_VO_TUNE_MASK (0x07<<1)
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/graniterapids/
Dpipeline.json4 "Counter": "0,1,2,3,4,5,6,7",
5 "CounterMask": "1",
8 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
14 "Counter": "0,1,2,3,4,5,6,7",
15 "CounterMask": "1",
23 "Counter": "0,1,2,3,4,5,6,7",
32 "Counter": "0,1,2,3,4,5,6,7",
35 "PEBS": "1",
41 "Counter": "0,1,2,3,4,5,6,7",
44 "PEBS": "1",
[all …]
/linux-6.12.1/arch/alpha/kernel/
Dtraps.c1 // SPDX-License-Identifier: GPL-2.0
37 regs->pc, regs->r26, regs->ps, print_tainted()); in dik_show_regs()
38 printk("pc is at %pSR\n", (void *)regs->pc); in dik_show_regs()
39 printk("ra is at %pSR\n", (void *)regs->r26); in dik_show_regs()
41 regs->r0, regs->r1, regs->r2); in dik_show_regs()
43 regs->r3, regs->r4, regs->r5); in dik_show_regs()
45 regs->r6, regs->r7, regs->r8); in dik_show_regs()
56 regs->r16, regs->r17, regs->r18); in dik_show_regs()
58 regs->r19, regs->r20, regs->r21); in dik_show_regs()
60 regs->r22, regs->r23, regs->r24); in dik_show_regs()
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/alderlaken/
Dpipeline.json4 "Counter": "0,1,2,3,4,5",
7 "PEBS": "1",
13 "Counter": "0,1,2,3,4,5",
14 "Deprecated": "1",
17 "PEBS": "1",
23 "Counter": "0,1,2,3,4,5",
26 "PEBS": "1",
32 "Counter": "0,1,2,3,4,5",
35 "PEBS": "1",
41 "Counter": "0,1,2,3,4,5",
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/emeraldrapids/
Dpipeline.json4 "Counter": "0,1,2,3,4,5,6,7",
5 "CounterMask": "1",
6 "Deprecated": "1",
14 "Counter": "0,1,2,3,4,5,6,7",
15 "CounterMask": "1",
18 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
24 "Counter": "0,1,2,3,4,5,6,7",
25 "CounterMask": "1",
26 "Deprecated": "1",
34 "Counter": "0,1,2,3,4,5,6,7",
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/sapphirerapids/
Dpipeline.json4 "Counter": "0,1,2,3,4,5,6,7",
5 "CounterMask": "1",
6 "Deprecated": "1",
14 "Counter": "0,1,2,3,4,5,6,7",
15 "CounterMask": "1",
18 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
24 "Counter": "0,1,2,3,4,5,6,7",
25 "CounterMask": "1",
26 "Deprecated": "1",
34 "Counter": "0,1,2,3,4,5,6,7",
[all …]
/linux-6.12.1/drivers/usb/gadget/udc/
Dfusb300_udc.h1 // SPDX-License-Identifier: GPL-2.0
7 * Author : Yuan-hsin Chen <yhchen@faraday-tech.com>
21 #define FUSB300_OFFSET_EPSET0(n) (0x20 + (n - 1) * 0x30)
22 #define FUSB300_OFFSET_EPSET1(n) (0x24 + (n - 1) * 0x30)
23 #define FUSB300_OFFSET_EPSET2(n) (0x28 + (n - 1) * 0x30)
24 #define FUSB300_OFFSET_EPFFR(n) (0x2c + (n - 1) * 0x30)
25 #define FUSB300_OFFSET_EPSTRID(n) (0x40 + (n - 1) * 0x30)
54 #define FUSB300_OFFSET_EPPRD_W0(n) (0x520 + (n - 1) * 0x10)
55 #define FUSB300_OFFSET_EPPRD_W1(n) (0x524 + (n - 1) * 0x10)
56 #define FUSB300_OFFSET_EPPRD_W2(n) (0x528 + (n - 1) * 0x10)
[all …]

12345678910>>...51