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/linux-6.12.1/arch/arm/boot/dts/aspeed/
Dopenbmc-flash-layout-128.dtsi8 u-boot@0 {
9 reg = <0x0 0xe0000>; // 896KB
14 reg = <0xe0000 0x20000>; // 128KB
19 reg = <0x100000 0x900000>; // 9MB
24 reg = <0xa00000 0x5600000>; // 86MB
29 reg = <0x6000000 0x2000000>; // 32MB
/linux-6.12.1/Documentation/devicetree/bindings/media/
Dst,st-hva.txt18 reg = <0x8c85000 0x400>, <0x6000000 0x40000>;
/linux-6.12.1/arch/arm/boot/dts/microchip/
Dat91-lmu5000.dts20 reg = <0x20000000 0x4000000>;
28 main_clock: clock@0 {
43 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
48 reg = <0x3 0x0 0x800000>;
62 kernel@0 {
64 reg = <0x0 0x400000>;
69 reg = <0x400000 0x3C00000>;
74 reg = <0x4000000 0x2000000>;
79 reg = <0x6000000 0x2000000>;
107 pinctrl-0 = <&pinctrl_ssc0_tx>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/usb/
Dcdns,usb3.yaml100 reg = <0x00 0x6000000 0x00 0x10000>,
101 <0x00 0x6010000 0x00 0x10000>,
102 <0x00 0x6020000 0x00 0x10000>;
Dti,j721e-usb.yaml44 If present, it restricts the controller to USB2.0 mode of
87 reg = <0x00 0x4104000 0x00 0x100>;
98 reg = <0x00 0x6000000 0x00 0x10000>,
99 <0x00 0x6010000 0x00 0x10000>,
100 <0x00 0x6020000 0x00 0x10000>;
102 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
104 <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; /* otgirq.0 */
/linux-6.12.1/arch/arm/boot/dts/marvell/
Darmada-385-linksys-rango.dts20 wan_amber@0 {
22 reg = <0x0>;
27 reg = <0x1>;
32 reg = <0x5>;
37 reg = <0x6>;
42 reg = <0x7>;
47 reg = <0x8>;
52 reg = <0x9>;
89 partition@0 {
91 reg = <0x0000000 0x200000>; /* 2MiB */
[all …]
/linux-6.12.1/drivers/gpu/drm/etnaviv/
Detnaviv_hwdb.c10 .model = 0x400,
11 .revision = 0x4652,
12 .product_id = 0x70001,
13 .customer_id = 0x100,
14 .eco_id = 0,
19 .nn_core_count = 0,
25 .buffer_size = 0,
27 .features = 0xa0e9e004,
28 .minor_features0 = 0xe1299fff,
29 .minor_features1 = 0xbe13b219,
[all …]
/linux-6.12.1/arch/arm/boot/dts/st/
Dstih410.dtsi17 #phy-cells = <0>;
18 st,syscfg = <&syscfg_core 0xf8 0xf4>;
28 #phy-cells = <0>;
29 st,syscfg = <&syscfg_core 0xfc 0xf4>;
40 reg = <0x9a03c00 0x100>;
55 reg = <0x9a03e00 0x100>;
58 pinctrl-0 = <&pinctrl_usb0>;
72 reg = <0x9a83c00 0x100>;
87 reg = <0x9a83e00 0x100>;
90 pinctrl-0 = <&pinctrl_usb1>;
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h27 #define CB_BLEND_RED__BLEND_RED_MASK 0xffffffff
28 #define CB_BLEND_RED__BLEND_RED__SHIFT 0x0
29 #define CB_BLEND_GREEN__BLEND_GREEN_MASK 0xffffffff
30 #define CB_BLEND_GREEN__BLEND_GREEN__SHIFT 0x0
31 #define CB_BLEND_BLUE__BLEND_BLUE_MASK 0xffffffff
32 #define CB_BLEND_BLUE__BLEND_BLUE__SHIFT 0x0
33 #define CB_BLEND_ALPHA__BLEND_ALPHA_MASK 0xffffffff
34 #define CB_BLEND_ALPHA__BLEND_ALPHA__SHIFT 0x0
35 #define CB_COLOR_CONTROL__DEGAMMA_ENABLE_MASK 0x8
36 #define CB_COLOR_CONTROL__DEGAMMA_ENABLE__SHIFT 0x3
[all …]
Dgfx_8_0_sh_mask.h27 #define CB_BLEND_RED__BLEND_RED_MASK 0xffffffff
28 #define CB_BLEND_RED__BLEND_RED__SHIFT 0x0
29 #define CB_BLEND_GREEN__BLEND_GREEN_MASK 0xffffffff
30 #define CB_BLEND_GREEN__BLEND_GREEN__SHIFT 0x0
31 #define CB_BLEND_BLUE__BLEND_BLUE_MASK 0xffffffff
32 #define CB_BLEND_BLUE__BLEND_BLUE__SHIFT 0x0
33 #define CB_BLEND_ALPHA__BLEND_ALPHA_MASK 0xffffffff
34 #define CB_BLEND_ALPHA__BLEND_ALPHA__SHIFT 0x0
35 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE_MASK 0x1
36 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE__SHIFT 0x0
[all …]
Dgfx_8_1_sh_mask.h27 #define CB_BLEND_RED__BLEND_RED_MASK 0xffffffff
28 #define CB_BLEND_RED__BLEND_RED__SHIFT 0x0
29 #define CB_BLEND_GREEN__BLEND_GREEN_MASK 0xffffffff
30 #define CB_BLEND_GREEN__BLEND_GREEN__SHIFT 0x0
31 #define CB_BLEND_BLUE__BLEND_BLUE_MASK 0xffffffff
32 #define CB_BLEND_BLUE__BLEND_BLUE__SHIFT 0x0
33 #define CB_BLEND_ALPHA__BLEND_ALPHA_MASK 0xffffffff
34 #define CB_BLEND_ALPHA__BLEND_ALPHA__SHIFT 0x0
35 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE_MASK 0x1
36 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE__SHIFT 0x0
[all …]
/linux-6.12.1/arch/arm/boot/dts/ti/omap/
Domap3-ldp.dts17 reg = <0x80000000 0x8000000>; /* 128 MB */
21 cpu@0 {
29 pinctrl-0 = <&gpio_key_pins>;
97 ranges = <0 0 0x30000000 0x1000000>, /* CS0 space, 16MB */
98 <1 0 0x08000000 0x1000000>; /* CS1 space, 16MB */
100 nand@0,0 {
102 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
104 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
111 gpmc,sync-clk-ps = <0>;
112 gpmc,cs-on-ns = <0>;
[all …]
/linux-6.12.1/sound/soc/fsl/
Dfsl_rpmsg.c25 /* 192kHz/32bit/2ch/60s size is 0x574e00 */
26 #define LPA_LARGE_BUFFER_SIZE (0x6000000)
46 int ret = 0; in fsl_rpmsg_hw_params()
65 if (ret < 0) in fsl_rpmsg_hw_params()
94 return 0; in fsl_rpmsg_hw_free()
102 ret = snd_pcm_hw_constraint_list(substream->runtime, 0, in fsl_rpmsg_startup()
272 return 0; in fsl_rpmsg_probe()
306 return 0; in fsl_rpmsg_runtime_resume()
321 return 0; in fsl_rpmsg_runtime_suspend()
/linux-6.12.1/arch/arm/boot/dts/nxp/imx/
Dmba6ulx.dtsi36 pinctrl-0 = <&pinctrl_buttons>;
41 gpios = <&expander_in0 0 GPIO_ACTIVE_LOW>;
122 gpio = <&expander_out1 0 GPIO_ACTIVE_HIGH>;
138 size = <0x6000000>;
154 pinctrl-0 = <&pinctrl_flexcan1>;
161 pinctrl-0 = <&pinctrl_flexcan2>;
173 pinctrl-0 = <&pinctrl_ecspi2>;
180 pinctrl-0 = <&pinctrl_enet1>;
192 pinctrl-0 = <&pinctrl_enet2>, <&pinctrl_enet2_mdc>;
203 #size-cells = <0>;
[all …]
/linux-6.12.1/arch/powerpc/platforms/pasemi/
Dsetup.c53 static int nmi_virq = 0;
63 out_le32(reset_reg, 0x6000000); in pas_restart()
70 void __iomem *pld_map = ioremap(0xf5000000,4096); in pas_shutdown()
72 out_8(pld_map+7,0x01); in pas_shutdown()
78 .start = 0x70,
79 .end = 0x71,
128 set_tb(timebase >> 32, timebase & 0xffffffff); in pas_take_timebase()
129 timebase = 0; in pas_take_timebase()
152 reset_reg = ioremap(0xfc101100, 4); in pas_setup_arch()
162 reg = 0; in pas_setup_mce_regs()
[all …]
/linux-6.12.1/arch/sparc/include/asm/
Dpgtable_64.h26 /* The kernel image occupies 0x4000000 to 0x6000000 (4MB --> 96MB).
27 * The page copy blockops can use 0x6000000 to 0x8000000.
28 * The 8K TSB is mapped in the 0x8000000 to 0x8400000 range.
29 * The 4M TSB is mapped in the 0x8400000 to 0x8800000 range.
30 * The PROM resides in an area spanning 0xf0000000 to 0x100000000.
31 * The vmalloc area spans 0x100000000 to 0x200000000.
33 * we place them right before the OBP area from 0x10000000 to 0xf0000000.
34 * There is a single static kernel PMD which maps from 0x0 to address
35 * 0x400000000.
37 #define TLBTEMP_BASE _AC(0x0000000006000000,UL)
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/bif/
Dbif_5_1_sh_mask.h27 #define MM_INDEX__MM_OFFSET_MASK 0x7fffffff
28 #define MM_INDEX__MM_OFFSET__SHIFT 0x0
29 #define MM_INDEX__MM_APER_MASK 0x80000000
30 #define MM_INDEX__MM_APER__SHIFT 0x1f
31 #define MM_INDEX_HI__MM_OFFSET_HI_MASK 0xffffffff
32 #define MM_INDEX_HI__MM_OFFSET_HI__SHIFT 0x0
33 #define MM_DATA__MM_DATA_MASK 0xffffffff
34 #define MM_DATA__MM_DATA__SHIFT 0x0
35 #define BIF_MM_INDACCESS_CNTL__MM_INDACCESS_DIS_MASK 0x2
36 #define BIF_MM_INDACCESS_CNTL__MM_INDACCESS_DIS__SHIFT 0x1
[all …]
Dbif_5_1_d.h27 #define mmMM_INDEX 0x0
28 #define mmMM_INDEX_HI 0x6
29 #define mmMM_DATA 0x1
30 #define mmBIF_MM_INDACCESS_CNTL 0x1500
31 #define mmBUS_CNTL 0x1508
32 #define mmCONFIG_CNTL 0x1509
33 #define mmCONFIG_MEMSIZE 0x150a
34 #define mmCONFIG_F0_BASE 0x150b
35 #define mmCONFIG_APER_SIZE 0x150c
36 #define mmCONFIG_REG_APER_SIZE 0x150d
[all …]
/linux-6.12.1/drivers/phy/freescale/
Dphy-fsl-lynx-28g.c15 #define LYNX_28G_PCC8 0x10a0
16 #define LYNX_28G_PCC8_SGMII 0x1
17 #define LYNX_28G_PCC8_SGMII_DIS 0x0
19 #define LYNX_28G_PCCC 0x10b0
20 #define LYNX_28G_PCCC_10GBASER 0x9
21 #define LYNX_28G_PCCC_USXGMII 0x1
22 #define LYNX_28G_PCCC_SXGMII_DIS 0x0
27 #define LYNX_28G_PLLnRSTCTL(pll) (0x400 + (pll) * 0x100 + 0x0)
31 #define LYNX_28G_PLLnCR0(pll) (0x400 + (pll) * 0x100 + 0x4)
33 #define LYNX_28G_PLLnCR0_REFCLK_SEL_100MHZ 0x0
[all …]
/linux-6.12.1/arch/arm/boot/dts/qcom/
Dqcom-ipq4019.dtsi21 #address-cells = <0x1>;
22 #size-cells = <0x1>;
26 reg = <0x87e00000 0x080000>;
31 reg = <0x87e80000 0x180000>;
45 #size-cells = <0>;
46 cpu@0 {
53 reg = <0x0>;
55 clock-frequency = <0>;
67 reg = <0x1>;
69 clock-frequency = <0>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/allwinner/
Dsun5i.dtsi56 #size-cells = <0>;
58 cpu0: cpu@0 {
61 reg = <0x0>;
97 #clock-cells = <0>;
104 #clock-cells = <0>;
119 size = <0x6000000>;
120 alloc-ranges = <0x40000000 0x10000000>;
135 reg = <0x01c00000 0x30>;
140 sram_a: sram@0 {
142 reg = <0x00000000 0xc000>;
[all …]
Dsun4i-a10.dtsi111 #size-cells = <0>;
112 cpu0: cpu@0 {
115 reg = <0x0>;
166 #clock-cells = <0>;
173 #clock-cells = <0>;
199 size = <0x6000000>;
200 alloc-ranges = <0x40000000 0x10000000>;
214 reg = <0x01c00000 0x30>;
219 sram_a: sram@0 {
221 reg = <0x00000000 0xc000>;
[all …]
Dsun7i-a20.dtsi101 #size-cells = <0>;
103 cpu0: cpu@0 {
106 reg = <0>;
181 size = <0x6000000>;
182 alloc-ranges = <0x40000000 0x10000000>;
208 #clock-cells = <0>;
215 #clock-cells = <0>;
231 #clock-cells = <0>;
238 #clock-cells = <0>;
245 #clock-cells = <0>;
[all …]
/linux-6.12.1/drivers/net/ethernet/qlogic/netxen/
Dnetxen_nic.h37 #define _NETXEN_NIC_LINUX_MINOR 0
42 #define _major(v) (((v) >> 24) & 0xff)
43 #define _minor(v) (((v) >> 16) & 0xff)
44 #define _build(v) ((v) & 0xffff)
47 * 7:0 - major
52 NETXEN_VERSION_CODE(((v) & 0xff), (((v) >> 8) & 0xff), ((v) >> 16))
72 #define NETXEN_RCV_PRODUCER_OFFSET 0
75 #define FLASH_SUCCESS 0
78 ((off > NETXEN_CRB_PCIX_HOST2) && (off < NETXEN_CRB_MAX)) ? 1 : 0
96 #define NX_P2_C0 0x24
[all …]
/linux-6.12.1/arch/arm64/boot/dts/ti/
Dk3-j7200-main.dtsi10 #clock-cells = <0>;
18 reg = <0x00 0x70000000 0x00 0x100000>;
21 ranges = <0x00 0x00 0x70000000 0x100000>;
23 atf-sram@0 {
24 reg = <0x00 0x20000>;
30 reg = <0x00 0x00100000 0x00 0x1c000>;
33 ranges = <0x00 0x00 0x00100000 0x1c000>;
37 reg = <0x4080 0x20>;
39 mux-reg-masks = <0x0 0x3>, <0x4 0x3>, /* SERDES0 lane0/1 select */
40 <0x8 0x3>, <0xc 0x3>; /* SERDES0 lane2/3 select */
[all …]

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