Lines Matching +full:0 +full:x6000000
37 #define _NETXEN_NIC_LINUX_MINOR 0
42 #define _major(v) (((v) >> 24) & 0xff)
43 #define _minor(v) (((v) >> 16) & 0xff)
44 #define _build(v) ((v) & 0xffff)
47 * 7:0 - major
52 NETXEN_VERSION_CODE(((v) & 0xff), (((v) >> 8) & 0xff), ((v) >> 16))
72 #define NETXEN_RCV_PRODUCER_OFFSET 0
75 #define FLASH_SUCCESS 0
78 ((off > NETXEN_CRB_PCIX_HOST2) && (off < NETXEN_CRB_MAX)) ? 1 : 0
96 #define NX_P2_C0 0x24
97 #define NX_P2_C1 0x25
98 #define NX_P3_A0 0x30
99 #define NX_P3_A2 0x30
100 #define NX_P3_B0 0x40
101 #define NX_P3_B1 0x41
102 #define NX_P3_B2 0x42
103 #define NX_P3P_A0 0x50
109 #define FIRST_PAGE_GROUP_START 0
110 #define FIRST_PAGE_GROUP_END 0x100000
112 #define SECOND_PAGE_GROUP_START 0x6000000
113 #define SECOND_PAGE_GROUP_END 0x68BC000
115 #define THIRD_PAGE_GROUP_START 0x70E4000
116 #define THIRD_PAGE_GROUP_END 0x8000000
142 #define TX_ETHER_PKT 0x01
143 #define TX_TCP_PKT 0x02
144 #define TX_UDP_PKT 0x03
145 #define TX_IP_PKT 0x04
146 #define TX_TCP_LSO 0x05
147 #define TX_TCP_LSO6 0x06
148 #define TX_IPSEC 0x07
149 #define TX_IPSEC_CMD 0x0a
150 #define TX_TCPV6_PKT 0x0b
151 #define TX_UDPV6_PKT 0x0c
154 #define NETXEN_CONTROL_OP 0x10
155 #define PEGNET_REQUEST 0x11
170 #define PHAN_INITIALIZE_START 0xff00
171 #define PHAN_INITIALIZE_FAILED 0xffff
172 #define PHAN_INITIALIZE_COMPLETE 0xff01
175 #define PHAN_INITIALIZE_ACK 0xf00f
180 #define RCV_RING_NORMAL 0
198 #define NETXEN_CTX_SIGNATURE 0xdee0
199 #define NETXEN_CTX_SIGNATURE_V2 0x0002dee0
200 #define NETXEN_CTX_RESET 0xbad0
201 #define NETXEN_CTX_D3_RESET 0xacc0
204 #define PHAN_PEG_RCV_INITIALIZED 0xff01
205 #define PHAN_PEG_RCV_START_INITIALIZE 0xff00
213 #define MPORT_SINGLE_FUNCTION_MODE 0x1111
214 #define MPORT_MULTI_FUNCTION_MODE 0x2222
221 * Bit 0-1 : peg_id => 0x2 for tx and 01 for rx
235 ((config_word) &= ~(0x7fff<<3), (config_word) |= (val & 0x7fff) << 3)
237 ((config_word) &= ~(0x3ff<<18), (config_word) |= (val & 0x3ff) << 18)
239 ((config_word) &= ~(0xf<<28), (config_word) |= (val & 0xf) << 28)
288 #define FLAGS_CHECKSUM_ENABLED 0x01
289 #define FLAGS_LSO_ENABLED 0x02
290 #define FLAGS_IPSEC_SA_ADD 0x04
291 #define FLAGS_IPSEC_SA_DELETE 0x08
292 #define FLAGS_VLAN_TAGGED 0x10
293 #define FLAGS_VLAN_OOB 0x40
299 ((cmd_desc)->port_ctxid |= ((var) & 0x0F))
301 ((cmd_desc)->port_ctxid |= ((var) << 4 & 0xF0))
304 (_desc)->port_ctxid = ((_port) & 0xf) | (((_port) << 4) & 0xf0)
308 cpu_to_le16(((_flags) & 0x7f) | (((_opcode) & 0x3f) << 7))
312 cpu_to_le32(((_frags) & 0xff) | (((_len) & 0xffffff) << 8))
317 __le16 flags_opcode; /* 15:13 unused, 12:7 opcode, 6:0 flags */
318 __le32 nfrags__length; /* 31:8 total len, 7:0 frag count */
324 u8 port_ctxid; /* 7:4 ctxid 3:0 port */
350 #define NETXEN_NIC_SYN_OFFLOAD 0x03
351 #define NETXEN_NIC_RXPKT_DESC 0x04
352 #define NETXEN_OLD_RXPKT_DESC 0x3f
353 #define NETXEN_NIC_RESPONSE_DESC 0x05
354 #define NETXEN_NIC_LRO_DESC 0x12
361 #define STATUS_OWNER_HOST (0x1ULL << 56)
362 #define STATUS_OWNER_PHANTOM (0x2ULL << 56)
365 0-3 port, 4-7 status, 8-11 type, 12-27 total_length
370 ((sts_data) & 0x0F)
372 (((sts_data) >> 4) & 0x0F)
374 (((sts_data) >> 8) & 0x0F)
376 (((sts_data) >> 12) & 0xFFFF)
378 (((sts_data) >> 28) & 0xFFFF)
380 (((sts_data) >> 44) & 0x0F)
382 (((sts_data) >> 48) & 0x1F)
384 (((sts_data) >> 53) & 0x7)
386 (((sts_data) >> 58) & 0x03F)
389 ((sts_data) & 0x0FFFF)
391 (((sts_data) >> 16) & 0x0FFFF)
393 (((sts_data) >> 32) & 0x0FF)
395 (((sts_data) >> 40) & 0x0FF)
397 (((sts_data) >> 48) & 0x1)
399 (((sts_data) >> 49) & 0x7)
401 (((sts_data) >> 52) & 0x1)
403 ((sts_data) & 0x0FFFFFFFF)
405 ((sts_data1 >> 32) & 0x0FFFF)
413 #define NX_UNI_DIR_SECT_PRODUCT_TBL 0x0
414 #define NX_UNI_DIR_SECT_BOOTLD 0x6
415 #define NX_UNI_DIR_SECT_FW 0x7
443 #define NETXEN_BDINFO_MAGIC 0x12345678
448 #define NETXEN_BRDTYPE_P1_BD 0x0000
449 #define NETXEN_BRDTYPE_P1_SB 0x0001
450 #define NETXEN_BRDTYPE_P1_SMAX 0x0002
451 #define NETXEN_BRDTYPE_P1_SOCK 0x0003
453 #define NETXEN_BRDTYPE_P2_SOCK_31 0x0008
454 #define NETXEN_BRDTYPE_P2_SOCK_35 0x0009
455 #define NETXEN_BRDTYPE_P2_SB35_4G 0x000a
456 #define NETXEN_BRDTYPE_P2_SB31_10G 0x000b
457 #define NETXEN_BRDTYPE_P2_SB31_2G 0x000c
459 #define NETXEN_BRDTYPE_P2_SB31_10G_IMEZ 0x000d
460 #define NETXEN_BRDTYPE_P2_SB31_10G_HMEZ 0x000e
461 #define NETXEN_BRDTYPE_P2_SB31_10G_CX4 0x000f
463 #define NETXEN_BRDTYPE_P3_REF_QG 0x0021
464 #define NETXEN_BRDTYPE_P3_HMEZ 0x0022
465 #define NETXEN_BRDTYPE_P3_10G_CX4_LP 0x0023
466 #define NETXEN_BRDTYPE_P3_4_GB 0x0024
467 #define NETXEN_BRDTYPE_P3_IMEZ 0x0025
468 #define NETXEN_BRDTYPE_P3_10G_SFP_PLUS 0x0026
469 #define NETXEN_BRDTYPE_P3_10000_BASE_T 0x0027
470 #define NETXEN_BRDTYPE_P3_XG_LOM 0x0028
471 #define NETXEN_BRDTYPE_P3_4_GB_MM 0x0029
472 #define NETXEN_BRDTYPE_P3_10G_SFP_CT 0x002a
473 #define NETXEN_BRDTYPE_P3_10G_SFP_QT 0x002b
474 #define NETXEN_BRDTYPE_P3_10G_CX4 0x0031
475 #define NETXEN_BRDTYPE_P3_10G_XFP 0x0032
476 #define NETXEN_BRDTYPE_P3_10G_TP 0x0080
479 #define NETXEN_CRBINIT_START 0 /* crbinit section */
480 #define NETXEN_BRDCFG_START 0x4000 /* board config */
481 #define NETXEN_INITCODE_START 0x6000 /* pegtune code */
482 #define NETXEN_BOOTLD_START 0x10000 /* bootld */
483 #define NETXEN_IMAGE_START 0x43000 /* compressed image */
484 #define NETXEN_SECONDARY_START 0x200000 /* backup images */
485 #define NETXEN_PXE_START 0x3E0000 /* PXE boot rom */
486 #define NETXEN_USER_START 0x3E8000 /* Firmware info */
487 #define NETXEN_FIXED_START 0x3F0000 /* backup of crbinit */
491 #define NX_FW_VERSION_OFFSET (NETXEN_USER_START+0x408)
492 #define NX_FW_SIZE_OFFSET (NETXEN_USER_START+0x40c)
493 #define NX_FW_MAC_ADDR_OFFSET (NETXEN_USER_START+0x418)
494 #define NX_FW_SERIAL_NUM_OFFSET (NETXEN_USER_START+0x81c)
495 #define NX_BIOS_VERSION_OFFSET (NETXEN_USER_START+0x83c)
498 #define NX_BRDTYPE_OFFSET (NETXEN_BRDCFG_START+0x8)
499 #define NX_FW_MAGIC_OFFSET (NETXEN_BRDCFG_START+0x128)
501 #define NX_FW_MIN_SIZE (0x3fffff)
502 #define NX_P2_MN_ROMIMAGE 0
507 #define NX_UNKNOWN_ROMIMAGE 0xff
536 #define NETXEN_BUFFER_FREE 0
559 #define NETXEN_NIC_GBE 0x01
560 #define NETXEN_NIC_XGBE 0x02
689 (((pcifn) & 0xff) | (((version) & 0xff) << 8) | (0xcafe << 16))
691 #define NX_CDRP_CLEAR 0x00000000
692 #define NX_CDRP_CMD_BIT 0x80000000
699 #define NX_CDRP_IS_RSP(rsp) (((rsp) & NX_CDRP_CMD_BIT) == 0)
701 #define NX_CDRP_RSP_OK 0x00000001
702 #define NX_CDRP_RSP_FAIL 0x00000002
703 #define NX_CDRP_RSP_TIMEOUT 0x00000003
710 #define NX_CDRP_IS_CMD(cmd) (((cmd) & NX_CDRP_CMD_BIT) != 0)
712 #define NX_CDRP_CMD_SUBMIT_CAPABILITIES 0x00000001
713 #define NX_CDRP_CMD_READ_MAX_RDS_PER_CTX 0x00000002
714 #define NX_CDRP_CMD_READ_MAX_SDS_PER_CTX 0x00000003
715 #define NX_CDRP_CMD_READ_MAX_RULES_PER_CTX 0x00000004
716 #define NX_CDRP_CMD_READ_MAX_RX_CTX 0x00000005
717 #define NX_CDRP_CMD_READ_MAX_TX_CTX 0x00000006
718 #define NX_CDRP_CMD_CREATE_RX_CTX 0x00000007
719 #define NX_CDRP_CMD_DESTROY_RX_CTX 0x00000008
720 #define NX_CDRP_CMD_CREATE_TX_CTX 0x00000009
721 #define NX_CDRP_CMD_DESTROY_TX_CTX 0x0000000a
722 #define NX_CDRP_CMD_SETUP_STATISTICS 0x0000000e
723 #define NX_CDRP_CMD_GET_STATISTICS 0x0000000f
724 #define NX_CDRP_CMD_DELETE_STATISTICS 0x00000010
725 #define NX_CDRP_CMD_SET_MTU 0x00000012
726 #define NX_CDRP_CMD_READ_PHY 0x00000013
727 #define NX_CDRP_CMD_WRITE_PHY 0x00000014
728 #define NX_CDRP_CMD_READ_HW_REG 0x00000015
729 #define NX_CDRP_CMD_GET_FLOW_CTL 0x00000016
730 #define NX_CDRP_CMD_SET_FLOW_CTL 0x00000017
731 #define NX_CDRP_CMD_READ_MAX_MTU 0x00000018
732 #define NX_CDRP_CMD_READ_MAX_LRO 0x00000019
733 #define NX_CDRP_CMD_CONFIGURE_TOE 0x0000001a
734 #define NX_CDRP_CMD_FUNC_ATTRIB 0x0000001b
735 #define NX_CDRP_CMD_READ_PEXQ_PARAMETERS 0x0000001c
736 #define NX_CDRP_CMD_GET_LIC_CAPABILITIES 0x0000001d
737 #define NX_CDRP_CMD_READ_MAX_LRO_PER_BOARD 0x0000001e
738 #define NX_CDRP_CMD_CONFIG_GBE_PORT 0x0000001f
739 #define NX_CDRP_CMD_MAX 0x00000020
741 #define NX_RCODE_SUCCESS 0
763 #define NX_DESTROY_CTX_RESET 0
771 #define NX_CAP0_LEGACY_CONTEXT NX_CAP_BIT(0, 0)
772 #define NX_CAP0_MULTI_CONTEXT NX_CAP_BIT(0, 1)
773 #define NX_CAP0_LEGACY_MN NX_CAP_BIT(0, 2)
774 #define NX_CAP0_LEGACY_MS NX_CAP_BIT(0, 3)
775 #define NX_CAP0_CUT_THROUGH NX_CAP_BIT(0, 4)
776 #define NX_CAP0_LRO NX_CAP_BIT(0, 5)
777 #define NX_CAP0_LSO NX_CAP_BIT(0, 6)
778 #define NX_CAP0_JUMBO_CONTIGUOUS NX_CAP_BIT(0, 7)
779 #define NX_CAP0_LRO_CONTIGUOUS NX_CAP_BIT(0, 8)
780 #define NX_CAP0_HW_LRO NX_CAP_BIT(0, 10)
781 #define NX_CAP0_HW_LRO_MSS NX_CAP_BIT(0, 21)
786 #define NX_HOST_CTX_STATE_FREED 0
816 /* These ring offsets are relative to data[0] below */
828 char data[0];
842 /* These ring offsets are relative to data[0] below */
914 #define NX_HOST_RDS_CRB_MODE_UNIQUE 0
919 #define NX_HOST_INT_CRB_MODE_UNIQUE 0
931 #define NETXEN_MAC_NOOP 0
955 #define NETXEN_NIC_INTR_DEFAULT 0x04
980 #define NX_HOST_REQUEST 0x13
981 #define NX_NIC_REQUEST 0x14
983 #define NX_MAC_EVENT 0x1
991 #define NX_NIC_H2C_OPCODE_START 0
1038 #define VPORT_MISS_MODE_DROP 0 /* drop all unmatched */
1042 #define NX_NIC_LRO_REQUEST_FIRST 0
1080 #define LINKSPEED_ENCODED_10MBPS 0
1084 #define LINKEVENT_AUTONEG_DISABLED 0
1087 #define LINKEVENT_HALF_DUPLEX 0
1090 #define LINKEVENT_LINKSPEED_MBPS 0
1093 #define AUTO_FW_RESET_ENABLED 0xEF10AF12
1094 #define AUTO_FW_RESET_DISABLED 0xDCBAAF12
1107 ((msg_hdr >> 58) & 0x3F)
1109 ((msg_hdr >> 40) & 0xFF)
1111 ((msg_hdr >> 32) & 0xFF)
1113 ((msg_hdr >> 16) & 0xFFFF)
1139 #define NETXEN_NIC_MSI_ENABLED 0x02
1140 #define NETXEN_NIC_MSIX_ENABLED 0x04
1141 #define NETXEN_NIC_LRO_ENABLED 0x08
1142 #define NETXEN_NIC_LRO_DISABLED 0x00
1143 #define NETXEN_NIC_BRIDGE_ENABLED 0X10
1144 #define NETXEN_NIC_DIAG_ENABLED 0x20
1145 #define NETXEN_FW_RESET_OWNER 0x40
1146 #define NETXEN_FW_MSS_CAP 0x80
1152 #define NETXEN_PCI_REG_MSIX_TBL 0x44
1154 #define NETXEN_DB_MAPSIZE_BYTES 0x1000
1157 #define NETXEN_NIC_PEG_TUNE 0
1159 #define __NX_FW_ATTACHED 0
1165 #define NX_MD_SUPPORT_MINOR 0
1173 #define NX_DUMP_MASK_MIN 0x03
1174 #define NX_DUMP_MASK_DEF 0x1f
1175 #define NX_DUMP_MASK_MAX 0xff
1178 #define NX_CDRP_CMD_TEMP_SIZE 0x0000002f
1179 #define NX_CDRP_CMD_GET_TEMP_HDR 0x00000030
1186 #define NX_FORCE_FW_DUMP_KEY 0xdeadfeed
1187 #define NX_ENABLE_FW_DUMP 0xaddfeed
1188 #define NX_DISABLE_FW_DUMP 0xbadfeed
1189 #define NX_FORCE_FW_RESET 0xdeaddead
1193 #define NX_FW_DUMP_REG1 0x00130060
1194 #define NX_FW_DUMP_REG2 0x001e0000
1195 #define NX_FLASH_SEM2_LK 0x0013C010
1196 #define NX_FLASH_SEM2_ULK 0x0013C014
1197 #define NX_FLASH_LOCK_ID 0x001B2100
1198 #define FLASH_ROM_WINDOW 0x42110030
1199 #define FLASH_ROM_DATA 0x42150000
1203 writel((addr & 0xFFFF0000), (void __iomem *) (bar0 + \
1208 } while (0)
1211 writel((addr & 0xFFFF0000), (void __iomem *) (bar0 + \
1216 } while (0)
1223 #define RDNOP 0
1266 #define NX_DUMP_WCRB 0x01
1267 #define NX_DUMP_RWCRB 0x02
1268 #define NX_DUMP_ANDCRB 0x04
1269 #define NX_DUMP_ORCRB 0x08
1270 #define NX_DUMP_POLLCRB 0x10
1271 #define NX_DUMP_RD_SAVE 0x20
1272 #define NX_DUMP_WRT_SAVED 0x40
1273 #define NX_DUMP_MOD_SAVE_ST 0x80
1276 #define NX_DUMP_SKIP 0x80 /* driver skipped this entry */
1277 #define NX_DUMP_SIZE_ERR 0x40 /*entry size vs capture size mismatch*/
1708 netxen_pcie_sem_lock((a), 5, 0)
1712 netxen_pcie_sem_lock((a), 6, 0)
1838 int i, found = 0; in netxen_nic_get_brd_name_by_type()
1839 for (i = 0; i < NUM_SUPPORTED_BOARDS; ++i) { in netxen_nic_get_brd_name_by_type()
1852 return 0; in netxen_nic_get_brd_name_by_type()