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/linux-6.12.1/arch/arm/boot/dts/marvell/
Darmada-385-linksys-rango.dts20 wan_amber@0 {
22 reg = <0x0>;
27 reg = <0x1>;
32 reg = <0x5>;
37 reg = <0x6>;
42 reg = <0x7>;
47 reg = <0x8>;
52 reg = <0x9>;
89 partition@0 {
91 reg = <0x0000000 0x200000>; /* 2MiB */
[all …]
/linux-6.12.1/tools/testing/selftests/kvm/aarch64/
Dvgic_init.c21 #define GICR_TYPER 0x8
55 TEST_ASSERT(val == want, "%s; want '0x%x', got '0x%x'", msg, want, val); in v3_redist_reg_get()
61 GUEST_SYNC(0); in guest_code()
70 return __vcpu_run(vcpu) ? -errno : 0; in run_vcpu()
112 .size = 0x10000,
113 .alignment = 0x10000,
118 .size = NR_VCPUS * 0x20000,
119 .alignment = 0x10000,
124 .size = 0x1000,
125 .alignment = 0x1000,
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/media/
Dsamsung,exynos4212-fimc-is.yaml85 "^pmu@[0-9a-f]+$":
100 "^i2c-isp@[0-9a-f]+$":
122 pinctrl-0: true
154 reg = <0x12000000 0x260000>;
198 reg = <0x12140000 0x100>;
201 pinctrl-0 = <&fimc_is_i2c1>;
204 #size-cells = <0>;
208 reg = <0x10>;
Dsamsung,fimc.yaml34 The clock specifier cell stores an index of a clock: 0, 1 for
78 "^csis@[0-9a-f]+$":
83 "^fimc@[0-9a-f]+$":
88 "^fimc-is@[0-9a-f]+$":
93 "^fimc-lite@[0-9a-f]+$":
121 ranges = <0x0 0x0 0xba1000>;
133 pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>;
136 fimc@0 {
138 reg = <0x00000000 0x1000>;
157 reg = <0x00080000 0x4000>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/ti/omap/
Domap3-cm-t3x.dtsi10 reg = <0x80000000 0x10000000>; /* 256 MB */
16 pinctrl-0 = <&green_led_pins>;
46 #phy-cells = <0>;
53 #phy-cells = <0>;
79 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
80 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
86 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
87 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
88 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
89 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
[all …]
Domap3-tao3530.dtsi25 cpu@0 {
32 reg = <0x80000000 0x10000000>; /* 256 MB */
50 #phy-cells = <0>;
75 OMAP3_CORE1_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
76 OMAP3_CORE1_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
77 OMAP3_CORE1_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
78 OMAP3_CORE1_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
79 OMAP3_CORE1_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
80 OMAP3_CORE1_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
81 OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
[all …]
Domap3-devkit8000-common.dtsi12 reg = <0x80000000 0x10000000>; /* 256 MB */
74 #size-cells = <0>;
76 port@0 {
77 reg = <0>;
125 reg = <0x48>;
165 timer@0 {
174 timer@0 {
186 ti,pulldowns = <0x03a1c6>;
190 linux,keymap = <MATRIX_KEY(0, 0, KEY_1)
191 MATRIX_KEY(1, 0, KEY_2)
[all …]
Domap3-beagle.dts14 cpu@0 {
21 reg = <0x80000000 0x10000000>; /* 256 MB */
64 #phy-cells = <0>;
80 linux,code = <0x114>;
91 pinctrl-0 = <&tfp410_pins>;
95 #size-cells = <0>;
97 port@0 {
98 reg = <0>;
143 reg = <0x5401b000 0x1000>;
158 reg = <0x54010000 0x1000>;
[all …]
Domap3-lilly-a83x.dtsi13 bootargs = "console=ttyO0,115200n8 vt.global_cursor_default=0 consoleblank=0";
18 reg = <0x80000000 0x8000000>; /* 128 MB */
50 #phy-cells = <0>;
59 OMAP3_WKUP_IOPAD(0x2a5a, PIN_INPUT | MUX_MODE4) /* reserved.gpio_129 */
65 OMAP3_WKUP_IOPAD(0x2a16, PIN_INPUT_PULLUP | MUX_MODE4) /* sys_boot6.gpio_8 */
71 OMAP3_WKUP_IOPAD(0x2a56, PIN_INPUT | MUX_MODE4) /* reserved.gpio_126 */
81 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
82 OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
83 OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
84 OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
[all …]
Domap3-pandora-common.dtsi13 cpu@0 {
20 reg = <0x80000000 0x20000000>; /* 512 MB */
29 #clock-cells = <0>;
50 pinctrl-0 = <&led_pins>;
54 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* GPIO_128 */
85 pinctrl-0 = <&button_pins>;
104 gpios = <&gpio4 0 GPIO_ACTIVE_LOW>; /* GPIO_96 */
201 linux,code = <0x00>; /* SW_LID lid shut */
202 linux,input-type = <0x05>; /* EV_SW */
212 #phy-cells = <0>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/qcom/
Dqcom-msm8226-samsung-matisse-common.dtsi29 reg = <0x03200000 0x800000>;
82 pinctrl-0 = <&backlight_i2c_default_state>;
88 #size-cells = <0>;
92 reg = <0x2c>;
94 dev-ctrl = /bits/ 8 <0x80>;
95 init-brt = /bits/ 8 <0x3f>;
97 pwms = <&backlight_pwm 0 100000>;
101 rom-addr = /bits/ 8 <0xa0>;
102 rom-val = /bits/ 8 <0x44>;
106 rom-addr = /bits/ 8 <0xa1>;
[all …]
Dqcom-apq8026-samsung-milletwifi.dts37 reg = <0x03200000 0x800000>;
90 pinctrl-0 = <&backlight_i2c_default_state>;
96 #size-cells = <0>;
100 reg = <0x2c>;
103 dev-ctrl = /bits/ 8 <0x80>;
104 init-brt = /bits/ 8 <0x3f>;
112 rom-addr = /bits/ 8 <0xa3>;
113 rom-val = /bits/ 8 <0x5e>;
118 * (0, 120deg, 240deg, -, -, -),
122 rom-addr = /bits/ 8 <0xa5>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/marvell/
Darmada-ap80x.dtsi41 reg = <0x0 0x4000000 0x0 0x200000>;
46 reg = <0 0x4400000 0 0x1000000>;
62 ranges = <0x0 0x0 0xf0000000 0x1000000>;
66 reg = <0x100000 0x100000>;
90 reg = <0x210000 0x10000>,
91 <0x220000 0x20000>,
92 <0x240000 0x20000>,
93 <0x260000 0x20000>;
98 reg = <0x280000 0x1000>;
105 reg = <0x290000 0x1000>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsm8250-xiaomi-pipa.dts35 qcom,msm-id = <QCOM_ID_SM8250 0x20001>; /* SM8250 v2.1 */
36 qcom,board-id = <0x34 0>;
45 reg = <0x0 0x9c000000 0x0 0x2300000>;
92 pinctrl-0 = <&vol_up_n>;
124 reg = <0x0 0x80600000 0x0 0x260000>;
129 reg = <0x0 0x88c00000 0x0 0x2f00000>;
134 reg = <0x0 0x8bb00000 0x0 0x2500000>;
139 reg = <0x0 0x8e000000 0x0 0x100000>;
144 reg = <0x0 0x8e100000 0x0 0x4600000>;
149 reg = <0x0 0x9c000000 0x0 0x2300000>;
[all …]
Dsm8250-xiaomi-elish-common.dtsi30 qcom,msm-id = <QCOM_ID_SM8250 0x20001>; /* SM8250 v2.1 */
31 qcom,board-id = <0x10008 0>;
40 reg = <0x0 0x9c000000 0x0 0x2300000>;
88 pinctrl-0 = <&vol_up_n>;
119 reg = <0x0 0x80600000 0x0 0x260000>;
124 reg = <0x0 0x88c00000 0x0 0x2f00000>;
129 reg = <0x0 0x8bb00000 0x0 0x2500000>;
134 reg = <0x0 0x8e000000 0x0 0x100000>;
139 reg = <0x0 0x8e100000 0x0 0x4600000>;
144 reg = <0x0 0x9c000000 0x0 0x2300000>;
[all …]
Dsm8550.dtsi38 #clock-cells = <0>;
43 #clock-cells = <0>;
47 #clock-cells = <0>;
55 #clock-cells = <0>;
65 #size-cells = <0>;
67 CPU0: cpu@0 {
70 reg = <0 0>;
71 clocks = <&cpufreq_hw 0>;
76 qcom,freq-domain = <&cpufreq_hw 0>;
96 reg = <0 0x100>;
[all …]
Dsm8650.dtsi40 #clock-cells = <0>;
45 #clock-cells = <0>;
50 #clock-cells = <0>;
59 #clock-cells = <0>;
69 #size-cells = <0>;
71 CPU0: cpu@0 {
74 reg = <0 0>;
76 clocks = <&cpufreq_hw 0>;
86 qcom,freq-domain = <&cpufreq_hw 0>;
107 reg = <0 0x100>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/samsung/
Dexynos4x12.dtsi70 #interconnect-cells = <0>;
80 #interconnect-cells = <0>;
120 #interconnect-cells = <0>;
211 reg = <0x11400000 0x1000>;
217 reg = <0x11000000 0x1000>;
229 reg = <0x03860000 0x1000>;
231 interrupts = <10 0>;
236 reg = <0x106e0000 0x1000>;
242 reg = <0x02020000 0x40000>;
245 ranges = <0 0x02020000 0x40000>;
[all …]
/linux-6.12.1/arch/powerpc/boot/dts/fsl/
Dt2081si-post.dtsi37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0 0x10000 0>;
54 interrupts = <25 2 0 0>;
57 /* controller at 0x240000 */
59 compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie";
63 bus-range = <0x0 0xff>;
64 interrupts = <20 2 0 0>;
66 pcie@0 {
67 reg = <0 0 0 0 0>;
[all …]
Dt4240si-post.dtsi37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0 0x10000 0>;
54 interrupts = <25 2 0 0>;
57 /* controller at 0x240000 */
59 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
63 bus-range = <0x0 0xff>;
64 interrupts = <20 2 0 0>;
65 pcie@0 {
70 reg = <0 0 0 0 0>;
[all …]
/linux-6.12.1/drivers/net/ethernet/broadcom/bnxt/
Dbnxt.h43 #define TX_BD_TYPE (0x3f << 0)
44 #define TX_BD_TYPE_SHORT_TX_BD (0x00 << 0)
45 #define TX_BD_TYPE_LONG_TX_BD (0x10 << 0)
48 #define TX_BD_FLAGS_BD_CNT (0x1f << 8)
52 #define TX_BD_FLAGS_LHINT_512_AND_SMALLER (0 << 13)
57 #define TX_BD_LEN (0xffff << 16)
64 #define TX_OPAQUE_IDX_MASK 0x0000ffff
65 #define TX_OPAQUE_BDS_MASK 0x00ff0000
67 #define TX_OPAQUE_RING_MASK 0xff000000
84 #define TX_BD_FLAGS_TCP_UDP_CHKSUM (1 << 0)
[all …]
/linux-6.12.1/sound/soc/codecs/
Dcs47l85.c41 { .type = WMFW_ADSP2_PM, .base = 0x080000 },
42 { .type = WMFW_ADSP2_ZM, .base = 0x0e0000 },
43 { .type = WMFW_ADSP2_XM, .base = 0x0a0000 },
44 { .type = WMFW_ADSP2_YM, .base = 0x0c0000 },
48 { .type = WMFW_ADSP2_PM, .base = 0x100000 },
49 { .type = WMFW_ADSP2_ZM, .base = 0x160000 },
50 { .type = WMFW_ADSP2_XM, .base = 0x120000 },
51 { .type = WMFW_ADSP2_YM, .base = 0x140000 },
55 { .type = WMFW_ADSP2_PM, .base = 0x180000 },
56 { .type = WMFW_ADSP2_ZM, .base = 0x1e0000 },
[all …]
Dcs47l90.c41 { .type = WMFW_ADSP2_PM, .base = 0x080000 },
42 { .type = WMFW_ADSP2_ZM, .base = 0x0e0000 },
43 { .type = WMFW_ADSP2_XM, .base = 0x0a0000 },
44 { .type = WMFW_ADSP2_YM, .base = 0x0c0000 },
48 { .type = WMFW_ADSP2_PM, .base = 0x100000 },
49 { .type = WMFW_ADSP2_ZM, .base = 0x160000 },
50 { .type = WMFW_ADSP2_XM, .base = 0x120000 },
51 { .type = WMFW_ADSP2_YM, .base = 0x140000 },
55 { .type = WMFW_ADSP2_PM, .base = 0x180000 },
56 { .type = WMFW_ADSP2_ZM, .base = 0x1e0000 },
[all …]
/linux-6.12.1/drivers/mfd/
Dcs47l90-tables.c18 { 0x8A, 0x5555 },
19 { 0x8A, 0xAAAA },
20 { 0x4CF, 0x0700 },
21 { 0x171, 0x0003 },
22 { 0x101, 0x0444 },
23 { 0x159, 0x0002 },
24 { 0x120, 0x0444 },
25 { 0x1D1, 0x0004 },
26 { 0x1E0, 0xC084 },
27 { 0x159, 0x0000 },
[all …]
Dcs47l85-tables.c18 { 0x80, 0x0003 },
19 { 0x213, 0x03E4 },
20 { 0x177, 0x0281 },
21 { 0x197, 0x0281 },
22 { 0x1B7, 0x0281 },
23 { 0x4B1, 0x010A },
24 { 0x4CF, 0x0933 },
25 { 0x36C, 0x011B },
26 { 0x4B8, 0x1120 },
27 { 0x4A0, 0x3280 },
[all …]