Lines Matching +full:0 +full:x260000

12 		reg = <0x80000000 0x10000000>;	/* 256 MB */
74 			#size-cells = <0>;
76 			port@0 {
77 				reg = <0>;
125 		reg = <0x48>;
165 	timer@0 {
174 	timer@0 {
186 	ti,pulldowns = <0x03a1c6>;
190 	linux,keymap = <MATRIX_KEY(0, 0, KEY_1)
191 			MATRIX_KEY(1, 0, KEY_2)
192 			MATRIX_KEY(2, 0, KEY_3)
193 			MATRIX_KEY(0, 1, KEY_4)
197 			MATRIX_KEY(0, 2, KEY_7)
201 			MATRIX_KEY(0, 3, KEY_F7)
219 	ranges = <0 0 0x30000000 0x1000000	/* CS0: 16MB for NAND */
220 		  6 0 0x2c000000 0x1000000>;	/* CS6: 16MB for DM9000 */
222 	nand@0,0 {
224 		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
226 		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
232 		gpmc,sync-clk-ps = <0>;
233 		gpmc,cs-on-ns = <0>;
245 		gpmc,wr-data-mux-bus-ns = <0>;
250 		x-loader@0 {
252 			reg = <0 0x80000>;
257 			reg = <0x80000 0x1e0000>;
262 			reg = <0x260000 0x20000>;
267 			reg = <0x280000 0x400000>;
272 			reg = <0x680000 0xf980000>;
276 	ethernet@6,0 {
278 		reg =  <6 0x000 2>,
279 		       <6 0x400 2>; /* CS6, offset 0 and 0x400, IO size 2 */
285 		gpmc,mux-add-data = <0>;
287 		gpmc,wait-pin = <0>;
294 		gpmc,adv-on-ns = <0>;
307 		gpmc,wait-monitoring-ns = <0>;
308 		gpmc,clk-activation-ns = <0>;
309 		gpmc,wr-data-mux-bus-ns = <0>;
310 		gpmc,wr-access-ns = <0>;
317 			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)	/* dss_pclk.dss_pclk */
318 			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)	/* dss_hsync.dss_hsync */
319 			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)	/* dss_vsync.dss_vsync */
320 			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)	/* dss_acbias.dss_acbias */
321 			OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)	/* dss_data0.dss_data0 */
322 			OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)	/* dss_data1.dss_data1 */
323 			OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)	/* dss_data2.dss_data2 */
324 			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)	/* dss_data3.dss_data3 */
325 			OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)	/* dss_data4.dss_data4 */
326 			OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)	/* dss_data5.dss_data5 */
327 			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)	/* dss_data6.dss_data6 */
328 			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)	/* dss_data7.dss_data7 */
329 			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)	/* dss_data8.dss_data8 */
330 			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)	/* dss_data9.dss_data9 */
331 			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)	/* dss_data10.dss_data10 */
332 			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)	/* dss_data11.dss_data11 */
333 			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)	/* dss_data12.dss_data12 */
334 			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)	/* dss_data13.dss_data13 */
335 			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)	/* dss_data14.dss_data14 */
336 			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)	/* dss_data15.dss_data15 */
337 			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)	/* dss_data16.dss_data16 */
338 			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)	/* dss_data17.dss_data17 */
339 			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)	/* dss_data18.dss_data18 */
340 			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)	/* dss_data19.dss_data19 */
341 			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)	/* dss_data20.dss_data20 */
342 			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)	/* dss_data21.dss_data21 */
343 			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)	/* dss_data22.dss_data22 */
344 			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)	/* dss_data23.dss_data23 */
361 	pinctrl-0 = <&dss_dpi_pins>;
368 		#size-cells = <0>;
369 		dpi_dvi_out: endpoint@0 {
370 			reg = <0>;