Lines Matching +full:0 +full:x260000
21 #define GICR_TYPER 0x8
55 TEST_ASSERT(val == want, "%s; want '0x%x', got '0x%x'", msg, want, val); in v3_redist_reg_get()
61 GUEST_SYNC(0); in guest_code()
70 return __vcpu_run(vcpu) ? -errno : 0; in run_vcpu()
112 .size = 0x10000,
113 .alignment = 0x10000,
118 .size = NR_VCPUS * 0x20000,
119 .alignment = 0x10000,
124 .size = 0x1000,
125 .alignment = 0x1000,
130 .size = 0x2000,
131 .alignment = 0x1000,
138 * used hence the overlap. In the case of GICv3, A RDIST region is set at @0x0
139 * and a DIST region is set @0x70000. The GICv2 case sets a CPUIF @0x0 and a
140 * DIST region @0x1000.
164 addr = dist.alignment / 0x10; in subtest_dist_rdist()
169 addr = rdist.alignment / 0x10; in subtest_dist_rdist()
191 /* set REDIST base address @0x0*/ in subtest_dist_rdist()
192 addr = 0x00000; in subtest_dist_rdist()
197 addr = 0xE0000; in subtest_dist_rdist()
206 addr = REDIST_REGION_ATTR_ADDR(NR_VCPUS, 0x100000, 0, 0); in subtest_dist_rdist()
232 addr = REDIST_REGION_ATTR_ADDR(NR_VCPUS, 0x100000, 2, 0); in subtest_v3_redist_regions()
235 TEST_ASSERT(ret && errno == EINVAL, "redist region attr value with flags != 0"); in subtest_v3_redist_regions()
237 addr = REDIST_REGION_ATTR_ADDR(0, 0x100000, 0, 0); in subtest_v3_redist_regions()
240 TEST_ASSERT(ret && errno == EINVAL, "redist region attr value with count== 0"); in subtest_v3_redist_regions()
242 addr = REDIST_REGION_ATTR_ADDR(2, 0x200000, 0, 1); in subtest_v3_redist_regions()
246 "attempt to register the first rdist region with index != 0"); in subtest_v3_redist_regions()
248 addr = REDIST_REGION_ATTR_ADDR(2, 0x201000, 0, 1); in subtest_v3_redist_regions()
253 addr = REDIST_REGION_ATTR_ADDR(2, 0x200000, 0, 0); in subtest_v3_redist_regions()
257 addr = REDIST_REGION_ATTR_ADDR(2, 0x200000, 0, 1); in subtest_v3_redist_regions()
262 addr = REDIST_REGION_ATTR_ADDR(1, 0x210000, 0, 2); in subtest_v3_redist_regions()
268 addr = REDIST_REGION_ATTR_ADDR(1, 0x240000, 0, 2); in subtest_v3_redist_regions()
273 addr = REDIST_REGION_ATTR_ADDR(1, 0x240000, 0, 1); in subtest_v3_redist_regions()
277 addr = REDIST_REGION_ATTR_ADDR(1, max_phys_size, 0, 2); in subtest_v3_redist_regions()
284 addr = REDIST_REGION_ATTR_ADDR(2, max_phys_size - 0x30000, 0, 2); in subtest_v3_redist_regions()
290 addr = 0x260000; in subtest_v3_redist_regions()
298 * region 0 @ 0x200000 2 redists in subtest_v3_redist_regions()
299 * region 1 @ 0x240000 1 redist in subtest_v3_redist_regions()
303 addr = REDIST_REGION_ATTR_ADDR(0, 0, 0, 0); in subtest_v3_redist_regions()
304 expected_addr = REDIST_REGION_ATTR_ADDR(2, 0x200000, 0, 0); in subtest_v3_redist_regions()
307 TEST_ASSERT(!ret && addr == expected_addr, "read characteristics of region #0"); in subtest_v3_redist_regions()
309 addr = REDIST_REGION_ATTR_ADDR(0, 0, 0, 1); in subtest_v3_redist_regions()
310 expected_addr = REDIST_REGION_ATTR_ADDR(1, 0x240000, 0, 1); in subtest_v3_redist_regions()
315 addr = REDIST_REGION_ATTR_ADDR(0, 0, 0, 2); in subtest_v3_redist_regions()
320 addr = 0x260000; in subtest_v3_redist_regions()
324 addr = REDIST_REGION_ATTR_ADDR(1, 0x260000, 0, 2); in subtest_v3_redist_regions()
375 #define GIC_CPU_CTRL 0x00
380 u64 val = 0; in test_v2_uaccess_cpuif_no_vcpus()
387 KVM_VGIC_V2_ATTR(GIC_CPU_CTRL, 0)); in test_v2_uaccess_cpuif_no_vcpus()
392 KVM_VGIC_V2_ATTR(GIC_CPU_CTRL, 0), &val); in test_v2_uaccess_cpuif_no_vcpus()
397 KVM_VGIC_V2_ATTR(GIC_CPU_CTRL, 0), &val); in test_v2_uaccess_cpuif_no_vcpus()
427 addr = REDIST_REGION_ATTR_ADDR(1, 0x280000, 0, 2); in test_v3_new_redist_regions()
446 addr = REDIST_REGION_ATTR_ADDR(1, 0x280000, 0, 2); in test_v3_new_redist_regions()
466 (void)vm_vcpu_add(v.vm, 0, guest_code); in test_v3_typer_accesses()
485 for (i = 0; i < NR_VCPUS ; i++) { in test_v3_typer_accesses()
486 v3_redist_reg_get(v.gic_fd, i, GICR_TYPER, i * 0x100, in test_v3_typer_accesses()
490 addr = REDIST_REGION_ATTR_ADDR(2, 0x200000, 0, 0); in test_v3_typer_accesses()
494 /* The 2 first rdists should be put there (vcpu 0 and 3) */ in test_v3_typer_accesses()
495 v3_redist_reg_get(v.gic_fd, 0, GICR_TYPER, 0x0, "read typer of rdist #0"); in test_v3_typer_accesses()
496 v3_redist_reg_get(v.gic_fd, 3, GICR_TYPER, 0x310, "read typer of rdist #1"); in test_v3_typer_accesses()
498 addr = REDIST_REGION_ATTR_ADDR(10, 0x100000, 0, 1); in test_v3_typer_accesses()
503 v3_redist_reg_get(v.gic_fd, 1, GICR_TYPER, 0x100, in test_v3_typer_accesses()
505 v3_redist_reg_get(v.gic_fd, 2, GICR_TYPER, 0x200, in test_v3_typer_accesses()
508 addr = REDIST_REGION_ATTR_ADDR(10, 0x20000, 0, 1); in test_v3_typer_accesses()
512 v3_redist_reg_get(v.gic_fd, 1, GICR_TYPER, 0x100, "read typer of rdist #1"); in test_v3_typer_accesses()
513 v3_redist_reg_get(v.gic_fd, 2, GICR_TYPER, 0x210, in test_v3_typer_accesses()
526 for (i = 0; i < nr_vcpus; i++) in vm_gic_v3_create_with_vcpuids()
537 * rdist region #0 @0x100000 2 rdist capacity
538 * rdists: 0, 3 (Last)
539 * rdist region #1 @0x240000 2 rdist capacity
541 * rdist region #2 @0x200000 2 rdist capacity
546 uint32_t vcpuids[] = { 0, 3, 5, 4, 1, 2 }; in test_v3_last_bit_redist_regions()
555 addr = REDIST_REGION_ATTR_ADDR(2, 0x100000, 0, 0); in test_v3_last_bit_redist_regions()
559 addr = REDIST_REGION_ATTR_ADDR(2, 0x240000, 0, 1); in test_v3_last_bit_redist_regions()
563 addr = REDIST_REGION_ATTR_ADDR(2, 0x200000, 0, 2); in test_v3_last_bit_redist_regions()
567 v3_redist_reg_get(v.gic_fd, 0, GICR_TYPER, 0x000, "read typer of rdist #0"); in test_v3_last_bit_redist_regions()
568 v3_redist_reg_get(v.gic_fd, 1, GICR_TYPER, 0x100, "read typer of rdist #1"); in test_v3_last_bit_redist_regions()
569 v3_redist_reg_get(v.gic_fd, 2, GICR_TYPER, 0x200, "read typer of rdist #2"); in test_v3_last_bit_redist_regions()
570 v3_redist_reg_get(v.gic_fd, 3, GICR_TYPER, 0x310, "read typer of rdist #3"); in test_v3_last_bit_redist_regions()
571 v3_redist_reg_get(v.gic_fd, 5, GICR_TYPER, 0x500, "read typer of rdist #5"); in test_v3_last_bit_redist_regions()
572 v3_redist_reg_get(v.gic_fd, 4, GICR_TYPER, 0x410, "read typer of rdist #4"); in test_v3_last_bit_redist_regions()
580 uint32_t vcpuids[] = { 0, 3, 5, 4, 1, 2 }; in test_v3_last_bit_single_rdist()
589 addr = 0x10000; in test_v3_last_bit_single_rdist()
593 v3_redist_reg_get(v.gic_fd, 0, GICR_TYPER, 0x000, "read typer of rdist #0"); in test_v3_last_bit_single_rdist()
594 v3_redist_reg_get(v.gic_fd, 3, GICR_TYPER, 0x300, "read typer of rdist #1"); in test_v3_last_bit_single_rdist()
595 v3_redist_reg_get(v.gic_fd, 5, GICR_TYPER, 0x500, "read typer of rdist #2"); in test_v3_last_bit_single_rdist()
596 v3_redist_reg_get(v.gic_fd, 1, GICR_TYPER, 0x100, "read typer of rdist #3"); in test_v3_last_bit_single_rdist()
597 v3_redist_reg_get(v.gic_fd, 2, GICR_TYPER, 0x210, "read typer of rdist #3"); in test_v3_last_bit_single_rdist()
613 addr = max_phys_size - (3 * 2 * 0x10000); in test_v3_redist_ipa_range_check_at_vcpu_run()
617 addr = 0x00000; in test_v3_redist_ipa_range_check_at_vcpu_run()
646 addr = 0x401000; in test_v3_its_region()
658 addr = max_phys_size - 0x10000; in test_v3_its_region()
665 addr = 0x400000; in test_v3_its_region()
669 addr = 0x300000; in test_v3_its_region()
679 * Returns 0 if it's possible to create GIC device of a given type (V2 or V3).
691 ret = __kvm_test_create_device(v.vm, 0); in test_kvm_device()
701 TEST_ASSERT(ret < 0 && errno == EEXIST, "create GIC device twice"); in test_kvm_device()
709 TEST_ASSERT(ret < 0 && (errno == EINVAL || errno == EEXIST), in test_kvm_device()
715 return 0; in test_kvm_device()
740 int cnt_impl = 0; in main()
763 return 0; in main()