Home
last modified time | relevance | path

Searched +full:0 +full:x042 (Results 1 – 25 of 37) sorted by relevance

12

/linux-6.12.1/drivers/phy/samsung/
Dphy-exynos7-ufs.c10 #define EXYNOS7_EMBEDDED_COMBO_PHY_CTRL 0x720
11 #define EXYNOS7_EMBEDDED_COMBO_PHY_CTRL_MASK 0x1
12 #define EXYNOS7_EMBEDDED_COMBO_PHY_CTRL_EN BIT(0)
14 #define EXYNOS7_EMBEDDED_COMBO_PHY_CDR_LOCK_STATUS 0x5e
18 PHY_COMN_REG_CFG(0x00f, 0xfa, PWR_MODE_ANY),
19 PHY_COMN_REG_CFG(0x010, 0x82, PWR_MODE_ANY),
20 PHY_COMN_REG_CFG(0x011, 0x1e, PWR_MODE_ANY),
21 PHY_COMN_REG_CFG(0x017, 0x84, PWR_MODE_ANY),
22 PHY_TRSV_REG_CFG(0x035, 0x58, PWR_MODE_ANY),
23 PHY_TRSV_REG_CFG(0x036, 0x32, PWR_MODE_ANY),
[all …]
Dphy-fsd-ufs.c10 #define FSD_EMBEDDED_COMBO_PHY_CTRL 0x724
11 #define FSD_EMBEDDED_COMBO_PHY_CTRL_MASK 0x1
12 #define FSD_EMBEDDED_COMBO_PHY_CTRL_EN BIT(0)
13 #define FSD_EMBEDDED_COMBO_PHY_CDR_LOCK_STATUS 0x6e
16 PHY_COMN_REG_CFG(0x00f, 0xfa, PWR_MODE_ANY),
17 PHY_COMN_REG_CFG(0x010, 0x82, PWR_MODE_ANY),
18 PHY_COMN_REG_CFG(0x011, 0x1e, PWR_MODE_ANY),
19 PHY_COMN_REG_CFG(0x017, 0x94, PWR_MODE_ANY),
20 PHY_TRSV_REG_CFG(0x035, 0x58, PWR_MODE_ANY),
21 PHY_TRSV_REG_CFG(0x036, 0x32, PWR_MODE_ANY),
[all …]
Dphy-exynosautov9-ufs.c10 #define EXYNOSAUTOV9_EMBEDDED_COMBO_PHY_CTRL 0x728
11 #define EXYNOSAUTOV9_EMBEDDED_COMBO_PHY_CTRL_MASK 0x1
12 #define EXYNOSAUTOV9_EMBEDDED_COMBO_PHY_CTRL_EN BIT(0)
13 #define EXYNOSAUTOV9_EMBEDDED_COMBO_PHY_CDR_LOCK_STATUS 0x5e
16 PHY_TRSV_REG_CFG_OFFSET(o, v, d, 0x50)
20 PHY_COMN_REG_CFG(0x023, 0x80, PWR_MODE_ANY),
21 PHY_COMN_REG_CFG(0x01d, 0x10, PWR_MODE_ANY),
23 PHY_TRSV_REG_CFG_AUTOV9(0x044, 0xb5, PWR_MODE_ANY),
24 PHY_TRSV_REG_CFG_AUTOV9(0x04d, 0x43, PWR_MODE_ANY),
25 PHY_TRSV_REG_CFG_AUTOV9(0x05b, 0x20, PWR_MODE_ANY),
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/gpio/
Dqcom,wcd934x-gpio.yaml42 reg = <0x042 0x2>;
/linux-6.12.1/drivers/net/wireless/mediatek/mt76/mt7603/
Deeprom.h9 MT_EE_CHIP_ID = 0x000,
10 MT_EE_VERSION = 0x002,
11 MT_EE_MAC_ADDR = 0x004,
12 MT_EE_NIC_CONF_0 = 0x034,
13 MT_EE_NIC_CONF_1 = 0x036,
14 MT_EE_NIC_CONF_2 = 0x042,
16 MT_EE_XTAL_TRIM_1 = 0x03a,
18 MT_EE_RSSI_OFFSET_2G = 0x046,
19 MT_EE_WIFI_RF_SETTING = 0x048,
20 MT_EE_RSSI_OFFSET_5G = 0x04a,
[all …]
/linux-6.12.1/sound/soc/codecs/
Dwcd9335.h8 * In slimbus mode the reg base starts from 0x800.
9 * In i2s/i2c mode the reg base is 0x0.
12 #define WCD9335_REG_OFFSET(r) (r & 0xFF)
13 #define WCD9335_PAGE_OFFSET(r) ((r >> 8) & 0xFF)
15 /* Page-0 Registers */
16 #define WCD9335_PAGE0_PAGE_REGISTER WCD9335_REG(0x00, 0x000)
17 #define WCD9335_CODEC_RPM_CLK_GATE WCD9335_REG(0x00, 0x002)
18 #define WCD9335_CODEC_RPM_CLK_GATE_MCLK_GATE_MASK GENMASK(1, 0)
19 #define WCD9335_CODEC_RPM_CLK_MCLK_CFG WCD9335_REG(0x00, 0x003)
20 #define WCD9335_CODEC_RPM_CLK_MCLK_CFG_9P6MHZ BIT(0)
[all …]
/linux-6.12.1/Documentation/admin-guide/perf/
Dqcom_l2_pmu.rst22 Events are specified as 0xCCG, where CC is 2 hex digits specifying
23 the code (array row) and G specifies the group (column) 0-7.
25 In addition there is a cycle counter event specified by the value 0xFE
34 perf stat -e l2cache_0/config=0x001/,l2cache_0/config=0x042/ -a sleep 1
36 perf stat -e l2cache_0/config=0xfe/ -C 2 sleep 1
/linux-6.12.1/drivers/media/i2c/
Dimx415.c24 #define IMX415_PIXEL_ARRAY_TOP 0
25 #define IMX415_PIXEL_ARRAY_LEFT 0
32 #define IMX415_MODE CCI_REG8(0x3000)
33 #define IMX415_MODE_OPERATING (0)
34 #define IMX415_MODE_STANDBY BIT(0)
35 #define IMX415_REGHOLD CCI_REG8(0x3001)
36 #define IMX415_REGHOLD_INVALID (0)
37 #define IMX415_REGHOLD_VALID BIT(0)
38 #define IMX415_XMSTA CCI_REG8(0x3002)
39 #define IMX415_XMSTA_START (0)
[all …]
Dsaa717x.c36 MODULE_PARM_DESC(debug, "Debug level (0-1)");
76 #define TUNER_AUDIO_MONO 0 /* LL */
90 int fw_addr = reg == 0x454 || (reg >= 0x464 && reg <= 0x478) || reg == 0x480 || reg == 0x488; in saa717x_write()
94 msg.flags = 0; in saa717x_write()
96 mm1[0] = (reg >> 8) & 0xff; in saa717x_write()
97 mm1[1] = reg & 0xff; in saa717x_write()
100 mm1[4] = (value >> 16) & 0xff; in saa717x_write()
101 mm1[3] = (value >> 8) & 0xff; in saa717x_write()
102 mm1[2] = value & 0xff; in saa717x_write()
104 mm1[2] = value & 0xff; in saa717x_write()
[all …]
/linux-6.12.1/drivers/net/wireless/mediatek/mt76/
Dmt76x02_eeprom.h13 MT_EE_CHIP_ID = 0x000,
14 MT_EE_VERSION = 0x002,
15 MT_EE_MAC_ADDR = 0x004,
16 MT_EE_PCI_ID = 0x00A,
17 MT_EE_ANTENNA = 0x022,
18 MT_EE_CFG1_INIT = 0x024,
19 MT_EE_NIC_CONF_0 = 0x034,
20 MT_EE_NIC_CONF_1 = 0x036,
21 MT_EE_COUNTRY_REGION_5GHZ = 0x038,
22 MT_EE_COUNTRY_REGION_2GHZ = 0x039,
[all …]
/linux-6.12.1/arch/arm/boot/dts/ti/omap/
Domap4-kc1.dts15 reg = <0x80000000 0x20000000>; /* 512 MB */
23 pwms = <&twl_pwm 0 7812500>;
40 OMAP4_IOPAD(0x144, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx */
41 OMAP4_IOPAD(0x146, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx */
47 OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
48 OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
54 OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
55 OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
61 OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
62 OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
[all …]
Domap4-var-som-om44.dtsi15 reg = <0x80000000 0x40000000>; /* 1 GB */
38 pinctrl-0 = <
45 #phy-cells = <0>;
64 pinctrl-0 = <
70 OMAP4_IOPAD(0x19c, PIN_OUTPUT | MUX_MODE3) /* fref_clk2_out.gpio_182 */
71 OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */
77 OMAP4_IOPAD(0x090, PIN_INPUT | MUX_MODE3) /* gpmc_ncs4.gpio_101 (irq) */
78 OMAP4_IOPAD(0x092, PIN_OUTPUT | MUX_MODE3) /* gpmc_ncs5.gpio_102 (rst) */
84 OMAP4_IOPAD(0x140, PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
85 OMAP4_IOPAD(0x142, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
[all …]
/linux-6.12.1/drivers/media/pci/zoran/
Dzr36060.h44 #define ZR060_LOAD 0x000
45 #define ZR060_CFSR 0x001
46 #define ZR060_CIR 0x002
47 #define ZR060_CMR 0x003
48 #define ZR060_MBZ 0x004
49 #define ZR060_MBCVR 0x005
50 #define ZR060_MER 0x006
51 #define ZR060_IMR 0x007
52 #define ZR060_ISR 0x008
53 #define ZR060_TCV_NET_HI 0x009
[all …]
/linux-6.12.1/drivers/media/pci/tw5864/
Dtw5864-video.c21 0x3333, 0x1f82, 0x3333, 0x1f82, 0x1f82, 0x147b, 0x1f82, 0x147b,
22 0x3333, 0x1f82, 0x3333, 0x1f82, 0x1f82, 0x147b, 0x1f82, 0x147b,
23 0x2e8c, 0x1d42, 0x2e8c, 0x1d42, 0x1d42, 0x1234, 0x1d42, 0x1234,
24 0x2e8c, 0x1d42, 0x2e8c, 0x1d42, 0x1d42, 0x1234, 0x1d42, 0x1234,
25 0x2762, 0x199a, 0x2762, 0x199a, 0x199a, 0x1062, 0x199a, 0x1062,
26 0x2762, 0x199a, 0x2762, 0x199a, 0x199a, 0x1062, 0x199a, 0x1062,
27 0x2492, 0x16c1, 0x2492, 0x16c1, 0x16c1, 0x0e3f, 0x16c1, 0x0e3f,
28 0x2492, 0x16c1, 0x2492, 0x16c1, 0x16c1, 0x0e3f, 0x16c1, 0x0e3f,
29 0x2000, 0x147b, 0x2000, 0x147b, 0x147b, 0x0d1b, 0x147b, 0x0d1b,
30 0x2000, 0x147b, 0x2000, 0x147b, 0x147b, 0x0d1b, 0x147b, 0x0d1b,
[all …]
/linux-6.12.1/drivers/net/ethernet/freescale/dpaa2/
Ddpsw-cmd.h25 #define DPSW_CMDID_CLOSE DPSW_CMD_ID(0x800)
26 #define DPSW_CMDID_OPEN DPSW_CMD_ID(0x802)
28 #define DPSW_CMDID_GET_API_VERSION DPSW_CMD_ID(0xa02)
30 #define DPSW_CMDID_ENABLE DPSW_CMD_ID(0x002)
31 #define DPSW_CMDID_DISABLE DPSW_CMD_ID(0x003)
32 #define DPSW_CMDID_GET_ATTR DPSW_CMD_V2(0x004)
33 #define DPSW_CMDID_RESET DPSW_CMD_ID(0x005)
35 #define DPSW_CMDID_SET_IRQ_ENABLE DPSW_CMD_ID(0x012)
37 #define DPSW_CMDID_SET_IRQ_MASK DPSW_CMD_ID(0x014)
39 #define DPSW_CMDID_GET_IRQ_STATUS DPSW_CMD_ID(0x016)
[all …]
/linux-6.12.1/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/
Dtable.c6 0x800, 0x80040000,
7 0x804, 0x00000003,
8 0x808, 0x0000FC00,
9 0x80C, 0x0000000A,
10 0x810, 0x10001331,
11 0x814, 0x020C3D10,
12 0x818, 0x02220385,
13 0x81C, 0x00000000,
14 0x820, 0x01000100,
15 0x824, 0x00390204,
[all …]
/linux-6.12.1/include/linux/mfd/da9062/
Dregisters.h9 #define DA9062_PMIC_DEVICE_ID 0x62
10 #define DA9062_PMIC_VARIANT_MRC_AA 0x01
11 #define DA9062_PMIC_VARIANT_VRC_DA9061 0x01
12 #define DA9062_PMIC_VARIANT_VRC_DA9062 0x02
20 #define DA9062AA_PAGE_CON 0x000
21 #define DA9062AA_STATUS_A 0x001
22 #define DA9062AA_STATUS_B 0x002
23 #define DA9062AA_STATUS_D 0x004
24 #define DA9062AA_FAULT_LOG 0x005
25 #define DA9062AA_EVENT_A 0x006
[all …]
/linux-6.12.1/drivers/net/wireless/broadcom/b43/
Dradio_2057.h9 #define R2057_DACBUF_VINCM_CORE0 0x000
10 #define R2057_IDCODE 0x001
11 #define R2057_RCCAL_MASTER 0x002
12 #define R2057_RCCAL_CAP_SIZE 0x003
13 #define R2057_RCAL_CONFIG 0x004
14 #define R2057_GPAIO_CONFIG 0x005
15 #define R2057_GPAIO_SEL1 0x006
16 #define R2057_GPAIO_SEL0 0x007
17 #define R2057_CLPO_CONFIG 0x008
18 #define R2057_BANDGAP_CONFIG 0x009
[all …]
Dphy_lp.h9 #define B43_LPPHY_B_VERSION B43_PHY_CCK(0x00) /* B PHY version */
10 #define B43_LPPHY_B_BBCONFIG B43_PHY_CCK(0x01) /* B PHY BBConfig */
11 #define B43_LPPHY_B_RX_STAT0 B43_PHY_CCK(0x04) /* B PHY RX Status0 */
12 #define B43_LPPHY_B_RX_STAT1 B43_PHY_CCK(0x05) /* B PHY RX Status1 */
13 #define B43_LPPHY_B_CRS_THRESH B43_PHY_CCK(0x06) /* B PHY CRS Thresh */
14 #define B43_LPPHY_B_TXERROR B43_PHY_CCK(0x07) /* B PHY TxError */
15 #define B43_LPPHY_B_CHANNEL B43_PHY_CCK(0x08) /* B PHY Channel */
16 #define B43_LPPHY_B_WORKAROUND B43_PHY_CCK(0x09) /* B PHY workaround */
17 #define B43_LPPHY_B_TEST B43_PHY_CCK(0x0A) /* B PHY Test */
18 #define B43_LPPHY_B_FOURWIRE_ADDR B43_PHY_CCK(0x0B) /* B PHY Fourwire Address */
[all …]
/linux-6.12.1/include/linux/soundwire/
Dsdw_intel.h14 #define SDW_SHIM_BASE 0x2C000
15 #define SDW_ALH_BASE 0x2C800
16 #define SDW_SHIM_BASE_ACE 0x38000
17 #define SDW_ALH_BASE_ACE 0x24000
18 #define SDW_LINK_BASE 0x30000
19 #define SDW_LINK_SIZE 0x10000
23 #define SDW_SHIM_LCAP 0x0
24 #define SDW_SHIM_LCAP_LCOUNT_MASK GENMASK(2, 0)
28 #define SDW_SHIM_LCTL 0x4
30 #define SDW_SHIM_LCTL_SPA BIT(0)
[all …]
/linux-6.12.1/sound/drivers/opl4/
Dopl4_synth.c41 #define MIDI_CTL_RELEASE_TIME 0x48
42 #define MIDI_CTL_ATTACK_TIME 0x49
43 #define MIDI_CTL_DECAY_TIME 0x4b
44 #define MIDI_CTL_VIBRATO_RATE 0x4c
45 #define MIDI_CTL_VIBRATO_DEPTH 0x4d
46 #define MIDI_CTL_VIBRATO_DELAY 0x4e
52 static const s16 snd_opl4_pitch_map[0x600] = {
53 0x000,0x000,0x001,0x001,0x002,0x002,0x003,0x003,
54 0x004,0x004,0x005,0x005,0x006,0x006,0x006,0x007,
55 0x007,0x008,0x008,0x009,0x009,0x00a,0x00a,0x00b,
[all …]
/linux-6.12.1/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/
Dtable.c6 0x800, 0x80040000,
7 0x804, 0x00000003,
8 0x808, 0x0000FC00,
9 0x80C, 0x0000000A,
10 0x810, 0x10001331,
11 0x814, 0x020C3D10,
12 0x818, 0x02200385,
13 0x81C, 0x00000000,
14 0x820, 0x01000100,
15 0x824, 0x00390204,
[all …]
/linux-6.12.1/tools/testing/selftests/tpm2/
Dtpm2.py12 TPM2_ST_NO_SESSIONS = 0x8001
13 TPM2_ST_SESSIONS = 0x8002
15 TPM2_CC_FIRST = 0x01FF
17 TPM2_CC_CREATE_PRIMARY = 0x0131
18 TPM2_CC_DICTIONARY_ATTACK_LOCK_RESET = 0x0139
19 TPM2_CC_CREATE = 0x0153
20 TPM2_CC_LOAD = 0x0157
21 TPM2_CC_UNSEAL = 0x015E
22 TPM2_CC_FLUSH_CONTEXT = 0x0165
23 TPM2_CC_START_AUTH_SESSION = 0x0176
[all …]
/linux-6.12.1/sound/pci/ice1712/
Dmaya44.c23 #define WM8776_REG_HEADPHONE_L 0x00
24 #define WM8776_REG_HEADPHONE_R 0x01
25 #define WM8776_REG_HEADPHONE_MASTER 0x02
26 #define WM8776_REG_DAC_ATTEN_L 0x03
27 #define WM8776_REG_DAC_ATTEN_R 0x04
28 #define WM8776_REG_DAC_ATTEN_MASTER 0x05
29 #define WM8776_REG_DAC_PHASE 0x06
30 #define WM8776_REG_DAC_CONTROL 0x07
31 #define WM8776_REG_DAC_MUTE 0x08
32 #define WM8776_REG_DAC_DEEMPH 0x09
[all …]
/linux-6.12.1/drivers/gpu/drm/tegra/
Ddc.h176 #define DC_CMD_GENERAL_INCR_SYNCPT 0x000
177 #define DC_CMD_GENERAL_INCR_SYNCPT_CNTRL 0x001
179 #define SYNCPT_CNTRL_SOFT_RESET (1 << 0)
180 #define DC_CMD_GENERAL_INCR_SYNCPT_ERROR 0x002
181 #define DC_CMD_WIN_A_INCR_SYNCPT 0x008
182 #define DC_CMD_WIN_A_INCR_SYNCPT_CNTRL 0x009
183 #define DC_CMD_WIN_A_INCR_SYNCPT_ERROR 0x00a
184 #define DC_CMD_WIN_B_INCR_SYNCPT 0x010
185 #define DC_CMD_WIN_B_INCR_SYNCPT_CNTRL 0x011
186 #define DC_CMD_WIN_B_INCR_SYNCPT_ERROR 0x012
[all …]

12