Lines Matching +full:0 +full:x042
176 #define DC_CMD_GENERAL_INCR_SYNCPT 0x000
177 #define DC_CMD_GENERAL_INCR_SYNCPT_CNTRL 0x001
179 #define SYNCPT_CNTRL_SOFT_RESET (1 << 0)
180 #define DC_CMD_GENERAL_INCR_SYNCPT_ERROR 0x002
181 #define DC_CMD_WIN_A_INCR_SYNCPT 0x008
182 #define DC_CMD_WIN_A_INCR_SYNCPT_CNTRL 0x009
183 #define DC_CMD_WIN_A_INCR_SYNCPT_ERROR 0x00a
184 #define DC_CMD_WIN_B_INCR_SYNCPT 0x010
185 #define DC_CMD_WIN_B_INCR_SYNCPT_CNTRL 0x011
186 #define DC_CMD_WIN_B_INCR_SYNCPT_ERROR 0x012
187 #define DC_CMD_WIN_C_INCR_SYNCPT 0x018
188 #define DC_CMD_WIN_C_INCR_SYNCPT_CNTRL 0x019
189 #define DC_CMD_WIN_C_INCR_SYNCPT_ERROR 0x01a
190 #define DC_CMD_CONT_SYNCPT_VSYNC 0x028
192 #define DC_CMD_DISPLAY_COMMAND_OPTION0 0x031
193 #define DC_CMD_DISPLAY_COMMAND 0x032
194 #define DISP_CTRL_MODE_STOP (0 << 5)
198 #define DC_CMD_SIGNAL_RAISE 0x033
199 #define DC_CMD_DISPLAY_POWER_CONTROL 0x036
200 #define PW0_ENABLE (1 << 0)
208 #define DC_CMD_INT_STATUS 0x037
209 #define DC_CMD_INT_MASK 0x038
210 #define DC_CMD_INT_ENABLE 0x039
211 #define DC_CMD_INT_TYPE 0x03a
212 #define DC_CMD_INT_POLARITY 0x03b
213 #define CTXSW_INT (1 << 0)
234 #define DC_CMD_SIGNAL_RAISE1 0x03c
235 #define DC_CMD_SIGNAL_RAISE2 0x03d
236 #define DC_CMD_SIGNAL_RAISE3 0x03e
238 #define DC_CMD_STATE_ACCESS 0x040
239 #define READ_MUX (1 << 0)
242 #define DC_CMD_STATE_CONTROL 0x041
243 #define GENERAL_ACT_REQ (1 << 0)
257 #define DC_CMD_DISPLAY_WINDOW_HEADER 0x042
262 #define DC_CMD_REG_ACT_CONTROL 0x043
264 #define DC_COM_CRC_CONTROL 0x300
266 #define DC_COM_CRC_CONTROL_FULL_FRAME (0 << 2)
269 #define DC_COM_CRC_CONTROL_ENABLE (1 << 0)
270 #define DC_COM_CRC_CHECKSUM 0x301
271 #define DC_COM_PIN_OUTPUT_ENABLE(x) (0x302 + (x))
272 #define DC_COM_PIN_OUTPUT_POLARITY(x) (0x306 + (x))
275 #define DC_COM_PIN_OUTPUT_DATA(x) (0x30a + (x))
276 #define DC_COM_PIN_INPUT_ENABLE(x) (0x30e + (x))
277 #define DC_COM_PIN_INPUT_DATA(x) (0x312 + (x))
278 #define DC_COM_PIN_OUTPUT_SELECT(x) (0x314 + (x))
280 #define DC_COM_PIN_MISC_CONTROL 0x31b
281 #define DC_COM_PIN_PM0_CONTROL 0x31c
282 #define DC_COM_PIN_PM0_DUTY_CYCLE 0x31d
283 #define DC_COM_PIN_PM1_CONTROL 0x31e
284 #define DC_COM_PIN_PM1_DUTY_CYCLE 0x31f
286 #define DC_COM_SPI_CONTROL 0x320
287 #define DC_COM_SPI_START_BYTE 0x321
288 #define DC_COM_HSPI_WRITE_DATA_AB 0x322
289 #define DC_COM_HSPI_WRITE_DATA_CD 0x323
290 #define DC_COM_HSPI_CS_DC 0x324
291 #define DC_COM_SCRATCH_REGISTER_A 0x325
292 #define DC_COM_SCRATCH_REGISTER_B 0x326
293 #define DC_COM_GPIO_CTRL 0x327
294 #define DC_COM_GPIO_DEBOUNCE_COUNTER 0x328
295 #define DC_COM_CRC_CHECKSUM_LATCHED 0x329
297 #define DC_COM_RG_UNDERFLOW 0x365
299 #define UNDERFLOW_REPORT_ENABLE (1 << 0)
301 #define DC_DISP_DISP_SIGNAL_OPTIONS0 0x400
306 #define DC_DISP_DISP_SIGNAL_OPTIONS1 0x401
308 #define DC_DISP_DISP_WIN_OPTIONS 0x402
316 #define DC_DISP_DISP_MEM_HIGH_PRIORITY 0x403
317 #define CURSOR_THRESHOLD(x) (((x) & 0x03) << 24)
318 #define WINDOW_A_THRESHOLD(x) (((x) & 0x7f) << 16)
319 #define WINDOW_B_THRESHOLD(x) (((x) & 0x7f) << 8)
320 #define WINDOW_C_THRESHOLD(x) (((x) & 0xff) << 0)
322 #define DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER 0x404
323 #define CURSOR_DELAY(x) (((x) & 0x3f) << 24)
324 #define WINDOW_A_DELAY(x) (((x) & 0x3f) << 16)
325 #define WINDOW_B_DELAY(x) (((x) & 0x3f) << 8)
326 #define WINDOW_C_DELAY(x) (((x) & 0x3f) << 0)
328 #define DC_DISP_DISP_TIMING_OPTIONS 0x405
329 #define VSYNC_H_POSITION(x) ((x) & 0xfff)
331 #define DC_DISP_REF_TO_SYNC 0x406
332 #define DC_DISP_SYNC_WIDTH 0x407
333 #define DC_DISP_BACK_PORCH 0x408
334 #define DC_DISP_ACTIVE 0x409
335 #define DC_DISP_FRONT_PORCH 0x40a
336 #define DC_DISP_H_PULSE0_CONTROL 0x40b
337 #define DC_DISP_H_PULSE0_POSITION_A 0x40c
338 #define DC_DISP_H_PULSE0_POSITION_B 0x40d
339 #define DC_DISP_H_PULSE0_POSITION_C 0x40e
340 #define DC_DISP_H_PULSE0_POSITION_D 0x40f
341 #define DC_DISP_H_PULSE1_CONTROL 0x410
342 #define DC_DISP_H_PULSE1_POSITION_A 0x411
343 #define DC_DISP_H_PULSE1_POSITION_B 0x412
344 #define DC_DISP_H_PULSE1_POSITION_C 0x413
345 #define DC_DISP_H_PULSE1_POSITION_D 0x414
346 #define DC_DISP_H_PULSE2_CONTROL 0x415
347 #define DC_DISP_H_PULSE2_POSITION_A 0x416
348 #define DC_DISP_H_PULSE2_POSITION_B 0x417
349 #define DC_DISP_H_PULSE2_POSITION_C 0x418
350 #define DC_DISP_H_PULSE2_POSITION_D 0x419
351 #define DC_DISP_V_PULSE0_CONTROL 0x41a
352 #define DC_DISP_V_PULSE0_POSITION_A 0x41b
353 #define DC_DISP_V_PULSE0_POSITION_B 0x41c
354 #define DC_DISP_V_PULSE0_POSITION_C 0x41d
355 #define DC_DISP_V_PULSE1_CONTROL 0x41e
356 #define DC_DISP_V_PULSE1_POSITION_A 0x41f
357 #define DC_DISP_V_PULSE1_POSITION_B 0x420
358 #define DC_DISP_V_PULSE1_POSITION_C 0x421
359 #define DC_DISP_V_PULSE2_CONTROL 0x422
360 #define DC_DISP_V_PULSE2_POSITION_A 0x423
361 #define DC_DISP_V_PULSE3_CONTROL 0x424
362 #define DC_DISP_V_PULSE3_POSITION_A 0x425
363 #define DC_DISP_M0_CONTROL 0x426
364 #define DC_DISP_M1_CONTROL 0x427
365 #define DC_DISP_DI_CONTROL 0x428
366 #define DC_DISP_PP_CONTROL 0x429
367 #define DC_DISP_PP_SELECT_A 0x42a
368 #define DC_DISP_PP_SELECT_B 0x42b
369 #define DC_DISP_PP_SELECT_C 0x42c
370 #define DC_DISP_PP_SELECT_D 0x42d
372 #define PULSE_MODE_NORMAL (0 << 3)
374 #define PULSE_POLARITY_HIGH (0 << 4)
376 #define PULSE_QUAL_ALWAYS (0 << 6)
379 #define PULSE_LAST_START_A (0 << 8)
388 #define PULSE_START(x) (((x) & 0xfff) << 0)
389 #define PULSE_END(x) (((x) & 0xfff) << 16)
391 #define DC_DISP_DISP_CLOCK_CONTROL 0x42e
392 #define PIXEL_CLK_DIVIDER_PCD1 (0 << 8)
405 #define SHIFT_CLK_DIVIDER(x) ((x) & 0xff)
407 #define DC_DISP_DISP_INTERFACE_CONTROL 0x42f
408 #define DISP_DATA_FORMAT_DF1P1C (0 << 0)
409 #define DISP_DATA_FORMAT_DF1P2C24B (1 << 0)
410 #define DISP_DATA_FORMAT_DF1P2C18B (2 << 0)
411 #define DISP_DATA_FORMAT_DF1P2C16B (3 << 0)
412 #define DISP_DATA_FORMAT_DF2S (4 << 0)
413 #define DISP_DATA_FORMAT_DF3S (5 << 0)
414 #define DISP_DATA_FORMAT_DFSPI (6 << 0)
415 #define DISP_DATA_FORMAT_DF1P3C24B (7 << 0)
416 #define DISP_DATA_FORMAT_DF1P3C18B (8 << 0)
417 #define DISP_ALIGNMENT_MSB (0 << 8)
419 #define DISP_ORDER_RED_BLUE (0 << 9)
422 #define DC_DISP_DISP_COLOR_CONTROL 0x430
423 #define BASE_COLOR_SIZE666 ( 0 << 0)
424 #define BASE_COLOR_SIZE111 ( 1 << 0)
425 #define BASE_COLOR_SIZE222 ( 2 << 0)
426 #define BASE_COLOR_SIZE333 ( 3 << 0)
427 #define BASE_COLOR_SIZE444 ( 4 << 0)
428 #define BASE_COLOR_SIZE555 ( 5 << 0)
429 #define BASE_COLOR_SIZE565 ( 6 << 0)
430 #define BASE_COLOR_SIZE332 ( 7 << 0)
431 #define BASE_COLOR_SIZE888 ( 8 << 0)
432 #define BASE_COLOR_SIZE101010 (10 << 0)
433 #define BASE_COLOR_SIZE121212 (12 << 0)
435 #define DITHER_CONTROL_DISABLE (0 << 8)
438 #define BASE_COLOR_SIZE_MASK (0xf << 0)
439 #define BASE_COLOR_SIZE_666 ( 0 << 0)
440 #define BASE_COLOR_SIZE_111 ( 1 << 0)
441 #define BASE_COLOR_SIZE_222 ( 2 << 0)
442 #define BASE_COLOR_SIZE_333 ( 3 << 0)
443 #define BASE_COLOR_SIZE_444 ( 4 << 0)
444 #define BASE_COLOR_SIZE_555 ( 5 << 0)
445 #define BASE_COLOR_SIZE_565 ( 6 << 0)
446 #define BASE_COLOR_SIZE_332 ( 7 << 0)
447 #define BASE_COLOR_SIZE_888 ( 8 << 0)
448 #define BASE_COLOR_SIZE_101010 ( 10 << 0)
449 #define BASE_COLOR_SIZE_121212 ( 12 << 0)
451 #define DC_DISP_SHIFT_CLOCK_OPTIONS 0x431
453 #define SC0_H_QUALIFIER_NONE (1 << 0)
455 #define DC_DISP_DATA_ENABLE_OPTIONS 0x432
456 #define DE_SELECT_ACTIVE_BLANK (0 << 0)
457 #define DE_SELECT_ACTIVE (1 << 0)
458 #define DE_SELECT_ACTIVE_IS (2 << 0)
459 #define DE_CONTROL_ONECLK (0 << 2)
465 #define DC_DISP_SERIAL_INTERFACE_OPTIONS 0x433
466 #define DC_DISP_LCD_SPI_OPTIONS 0x434
467 #define DC_DISP_BORDER_COLOR 0x435
468 #define DC_DISP_COLOR_KEY0_LOWER 0x436
469 #define DC_DISP_COLOR_KEY0_UPPER 0x437
470 #define DC_DISP_COLOR_KEY1_LOWER 0x438
471 #define DC_DISP_COLOR_KEY1_UPPER 0x439
473 #define DC_DISP_CURSOR_FOREGROUND 0x43c
474 #define DC_DISP_CURSOR_BACKGROUND 0x43d
476 #define DC_DISP_CURSOR_START_ADDR 0x43e
477 #define CURSOR_CLIP_DISPLAY (0 << 28)
481 #define CURSOR_SIZE_32x32 (0 << 24)
485 #define DC_DISP_CURSOR_START_ADDR_NS 0x43f
487 #define DC_DISP_CURSOR_POSITION 0x440
488 #define DC_DISP_CURSOR_POSITION_NS 0x441
490 #define DC_DISP_INIT_SEQ_CONTROL 0x442
491 #define DC_DISP_SPI_INIT_SEQ_DATA_A 0x443
492 #define DC_DISP_SPI_INIT_SEQ_DATA_B 0x444
493 #define DC_DISP_SPI_INIT_SEQ_DATA_C 0x445
494 #define DC_DISP_SPI_INIT_SEQ_DATA_D 0x446
496 #define DC_DISP_DC_MCCIF_FIFOCTRL 0x480
497 #define DC_DISP_MCCIF_DISPLAY0A_HYST 0x481
498 #define DC_DISP_MCCIF_DISPLAY0B_HYST 0x482
499 #define DC_DISP_MCCIF_DISPLAY1A_HYST 0x483
500 #define DC_DISP_MCCIF_DISPLAY1B_HYST 0x484
502 #define DC_DISP_DAC_CRT_CTRL 0x4c0
503 #define DC_DISP_DISP_MISC_CONTROL 0x4c1
504 #define DC_DISP_SD_CONTROL 0x4c2
505 #define DC_DISP_SD_CSC_COEFF 0x4c3
506 #define DC_DISP_SD_LUT(x) (0x4c4 + (x))
507 #define DC_DISP_SD_FLICKER_CONTROL 0x4cd
508 #define DC_DISP_DC_PIXEL_COUNT 0x4ce
509 #define DC_DISP_SD_HISTOGRAM(x) (0x4cf + (x))
510 #define DC_DISP_SD_BL_PARAMETERS 0x4d7
511 #define DC_DISP_SD_BL_TF(x) (0x4d8 + (x))
512 #define DC_DISP_SD_BL_CONTROL 0x4dc
513 #define DC_DISP_SD_HW_K_VALUES 0x4dd
514 #define DC_DISP_SD_MAN_K_VALUES 0x4de
516 #define DC_DISP_BLEND_BACKGROUND_COLOR 0x4e4
517 #define BACKGROUND_COLOR_ALPHA(x) (((x) & 0xff) << 24)
518 #define BACKGROUND_COLOR_BLUE(x) (((x) & 0xff) << 16)
519 #define BACKGROUND_COLOR_GREEN(x) (((x) & 0xff) << 8)
520 #define BACKGROUND_COLOR_RED(x) (((x) & 0xff) << 0)
522 #define DC_DISP_INTERLACE_CONTROL 0x4e5
525 #define INTERLACE_ENABLE (1 << 0)
527 #define DC_DISP_CURSOR_START_ADDR_HI 0x4ec
528 #define DC_DISP_BLEND_CURSOR_CONTROL 0x4f1
529 #define CURSOR_COMPOSITION_MODE_BLEND (0 << 25)
531 #define CURSOR_MODE_LEGACY (0 << 24)
533 #define CURSOR_DST_BLEND_ZERO (0 << 16)
537 #define CURSOR_SRC_BLEND_K1 (0 << 8)
540 #define CURSOR_ALPHA 0xff
542 #define DC_WIN_CORE_ACT_CONTROL 0x50e
543 #define VCOUNTER (0 << 0)
544 #define HCOUNTER (1 << 0)
546 #define DC_WIN_CORE_IHUB_WGRP_LATENCY_CTLA 0x543
549 #define DC_WIN_CORE_IHUB_WGRP_LATENCY_CTLB 0x544
550 #define WATERMARK_MASK 0x1fffffff
552 #define DC_WIN_CORE_PRECOMP_WGRP_PIPE_METER 0x560
553 #define PIPE_METER_INT(x) (((x) & 0xff) << 8)
554 #define PIPE_METER_FRAC(x) (((x) & 0xff) << 0)
556 #define DC_WIN_CORE_IHUB_WGRP_POOL_CONFIG 0x561
557 #define MEMPOOL_ENTRIES(x) (((x) & 0xffff) << 0)
559 #define DC_WIN_CORE_IHUB_WGRP_FETCH_METER 0x562
560 #define SLOTS(x) (((x) & 0xff) << 0)
562 #define DC_WIN_CORE_IHUB_LINEBUF_CONFIG 0x563
563 #define MODE_TWO_LINES (0 << 14)
566 #define DC_WIN_CORE_IHUB_THREAD_GROUP 0x568
567 #define THREAD_NUM_MASK (0x1f << 1)
568 #define THREAD_NUM(x) (((x) & 0x1f) << 1)
569 #define THREAD_GROUP_ENABLE (1 << 0)
571 #define DC_WIN_H_FILTER_P(p) (0x601 + (p))
572 #define DC_WIN_V_FILTER_P(p) (0x619 + (p))
574 #define DC_WIN_CSC_YOF 0x611
575 #define DC_WIN_CSC_KYRGB 0x612
576 #define DC_WIN_CSC_KUR 0x613
577 #define DC_WIN_CSC_KVR 0x614
578 #define DC_WIN_CSC_KUG 0x615
579 #define DC_WIN_CSC_KVG 0x616
580 #define DC_WIN_CSC_KUB 0x617
581 #define DC_WIN_CSC_KVB 0x618
583 #define DC_WIN_WIN_OPTIONS 0x700
584 #define H_DIRECTION (1 << 0)
592 #define DC_WIN_BYTE_SWAP 0x701
593 #define BYTE_SWAP_NOSWAP (0 << 0)
594 #define BYTE_SWAP_SWAP2 (1 << 0)
595 #define BYTE_SWAP_SWAP4 (2 << 0)
596 #define BYTE_SWAP_SWAP4HW (3 << 0)
598 #define DC_WIN_BUFFER_CONTROL 0x702
599 #define BUFFER_CONTROL_HOST (0 << 0)
600 #define BUFFER_CONTROL_VI (1 << 0)
601 #define BUFFER_CONTROL_EPP (2 << 0)
602 #define BUFFER_CONTROL_MPEGE (3 << 0)
603 #define BUFFER_CONTROL_SB2D (4 << 0)
605 #define DC_WIN_COLOR_DEPTH 0x703
606 #define WIN_COLOR_DEPTH_P1 0
650 #define DC_WIN_POSITION 0x704
651 #define H_POSITION(x) (((x) & 0x1fff) << 0) /* XXX 0x7fff on Tegra186 */
652 #define V_POSITION(x) (((x) & 0x1fff) << 16) /* XXX 0x7fff on Tegra186 */
654 #define DC_WIN_SIZE 0x705
655 #define H_SIZE(x) (((x) & 0x1fff) << 0) /* XXX 0x7fff on Tegra186 */
656 #define V_SIZE(x) (((x) & 0x1fff) << 16) /* XXX 0x7fff on Tegra186 */
658 #define DC_WIN_PRESCALED_SIZE 0x706
659 #define H_PRESCALED_SIZE(x) (((x) & 0x7fff) << 0)
660 #define V_PRESCALED_SIZE(x) (((x) & 0x1fff) << 16) /* XXX 0x7fff on Tegra186 */
662 #define DC_WIN_H_INITIAL_DDA 0x707
663 #define DC_WIN_V_INITIAL_DDA 0x708
664 #define DC_WIN_DDA_INC 0x709
665 #define H_DDA_INC(x) (((x) & 0xffff) << 0)
666 #define V_DDA_INC(x) (((x) & 0xffff) << 16)
668 #define DC_WIN_LINE_STRIDE 0x70a
669 #define DC_WIN_BUF_STRIDE 0x70b
670 #define DC_WIN_UV_BUF_STRIDE 0x70c
671 #define DC_WIN_BUFFER_ADDR_MODE 0x70d
672 #define DC_WIN_BUFFER_ADDR_MODE_LINEAR (0 << 0)
673 #define DC_WIN_BUFFER_ADDR_MODE_TILE (1 << 0)
674 #define DC_WIN_BUFFER_ADDR_MODE_LINEAR_UV (0 << 16)
677 #define DC_WIN_DV_CONTROL 0x70e
679 #define DC_WIN_BLEND_NOKEY 0x70f
680 #define BLEND_WEIGHT1(x) (((x) & 0xff) << 16)
681 #define BLEND_WEIGHT0(x) (((x) & 0xff) << 8)
683 #define DC_WIN_BLEND_1WIN 0x710
684 #define BLEND_CONTROL_FIX (0 << 2)
686 #define BLEND_COLOR_KEY_NONE (0 << 0)
687 #define BLEND_COLOR_KEY_0 (1 << 0)
688 #define BLEND_COLOR_KEY_1 (2 << 0)
689 #define BLEND_COLOR_KEY_BOTH (3 << 0)
691 #define DC_WIN_BLEND_2WIN_X 0x711
694 #define DC_WIN_BLEND_2WIN_Y 0x712
695 #define DC_WIN_BLEND_3WIN_XY 0x713
697 #define DC_WIN_HP_FETCH_CONTROL 0x714
699 #define DC_WINBUF_START_ADDR 0x800
700 #define DC_WINBUF_START_ADDR_NS 0x801
701 #define DC_WINBUF_START_ADDR_U 0x802
702 #define DC_WINBUF_START_ADDR_U_NS 0x803
703 #define DC_WINBUF_START_ADDR_V 0x804
704 #define DC_WINBUF_START_ADDR_V_NS 0x805
706 #define DC_WINBUF_ADDR_H_OFFSET 0x806
707 #define DC_WINBUF_ADDR_H_OFFSET_NS 0x807
708 #define DC_WINBUF_ADDR_V_OFFSET 0x808
709 #define DC_WINBUF_ADDR_V_OFFSET_NS 0x809
711 #define DC_WINBUF_UFLOW_STATUS 0x80a
712 #define DC_WINBUF_SURFACE_KIND 0x80b
713 #define DC_WINBUF_SURFACE_KIND_PITCH (0 << 0)
714 #define DC_WINBUF_SURFACE_KIND_TILED (1 << 0)
715 #define DC_WINBUF_SURFACE_KIND_BLOCK (2 << 0)
716 #define DC_WINBUF_SURFACE_KIND_BLOCK_HEIGHT(x) (((x) & 0x7) << 4)
718 #define DC_WINBUF_START_ADDR_HI 0x80d
720 #define DC_WINBUF_START_ADDR_HI_U 0x80f
721 #define DC_WINBUF_START_ADDR_HI_V 0x811
723 #define DC_WINBUF_CDE_CONTROL 0x82f
724 #define ENABLE_SURFACE (1 << 0)
726 #define DC_WINBUF_AD_UFLOW_STATUS 0xbca
727 #define DC_WINBUF_BD_UFLOW_STATUS 0xdca
728 #define DC_WINBUF_CD_UFLOW_STATUS 0xfca
731 #define DC_DISP_CORE_SOR_SET_CONTROL(x) (0x403 + (x))
732 #define PROTOCOL_MASK (0xf << 8)
733 #define PROTOCOL_SINGLE_TMDS_A (0x1 << 8)
735 #define DC_DISP_PCALC_HEAD_SET_CROPPED_POINT_IN_CURSOR 0x442
736 #define DC_DISP_PCALC_HEAD_SET_CROPPED_SIZE_IN_CURSOR 0x446
738 #define DC_WINC_PRECOMP_WGRP_PIPE_CAPA 0x500
739 #define DC_WINC_PRECOMP_WGRP_PIPE_CAPB 0x501
740 #define DC_WINC_PRECOMP_WGRP_PIPE_CAPC 0x502
741 #define MAX_PIXELS_5TAP444(x) ((x) & 0xffff)
742 #define DC_WINC_PRECOMP_WGRP_PIPE_CAPD 0x503
743 #define DC_WINC_PRECOMP_WGRP_PIPE_CAPE 0x504
744 #define MAX_PIXELS_2TAP444(x) ((x) & 0xffff)
745 #define DC_WINC_PRECOMP_WGRP_PIPE_CAPF 0x505
747 #define DC_WIN_CORE_WINDOWGROUP_SET_CONTROL 0x702
748 #define OWNER_MASK (0xf << 0)
749 #define OWNER(x) (((x) & 0xf) << 0)
751 #define DC_WIN_CROPPED_SIZE 0x706
753 #define DC_WIN_SET_INPUT_SCALER_H_START_PHASE 0x707
754 #define DC_WIN_SET_INPUT_SCALER_V_START_PHASE 0x708
756 #define DC_WIN_PLANAR_STORAGE 0x709
757 #define PITCH(x) (((x) >> 6) & 0x1fff)
759 #define DC_WIN_PLANAR_STORAGE_UV 0x70a
760 #define PITCH_U(x) ((((x) >> 6) & 0x1fff) << 0)
761 #define PITCH_V(x) ((((x) >> 6) & 0x1fff) << 16)
763 #define DC_WIN_SET_INPUT_SCALER_HPHASE_INCR 0x70b
764 #define DC_WIN_SET_INPUT_SCALER_VPHASE_INCR 0x70c
766 #define DC_WIN_SET_PARAMS 0x70d
768 #define DEGAMMA_NONE (0 << 13)
772 #define INPUT_RANGE_BYPASS (0 << 10)
775 #define COLOR_SPACE_RGB (0 << 8)
780 #define DC_WIN_WINDOWGROUP_SET_CONTROL_INPUT_SCALER 0x70e
783 #define VERTICAL_TAPS_2 (1 << 0)
784 #define VERTICAL_TAPS_5 (4 << 0)
786 #define DC_WIN_WINDOWGROUP_SET_INPUT_SCALER_COEFF 0x70f
787 #define COEFF_INDEX(x) (((x) & 0xff) << 15)
788 #define COEFF_DATA(x) (((x) & 0x3ff) << 0)
790 #define DC_WIN_WINDOWGROUP_SET_INPUT_SCALER_USAGE 0x711
793 #define INPUT_SCALER_HBYPASS (1 << 0)
795 #define DC_WIN_BLEND_LAYER_CONTROL 0x716
796 #define COLOR_KEY_NONE (0 << 25)
800 #define K2(x) (((x) & 0xff) << 16)
801 #define K1(x) (((x) & 0xff) << 8)
802 #define WINDOW_LAYER_DEPTH(x) (((x) & 0xff) << 0)
804 #define DC_WIN_BLEND_MATCH_SELECT 0x717
805 #define BLEND_FACTOR_DST_ALPHA_ZERO (0 << 12)
809 #define BLEND_FACTOR_SRC_ALPHA_ZERO (0 << 8)
813 #define BLEND_FACTOR_DST_COLOR_ZERO (0 << 4)
821 #define BLEND_FACTOR_SRC_COLOR_ZERO (0 << 0)
822 #define BLEND_FACTOR_SRC_COLOR_ONE (1 << 0)
823 #define BLEND_FACTOR_SRC_COLOR_K1 (2 << 0)
824 #define BLEND_FACTOR_SRC_COLOR_K1_TIMES_DST (3 << 0)
825 #define BLEND_FACTOR_SRC_COLOR_NEG_K1_TIMES_DST (4 << 0)
826 #define BLEND_FACTOR_SRC_COLOR_K1_TIMES_SRC (5 << 0)
828 #define DC_WIN_BLEND_NOMATCH_SELECT 0x718
830 #define DC_WIN_PRECOMP_WGRP_PARAMS 0x724
831 #define SWAP_UV (1 << 0)
833 #define DC_WIN_WINDOW_SET_CONTROL 0x730
836 #define DC_WINBUF_CROPPED_POINT 0x806
837 #define OFFSET_Y(x) (((x) & 0xffff) << 16)
838 #define OFFSET_X(x) (((x) & 0xffff) << 0)