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Searched refs:GCC_QUPV3_WRAP0_S6_CLK (Results 1 – 25 of 38) sorted by relevance

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/linux-6.12.1/include/dt-bindings/clock/
Dqcom,qdu1000-gcc.h78 #define GCC_QUPV3_WRAP0_S6_CLK 68 macro
Dqcom,sdx75-gcc.h123 #define GCC_QUPV3_WRAP0_S6_CLK 113 macro
Dqcom,sm7150-gcc.h83 #define GCC_QUPV3_WRAP0_S6_CLK 71 macro
Dqcom,gcc-sc7280.h92 #define GCC_QUPV3_WRAP0_S6_CLK 82 macro
Dqcom,gcc-sm8450.h110 #define GCC_QUPV3_WRAP0_S6_CLK 98 macro
Dqcom,gcc-sm8150.h103 #define GCC_QUPV3_WRAP0_S6_CLK 93 macro
Dqcom,gcc-sdm845.h90 #define GCC_QUPV3_WRAP0_S6_CLK 80 macro
Dqcom,gcc-sm8350.h101 #define GCC_QUPV3_WRAP0_S6_CLK 89 macro
Dqcom,gcc-sm8250.h109 #define GCC_QUPV3_WRAP0_S6_CLK 99 macro
Dqcom,gcc-sc8180x.h118 #define GCC_QUPV3_WRAP0_S6_CLK 108 macro
Dqcom,sa8775p-gcc.h134 #define GCC_QUPV3_WRAP0_S6_CLK 123 macro
Dqcom,gcc-sc8280xp.h205 #define GCC_QUPV3_WRAP0_S6_CLK 194 macro
Dqcom,x1e80100-gcc.h186 #define GCC_QUPV3_WRAP0_S6_CLK 176 macro
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsdx75.dtsi738 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
761 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
Dqdu1000.dtsi581 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
597 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
Dsc8180x.dtsi1058 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
1073 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
1087 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
Dsm8350.dtsi1163 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
1179 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
1195 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
Dsdm845.dtsi1622 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
1644 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
1663 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
Dsdm670.dtsi860 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
Dsm8250.dtsi1652 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
1675 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
1697 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
/linux-6.12.1/drivers/clk/qcom/
Dgcc-sdm845.c3589 [GCC_QUPV3_WRAP0_S6_CLK] = &gcc_qupv3_wrap0_s6_clk.clkr,
3761 [GCC_QUPV3_WRAP0_S6_CLK] = &gcc_qupv3_wrap0_s6_clk.clkr,
Dgcc-qdu1000.c2516 [GCC_QUPV3_WRAP0_S6_CLK] = &gcc_qupv3_wrap0_s6_clk.clkr,
Dgcc-sdx75.c2811 [GCC_QUPV3_WRAP0_S6_CLK] = &gcc_qupv3_wrap0_s6_clk.clkr,
Dgcc-sm7150.c2823 [GCC_QUPV3_WRAP0_S6_CLK] = &gcc_qupv3_wrap0_s6_clk.clkr,
Dgcc-sm8450.c3085 [GCC_QUPV3_WRAP0_S6_CLK] = &gcc_qupv3_wrap0_s6_clk.clkr,

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