/linux-6.12.1/drivers/spi/ |
D | spi-mux.c | 1 // SPDX-License-Identifier: GPL-2.0 3 // General Purpose SPI multiplexer 8 #include <linux/mux/consumer.h> 10 #include <linux/spi/spi.h> 12 #define SPI_MUX_NO_CS ((unsigned int)-1) 17 * This driver supports a MUX on an SPI bus. This can be useful when you need 21 * The driver will create an additional SPI controller. Devices added under the 22 * mux will be handled as 'chip selects' on this controller. 26 * struct spi_mux_priv - the basic spi_mux structure 27 * @spi: pointer to the device struct attached to the parent [all …]
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D | spi-dw-bt1.c | 1 // SPDX-License-Identifier: GPL-2.0-only 9 // Baikal-T1 DW APB SPI and System Boot SPI driver 17 #include <linux/mux/consumer.h> 24 #include <linux/spi/spi-mem.h> 25 #include <linux/spi/spi.h> 27 #include "spi-dw.h" 35 struct mux_control *mux; member 52 struct dw_spi_bt1 *dwsbt1 = to_dw_spi_bt1(desc->mem->spi->controller); in dw_spi_bt1_dirmap_create() 54 if (!dwsbt1->map || in dw_spi_bt1_dirmap_create() 55 !dwsbt1->dws.mem_ops.supports_op(desc->mem, &desc->info.op_tmpl)) in dw_spi_bt1_dirmap_create() [all …]
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D | spi-meson-spicc.c | 2 * Driver for Amlogic Meson SPI communication controller (SPICC) 7 * SPDX-License-Identifier: GPL-2.0+ 12 #include <linux/clk-provider.h> 19 #include <linux/spi/spi.h> 30 * - all transfers are cutted in 16 words burst because the FIFO hangs on 31 * TX underflow, and there is no TX "Half-Empty" interrupt, so we go by 33 * - CS management is dumb, and goes UP between every burst, so is really a 69 #define SPICC_TH_EN BIT(1) /* TX FIFO Half-Full Interrupt */ 72 #define SPICC_RH_EN BIT(4) /* RX FIFO Half-Full Interrupt */ 89 #define SPICC_TH BIT(1) /* TX FIFO Half-Full Interrupt */ [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/spi/ |
D | spi-mux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-mux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic SPI Multiplexer 10 This binding describes a SPI bus multiplexer to route the SPI chip select 11 signals. This can be used when you need more devices than the SPI controller 13 setting of the multiplexer to a channel needs to be done by a specific SPI mux 16 MOSI /--------------------------------+--------+--------+--------\ 17 MISO |/------------------------------+|-------+|-------+|-------\| [all …]
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D | snps,dw-apb-ssi.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Mark Brown <broonie@kernel.org> 13 - $ref: spi-controller.yaml# 14 - if: 19 - mscc,ocelot-spi 20 - mscc,jaguar2-spi 25 - if: [all …]
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/linux-6.12.1/drivers/mux/ |
D | adgs1408.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * ADGS1408/ADGS1409 SPI MUX driver 11 #include <linux/mux/driver.h> 13 #include <linux/spi/spi.h> 25 static int adgs1408_spi_reg_write(struct spi_device *spi, in adgs1408_spi_reg_write() argument 33 return spi_write_then_read(spi, tx_buf, sizeof(tx_buf), NULL, 0); in adgs1408_spi_reg_write() 36 static int adgs1408_set(struct mux_control *mux, int state) in adgs1408_set() argument 38 struct spi_device *spi = to_spi_device(mux->chip->dev.parent); in adgs1408_set() local 46 return adgs1408_spi_reg_write(spi, ADGS1408_SW_DATA, reg); in adgs1408_set() 53 static int adgs1408_probe(struct spi_device *spi) in adgs1408_probe() argument [all …]
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/linux-6.12.1/arch/arm64/boot/dts/freescale/ |
D | fsl-ls1028a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 11 /dts-v1/; 13 #include "fsl-ls1028a.dtsi" 17 compatible = "fsl,ls1028a-qds", "fsl,ls1028a"; 32 stdout-path = "serial0:115200n8"; 40 sys_mclk: clock-mclk { 41 compatible = "fixed-clock"; 42 #clock-cells = <0>; 43 clock-frequency = <25000000>; 46 reg_1p8v: regulator-1p8v { [all …]
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D | fsl-lx2160a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 9 #include "fsl-lx2160a.dtsi" 13 compatible = "fsl,lx2160a-qds", "fsl,lx2160a"; 23 stdout-path = "serial0:115200n8"; 26 sb_3v3: regulator-sb3v3 { 27 compatible = "regulator-fixed"; 28 regulator-name = "MC34717-3.3VSB"; 29 regulator-min-microvolt = <3300000>; 30 regulator-max-microvolt = <3300000>; [all …]
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D | fsl-lx2162a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 9 #include "fsl-lx2160a.dtsi" 13 compatible = "fsl,lx2162a-qds", "fsl,lx2160a"; 23 stdout-path = "serial0:115200n8"; 26 sb_3v3: regulator-sb3v3 { 27 compatible = "regulator-fixed"; 28 regulator-name = "LTM4619-3.3VSB"; 29 regulator-min-microvolt = <3300000>; 30 regulator-max-microvolt = <3300000>; [all …]
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D | fsl-ls208xa-qds.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 14 phy-handle = <&mdio0_phy12>; 15 phy-connection-type = "sgmii"; 19 phy-handle = <&mdio0_phy13>; 20 phy-connection-type = "sgmii"; 24 phy-handle = <&mdio0_phy14>; 25 phy-connection-type = "sgmii"; 29 phy-handle = <&mdio0_phy15>; 30 phy-connection-type = "sgmii"; 34 mmc-hs200-1_8v; [all …]
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D | fsl-ls1046a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for Freescale Layerscape-1046A family SoC. 6 * Copyright 2018-2019 NXP 11 /dts-v1/; 13 #include "fsl-ls1046a.dtsi" 17 compatible = "fsl,ls1046a-qds", "fsl,ls1046a"; 20 emi1-slot1 = &ls1046mdio_s1; 21 emi1-slot2 = &ls1046mdio_s2; 22 emi1-slot4 = &ls1046mdio_s4; 27 qsgmii-s2-p1 = &qsgmii_phy_s2_p1; [all …]
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/linux-6.12.1/arch/arm64/boot/dts/microchip/ |
D | sparx5_pcb125.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 11 compatible = "microchip,sparx5-pcb125", "microchip,sparx5"; 20 emmc_pins: emmc-pins { 28 drive-strength = <3>; 35 bus-width = <8>; 36 non-removable; 37 pinctrl-0 = <&emmc_pins>; 38 max-frequency = <8000000>; 39 microchip,clock-delay = <10>; [all …]
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D | sparx5_nand.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 cs14_pins: cs14-pins { 14 pinctrl-0 = <&si2_pins>; 15 pinctrl-names = "default"; 16 spi@e { 17 compatible = "spi-mux"; 18 mux-controls = <&mux>; 19 #address-cells = <1>; 20 #size-cells = <0>; 23 compatible = "spi-nand"; [all …]
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/linux-6.12.1/arch/arm/boot/dts/mediatek/ |
D | mt7629-rfb.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 8 #include <dt-bindings/input/input.h> 13 compatible = "mediatek,mt7629-rfb", "mediatek,mt7629"; 20 stdout-path = "serial0:115200n8"; 23 gpio-keys { 24 compatible = "gpio-keys"; 26 button-reset { 32 button-wps { 44 reg_3p3v: regulator-3p3v { [all …]
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/linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
D | mt7622-bananapi-bpi-r64.dts | 5 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/leds/common.h> 17 model = "Bananapi BPI-R64"; 18 chassis-type = "embedded"; 19 compatible = "bananapi,bpi-r64", "mediatek,mt7622"; 26 stdout-path = "serial0:115200n8"; 32 proc-supply = <&mt6380_vcpu_reg>; [all …]
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D | mt7622-rfb1.dts | 6 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 9 /dts-v1/; 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/gpio/gpio.h> 18 chassis-type = "embedded"; 19 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622"; 26 stdout-path = "serial0:115200n8"; 32 proc-supply = <&mt6380_vcpu_reg>; 33 sram-supply = <&mt6380_vm_reg>; 37 proc-supply = <&mt6380_vcpu_reg>; [all …]
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D | mt7986a-rfb.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/pinctrl/mt65xx.h> 14 chassis-type = "embedded"; 15 compatible = "mediatek,mt7986a-rfb", "mediatek,mt7986a"; 22 stdout-path = "serial0:115200n8"; 30 reg_1p8v: regulator-1p8v { 31 compatible = "regulator-fixed"; 32 regulator-name = "fixed-1.8V"; 33 regulator-min-microvolt = <1800000>; [all …]
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D | mt7986b-rfb.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 12 chassis-type = "embedded"; 13 compatible = "mediatek,mt7986b-rfb", "mediatek,mt7986b"; 20 stdout-path = "serial0:115200n8"; 37 compatible = "mediatek,eth-mac"; 39 phy-mode = "2500base-x"; 41 fixed-link { 43 full-duplex; 49 compatible = "mediatek,eth-mac"; [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/ |
D | lantiq,pinctrl-falcon.txt | 4 - compatible: "lantiq,pinctrl-falcon" 5 - reg: Should contain the physical address and length of the gpio/pinmux 8 Please refer to pinctrl-bindings.txt in this directory for details of the 15 mux function to select on those group(s), and two pin configuration parameters: 16 pull-up and open-drain 22 other words, a subnode that lists a mux function but no pin configuration 25 information about e.g. the mux function. 29 Definition of mux function groups: 31 Required subnode-properties: 32 - lantiq,groups : An array of strings. Each string contains the name of a group. [all …]
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D | lantiq,pinctrl-xway.txt | 4 - compatible: "lantiq,<chip>-pinctrl", where <chip> is: 10 - reg: Should contain the physical address and length of the gpio/pinmux 13 Please refer to pinctrl-bindings.txt in this directory for details of the 20 mux function to select on those group(s), and two pin configuration parameters: 21 pull-up and open-drain 27 other words, a subnode that lists a mux function but no pin configuration 30 information about e.g. the mux function. 34 Definition of mux function groups: 36 Required subnode-properties: 37 - lantiq,groups : An array of strings. Each string contains the name of a group. [all …]
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D | mediatek,mt7986-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7986-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sean Wang <sean.wang@kernel.org> 18 - mediatek,mt7986a-pinctrl 19 - mediatek,mt7986b-pinctrl 25 reg-names: 27 - const: gpio 28 - const: iocfg_rt [all …]
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/linux-6.12.1/arch/arm64/boot/dts/amlogic/ |
D | meson-gxbb.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include "meson-gx.dtsi" 7 #include "meson-gx-mali450.dtsi" 8 #include <dt-bindings/gpio/meson-gxbb-gpio.h> 9 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> 10 #include <dt-bindings/clock/gxbb-clkc.h> 11 #include <dt-bindings/clock/gxbb-aoclkc.h> 12 #include <dt-bindings/reset/gxbb-aoclkc.h> 15 compatible = "amlogic,meson-gxbb"; 19 compatible = "amlogic,meson-gxbb-usb2-phy"; [all …]
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/linux-6.12.1/sound/soc/codecs/ |
D | wm8750.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * wm8750.c -- WM8750 ALSA SoC audio driver 20 #include <linux/spi/spi.h> 145 SOC_ENUM("Playback De-emphasis", wm8750_enum[15]), 158 SOC_ENUM("Treble Cut-off", wm8750_enum[2]), 162 SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]), 163 SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]), 186 /* ADCDAC Bit 0 - ADCHPD */ 187 /* ADCDAC Bit 4 - HPOR */ 188 /* ADCTL1 Bit 2,3 - DATSEL */ [all …]
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D | wm8988.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * wm8988.c -- WM8988 ALSA SoC audio driver 17 #include <linux/spi/spi.h> 167 static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0); 168 static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1); 169 static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1); 170 static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1); 171 static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0); 180 SOC_ENUM("Treble Cut-off", treble), 184 SOC_ENUM("3D Lower Cut-off", stereo_3d_lc), [all …]
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/linux-6.12.1/drivers/iio/adc/ |
D | ti-ads131e08.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Texas Instruments ADS131E0x 4-, 6- and 8-Channel ADCs 24 #include <linux/spi/spi.h> 87 unsigned int mux; member 92 struct spi_device *spi; member 166 ret = spi_write_then_read(st->spi, &cmd, 1, NULL, 0); in ads131e08_exec_cmd() 168 dev_err(&st->spi->dev, "Exec cmd(%02x) failed\n", cmd); in ads131e08_exec_cmd() 178 .tx_buf = &st->tx_buf, in ads131e08_read_reg() 181 .value = st->sdecode_delay_us, in ads131e08_read_reg() 185 .rx_buf = &st->rx_buf, in ads131e08_read_reg() [all …]
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