| /linux-6.12.1/tools/perf/util/ |
| D | cpumap.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
9 /** Identify where counts are aggregated, -1 implies not to aggregate. */
13 /** The numa node X as read from /sys/devices/system/node/nodeX. */
16 * The socket number as read from
17 * /sys/devices/system/cpu/cpuX/topology/physical_package_id.
20 /** The die id as read from /sys/devices/system/cpu/cpuX/topology/die_id. */
22 /** The cluster id as read from /sys/devices/system/cpu/cpuX/topology/cluster_id */
24 /** The cache level as read from /sys/devices/system/cpu/cpuX/cache/indexY/level */
27 * The cache instance ID, which is the first CPU in the
28 * /sys/devices/system/cpu/cpuX/cache/indexY/shared_cpu_list
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| /linux-6.12.1/tools/virtio/virtio-trace/ |
| D | trace-agent.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Guest agent for virtio-trace
15 #include "trace-agent.h"
23 #define READ_PATH_FMT "%s/per_cpu/cpu%d/trace_pipe_raw"
24 #define WRITE_PATH_FMT "/dev/virtio-ports/trace-path-cpu%d"
25 #define CTL_PATH "/dev/virtio-ports/agent-ctl-path"
35 pr_err("Could not read cpus\n"); in get_total_cpus()
59 s->pipe_size = PIPE_INIT; in agent_info_new()
60 s->use_stdout = false; in agent_info_new()
61 s->cpus = get_total_cpus(); in agent_info_new()
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| D | trace-agent-rw.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Read/write thread of a guest agent for virtio-trace
16 #include "trace-agent.h"
30 rw_ti->cpu_num = -1; in rw_thread_info_new()
31 rw_ti->in_fd = -1; in rw_thread_info_new()
32 rw_ti->out_fd = -1; in rw_thread_info_new()
33 rw_ti->read_pipe = -1; in rw_thread_info_new()
34 rw_ti->write_pipe = -1; in rw_thread_info_new()
35 rw_ti->pipe_size = PIPE_INIT; in rw_thread_info_new()
40 void *rw_thread_init(int cpu, const char *in_path, const char *out_path, in rw_thread_init() argument
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| /linux-6.12.1/tools/perf/pmu-events/arch/x86/amdzen4/ |
| D | data-fabric.json | 4 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 0.",
12 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 1.",
20 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 2.",
28 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 3.",
36 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 4.",
44 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 5.",
52 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 6.",
60 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 7.",
68 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 8.",
76 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 9.",
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| /linux-6.12.1/Documentation/core-api/ |
| D | local_ops.rst | 29 Local atomic operations are meant to provide fast and highly reentrant per CPU
34 Having fast per CPU atomic counters is interesting in many cases: it does not
40 CPU which owns the data. Therefore, care must taken to make sure that only one
41 CPU writes to the ``local_t`` data. This is done by using per cpu data and
43 however permitted to read ``local_t`` data from any CPU: it will then appear to
44 be written out of order wrt other memory writes by the owner CPU.
54 ``asm-generic/local.h`` in your architecture's ``local.h`` is sufficient.
66 * Variables touched by local ops must be per cpu variables.
67 * *Only* the CPU owner of these variables must write to them.
68 * This CPU can use local ops from any context (process, irq, softirq, nmi, ...)
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| /linux-6.12.1/drivers/infiniband/ulp/rtrs/ |
| D | rtrs-clt-stats.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2014 - 2018 ProfitBricks GmbH. All rights reserved.
6 * Copyright (c) 2018 - 2019 1&1 IONOS Cloud GmbH. All rights reserved.
7 * Copyright (c) 2019 - 2020 1&1 IONOS SE. All rights reserved.
12 #include "rtrs-clt.h"
16 struct rtrs_clt_path *clt_path = to_clt_path(con->c.path); in rtrs_clt_update_wc_stats()
17 struct rtrs_clt_stats *stats = clt_path->stats; in rtrs_clt_update_wc_stats()
19 int cpu; in rtrs_clt_update_wc_stats() local
21 cpu = raw_smp_processor_id(); in rtrs_clt_update_wc_stats()
22 s = get_cpu_ptr(stats->pcpu_stats); in rtrs_clt_update_wc_stats()
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| D | rtrs-srv-stats.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2014 - 2018 ProfitBricks GmbH. All rights reserved.
6 * Copyright (c) 2018 - 2019 1&1 IONOS Cloud GmbH. All rights reserved.
7 * Copyright (c) 2019 - 2020 1&1 IONOS SE. All rights reserved.
12 #include "rtrs-srv.h"
17 int cpu; in rtrs_srv_reset_rdma_stats() local
20 for_each_possible_cpu(cpu) { in rtrs_srv_reset_rdma_stats()
21 r = per_cpu_ptr(stats->rdma_stats, cpu); in rtrs_srv_reset_rdma_stats()
28 return -EINVAL; in rtrs_srv_reset_rdma_stats()
33 int cpu; in rtrs_srv_stats_rdma_to_str() local
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| /linux-6.12.1/drivers/hwtracing/coresight/ |
| D | coresight-trace-id.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
13 * With multi cpu systems, and more additional trace sources a scalable
19 * In order to ensure that a consistent cpu / ID matching is maintained
20 * throughout a perf cs_etm event session - a session in progress flag will be
22 * complete. This allows the same CPU to be re-allocated its prior ID when
29 * API permits multiple maps to be maintained - for large systems where
47 * Read and optionally allocate a CoreSight trace ID and associate with a CPU.
49 * Function will read the current trace ID for the associated CPU,
55 * @cpu: The CPU index to allocate for.
57 * return: CoreSight trace ID or -EINVAL if allocation impossible.
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| /linux-6.12.1/tools/power/cpupower/utils/helpers/ |
| D | sysfs.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * (C) 2004-2009 Dominik Brodowski <linux@dominikbrodowski.de>
24 if (fd == -1) in sysfs_read_file()
27 numread = read(fd, buf, buflen - 1); in sysfs_read_file()
40 * Detect whether a CPU is online
43 * 1 -> if CPU is online
44 * 0 -> if CPU is offline
47 int sysfs_is_cpu_online(unsigned int cpu) in sysfs_is_cpu_online() argument
57 snprintf(path, sizeof(path), PATH_TO_CPU "cpu%u", cpu); in sysfs_is_cpu_online()
64 * -> cpuX directory exists, but not cpuX/online file in sysfs_is_cpu_online()
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| D | msr.c | 1 // SPDX-License-Identifier: GPL-2.0
19 * Will return 0 on success and -1 on failure.
21 * EFAULT -If the read/write did not fully complete
22 * EIO -If the CPU does not support MSRs
23 * ENXIO -If the CPU does not exist
26 int read_msr(int cpu, unsigned int idx, unsigned long long *val) in read_msr() argument
31 sprintf(msr_file_name, "/dev/cpu/%d/msr", cpu); in read_msr()
34 return -1; in read_msr()
35 if (lseek(fd, idx, SEEK_CUR) == -1) in read_msr()
37 if (read(fd, val, sizeof *val) != sizeof *val) in read_msr()
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| /linux-6.12.1/include/uapi/linux/ |
| D | isst_if.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
16 * struct isst_if_platform_info - Define platform information
25 * @mmio_supported: Support of mmio interface for core-power feature
40 * struct isst_if_cpu_map - CPU mapping between logical and physical CPU
41 * @logical_cpu: Linux logical CPU number
42 * @physical_cpu: PUNIT CPU number
44 * Used to convert from Linux logical CPU to PUNIT CPU numbering scheme.
45 * The PUNIT CPU number is different than APIC ID based CPU numbering.
53 * struct isst_if_cpu_maps - structure for CPU map IOCTL
54 * @cmd_count: Number of CPU mapping command in cpu_map[]
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| /linux-6.12.1/tools/power/cpupower/lib/ |
| D | cpuidle.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * (C) 2004-2009 Dominik Brodowski <linux@dominikbrodowski.de>
22 * For example the functionality to disable c-states was introduced in later
29 unsigned int cpuidle_state_file_exists(unsigned int cpu, in cpuidle_state_file_exists() argument
37 snprintf(path, sizeof(path), PATH_TO_CPU "cpu%u/cpuidle/state%u/%s", in cpuidle_state_file_exists()
38 cpu, idlestate, fname); in cpuidle_state_file_exists()
45 * helper function to read file from /sys into given buffer
51 unsigned int cpuidle_state_read_file(unsigned int cpu, in cpuidle_state_read_file() argument
60 snprintf(path, sizeof(path), PATH_TO_CPU "cpu%u/cpuidle/state%u/%s", in cpuidle_state_read_file()
61 cpu, idlestate, fname); in cpuidle_state_read_file()
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| /linux-6.12.1/tools/memory-model/Documentation/ |
| D | explanation.txt | 1 Explanation of the Linux-Kernel Memory Consistency Model
15 7. THE PROGRAM ORDER RELATION: po AND po-loc
18 10. THE READS-FROM RELATION: rf, rfi, and rfe
20 12. THE FROM-READS RELATION: fr, fri, and fre
22 14. PROPAGATION ORDER RELATION: cumul-fence
28 20. THE HAPPENS-BEFORE RELATION: hb
29 21. THE PROPAGATES-BEFORE RELATION: pb
30 22. RCU RELATIONS: rcu-link, rcu-gp, rcu-rscsi, rcu-order, rcu-fence, and rb
31 23. SRCU READ-SIDE CRITICAL SECTIONS
39 ------------
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| /linux-6.12.1/arch/mips/include/asm/sn/sn0/ |
| D | hubpi.h | 8 * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
28 #define PI_CPU_PROTECT 0x000000 /* CPU Protection */
29 #define PI_PROT_OVERRD 0x000008 /* Clear CPU Protection bit */
32 #define PI_CPU_NUM 0x000020 /* CPU Number ID */
57 #define PI_CPU_PRESENT_A 0x000040 /* CPU Present A */
58 #define PI_CPU_PRESENT_B 0x000048 /* CPU Present B */
59 #define PI_CPU_ENABLE_A 0x000050 /* CPU Enable A */
60 #define PI_CPU_ENABLE_B 0x000058 /* CPU Enable B */
63 #define PI_NMI_A 0x000070 /* NMI to CPU A */
64 #define PI_NMI_B 0x000078 /* NMI to CPU B */
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| /linux-6.12.1/drivers/gpu/drm/i915/gem/selftests/ |
| D | i915_gem_coherency.c | 2 * SPDX-License-Identifier: MIT
27 u32 *cpu; in cpu_set() local
30 i915_gem_object_lock(ctx->obj, NULL); in cpu_set()
31 err = i915_gem_object_prepare_write(ctx->obj, &needs_clflush); in cpu_set()
35 page = i915_gem_object_get_page(ctx->obj, offset >> PAGE_SHIFT); in cpu_set()
36 cpu = kmap_local_page(page) + offset_in_page(offset); in cpu_set()
39 drm_clflush_virt_range(cpu, sizeof(*cpu)); in cpu_set()
41 *cpu = v; in cpu_set()
44 drm_clflush_virt_range(cpu, sizeof(*cpu)); in cpu_set()
46 kunmap_local(cpu); in cpu_set()
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| /linux-6.12.1/Documentation/ |
| D | memory-barriers.txt | 19 documentation at tools/memory-model/. Nevertheless, even this memory
37 Note also that it is possible that a barrier may be a no-op for an
48 - Device operations.
49 - Guarantees.
53 - Varieties of memory barrier.
54 - What may not be assumed about memory barriers?
55 - Address-dependency barriers (historical).
56 - Control dependencies.
57 - SMP barrier pairing.
58 - Examples of memory barrier sequences.
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| /linux-6.12.1/arch/arm/mach-zynq/ |
| D | slcr.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2011-2013 Xilinx Inc.
18 #define SLCR_A9_CPU_RST_CTRL_OFFSET 0x244 /* CPU Software Reset Control */
33 * zynq_slcr_write - Write to a register in SLCR block
46 * zynq_slcr_read - Read a register in SLCR block
48 * @val: Pointer to value to be read from SLCR
59 * zynq_slcr_unlock - Unlock SLCR registers
71 * zynq_slcr_get_device_id - Read device code id
87 * zynq_slcr_system_restart - Restart the entire system.
103 * the FSBL not loading the bitstream after soft-reboot in zynq_slcr_system_restart()
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| /linux-6.12.1/tools/perf/pmu-events/arch/x86/grandridge/ |
| D | uncore-io.json | 12 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
24 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
36 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
48 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
60 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
72 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
84 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
96 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
108 …"BriefDescription": "PCIE Completion Buffer Inserts. Counts once per 64 byte read issued from thi…
228 …"BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core …
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| /linux-6.12.1/Documentation/RCU/Design/Requirements/ |
| D | Requirements.rst | 16 ------------
18 Read-copy update (RCU) is a synchronization mechanism that is often used
19 as a replacement for reader-writer locking. RCU is unusual in that
20 updaters do not block readers, which means that RCU's read-side
28 thought of as an informal, high-level specification for RCU. It is
40 #. `Fundamental Non-Requirements`_
42 #. `Quality-of-Implementation Requirements`_
44 #. `Software-Engineering Requirements`_
53 ------------------------
58 #. `Grace-Period Guarantee`_
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| /linux-6.12.1/tools/power/cpupower/utils/idle_monitor/ |
| D | mperf_monitor.c | 1 // SPDX-License-Identifier: GPL-2.0-only
17 #include "idle_monitor/cpupower-monitor.h"
33 unsigned int cpu);
35 unsigned int cpu);
80 /* valid flag for all CPUs. If a MSR read failed it will be zero */
93 static int get_aperf_mperf(int cpu, unsigned long long *aval, in get_aperf_mperf() argument
101 * Running on the cpu from which we read the registers will in get_aperf_mperf()
106 if (bind_cpu(cpu)) in get_aperf_mperf()
124 ret = read_msr(cpu, MSR_APERF, aval); in get_aperf_mperf()
125 ret |= read_msr(cpu, MSR_MPERF, mval); in get_aperf_mperf()
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| /linux-6.12.1/Documentation/RCU/ |
| D | checklist.rst | 1 .. SPDX-License-Identifier: GPL-2.0
14 0. Is RCU being applied to a read-mostly situation? If the data
18 tool for the job. Yes, RCU does reduce read-side overhead by
19 increasing write-side overhead, which is exactly why normal uses
27 Yet another exception is where the low real-time latency of RCU's
28 read-side primitives is critically important.
33 counter-intuitive situation where rcu_read_lock() and
49 them -- even x86 allows later loads to be reordered to precede
54 relating to itself that other tasks can read, there by definition
59 2. Do the RCU read-side critical sections make proper use of
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| /linux-6.12.1/include/clocksource/ |
| D | hyperv_timer.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Definitions for the clocksource provided by the Hyper-V
5 * hypervisor to guest VMs, as described in the Hyper-V Top
18 #include <asm/hyperv-tlfs.h>
29 extern int hv_stimer_cleanup(unsigned int cpu);
30 extern void hv_stimer_legacy_init(unsigned int cpu, int sint);
31 extern void hv_stimer_legacy_cleanup(unsigned int cpu);
49 * The protocol for reading Hyper-V TSC page is specified in Hypervisor in hv_read_tsc_page_tsc()
50 * Top-Level Functional Specification ver. 3.0 and above. To get the in hv_read_tsc_page_tsc()
52 * - READ ReferenceTscSequence in hv_read_tsc_page_tsc()
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| /linux-6.12.1/Documentation/ABI/testing/ |
| D | sysfs-kernel-slab | 5 Christoph Lameter <cl@linux-foundation.org>
17 Christoph Lameter <cl@linux-foundation.org>
19 The aliases file is read-only and specifies how many caches
26 Christoph Lameter <cl@linux-foundation.org>
28 The align file is read-only and specifies the cache's object
35 Christoph Lameter <cl@linux-foundation.org>
37 The alloc_calls file is read-only and lists the kernel code
46 Christoph Lameter <cl@linux-foundation.org>
57 Christoph Lameter <cl@linux-foundation.org>
59 The alloc_from_partial file shows how many times a cpu slab has
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| /linux-6.12.1/tools/power/x86/turbostat/ |
| D | turbostat.8 | 3 turbostat \- Report processor frequency and idle statistics
12 .RB [ "\--interval seconds" ]
15 idle power-state statistics, temperature and power on X86 processors.
19 in one-shot upon its completion.
22 The 5-second interval can be changed using the --interval option.
26 Options can be specified with a single or double '-', and only as much of the option
27 name as necessary to disambiguate it from others is necessary. Note that options are case-sensitiv…
29 \fB--add attributes\fP add column with counter having specified 'attributes'. The 'location' attri…
36 … event for given device from /sys/bus/event_source/devices/<device>/events/<event> eg. c1-residency
37 …perf/cstate_core/c1-residency would then use /sys/bus/event_source/devices/cstate_core/events/c1-r…
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| /linux-6.12.1/Documentation/mm/ |
| D | mmu_notifier.rst | 8 For secondary TLB (non CPU TLB) like IOMMU TLB or device TLB (when device use
9 thing like ATS/PASID to get the IOMMU to walk the CPU page table to access a
23 - take page table lock
24 - clear page table entry and notify ([pmd/pte]p_huge_clear_flush_notify())
25 - set page table entry to point to new page
33 Two address addrA and addrB such that \|addrA - addrB\| >= PAGE_SIZE we assume
38 [Time N] --------------------------------------------------------------------
39 CPU-thread-0 {try to write to addrA}
40 CPU-thread-1 {try to write to addrB}
41 CPU-thread-2 {}
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|