Lines Matching +full:cpu +full:- +full:read

1 /* SPDX-License-Identifier: GPL-2.0 */
13 * With multi cpu systems, and more additional trace sources a scalable
19 * In order to ensure that a consistent cpu / ID matching is maintained
20 * throughout a perf cs_etm event session - a session in progress flag will be
22 * complete. This allows the same CPU to be re-allocated its prior ID when
29 * API permits multiple maps to be maintained - for large systems where
47 * Read and optionally allocate a CoreSight trace ID and associate with a CPU.
49 * Function will read the current trace ID for the associated CPU,
55 * @cpu: The CPU index to allocate for.
57 * return: CoreSight trace ID or -EINVAL if allocation impossible.
59 int coresight_trace_id_get_cpu_id(int cpu);
65 int coresight_trace_id_get_cpu_id_map(int cpu, struct coresight_trace_id_map *id_map);
68 * Release an allocated trace ID associated with the CPU.
70 * This will release the CoreSight trace ID associated with the CPU.
72 * @cpu: The CPU index to release the associated trace ID.
74 void coresight_trace_id_put_cpu_id(int cpu);
80 void coresight_trace_id_put_cpu_id_map(int cpu, struct coresight_trace_id_map *id_map);
83 * Read the current allocated CoreSight Trace ID value for the CPU.
85 * Fast read of the current value that does not allocate if no ID allocated
86 * for the CPU.
88 * Used in perf context where it is known that the value for the CPU will not
90 * for the CPU as a packet in the data file. IDs cannot change during a perf
96 * @cpu: The CPU index to read.
100 int coresight_trace_id_read_cpu_id(int cpu);
106 int coresight_trace_id_read_cpu_id_map(int cpu, struct coresight_trace_id_map *id_map);
111 * Unconditionally allocates a Trace ID, without associating the ID with a CPU.
115 * return: Trace ID or -EINVAL if allocation is impossible.
133 * Increase the perf session reference count - called by perf when setting up a
137 * CPU cannot change during their and other's concurrent sessions. Instead,