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/linux-6.12.1/Documentation/devicetree/bindings/iio/resolver/
Dadi,ad2s1210.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AD2S1210 Resolver-to-Digital Converter
10 - Michael Hennerich <michael.hennerich@analog.com>
13 The AD2S1210 is a complete 10-bit to 16-bit resolution tracking
14 resolver-to-digital converter, integrating an on-board programmable
29 0 0 Normal mode - position output
30 0 1 Normal mode - velocity output
34 In normal mode, the resolution of the digital output is selected using
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/linux-6.12.1/Documentation/devicetree/bindings/iio/adc/
Dst,stm32-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 STM32 ADC is a successive approximation analog-to-digital converter.
13 stored in a left-aligned or right-aligned 32-bit data register.
17 voltage goes beyond the user-defined, higher or lower thresholds.
22 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
27 - st,stm32f4-adc-core
28 - st,stm32h7-adc-core
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/linux-6.12.1/include/sound/ac97/
Dregs.h1 /* SPDX-License-Identifier: GPL-2.0+
33 /* range 0x28-0x3a - AUDIO AC'97 2.0 extensions */
44 /* range 0x3c-0x58 - MODEM */
59 /* range 0x5a-0x7b - Vendor Specific */
62 /* range 0x60-0x6f (page 1) - extended codec registers */
108 #define AC97_BC_16BIT_DAC 0x0000 /* 16-bit DAC resolution */
109 #define AC97_BC_18BIT_DAC 0x0040 /* 18-bit DAC resolution */
110 #define AC97_BC_20BIT_DAC 0x0080 /* 20-bit DAC resolution */
112 #define AC97_BC_16BIT_ADC 0x0000 /* 16-bit ADC resolution */
113 #define AC97_BC_18BIT_ADC 0x0100 /* 18-bit ADC resolution */
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/linux-6.12.1/include/uapi/linux/
Dinput.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * Copyright (c) 1999-2002 Vojtech Pavlik
20 #include "input-event-codes.h"
56 * IOCTLs (0x00 - 0x7f)
67 * struct input_absinfo - used by EVIOCGABS/EVIOCSABS ioctls
75 * @resolution: specifies resolution for the values reported for
81 * The default resolution for main axes (ABS_X, ABS_Y, ABS_Z,
83 * per millimeter (units/mm), resolution for rotational axes
85 * The resolution for the size axes (ABS_MT_TOUCH_MAJOR,
88 * When INPUT_PROP_ACCELEROMETER is set the resolution changes.
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Dpkt_sched.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
13 with obsolete IPv6 values is not occasional :-). New IPv6 drafts
52 ---------
89 #define TC_LINKLAYER_MASK 0x0F /* limit use to lower 4 bits */
93 __u8 linklayer; /* lower 4 bits */
120 #define TCA_STAB_MAX (__TCA_STAB_MAX - 1)
131 * Priorities go from zero to (SKBPRIO_MAX_PRIORITY - 1).
150 __u8 priomap[TC_PRIO_MAX+1]; /* Map: logical priority -> PRIO band */
174 * command is received (just act as a pass-thru queue).
204 #define TCA_TBF_MAX (__TCA_TBF_MAX - 1)
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/linux-6.12.1/include/sound/
Dac97_codec.h1 /* SPDX-License-Identifier: GPL-2.0+
24 /* specific - SigmaTel */
33 #define AC97_SIGMATEL_MULTICHN 0x74 /* Multi-Channel programming */
37 /* specific - Analog Devices */
44 #define AC97_AD_MISC 0x76 /* Misc Control Bits */
47 /* specific - Cirrus Logic */
56 /* specific - Conexant */
64 /* specific - ALC */
83 #define AC97_ALC650_SPSR_MASK 0x0f00 /* S/PDIF Sample Rate bits */
106 /* specific - Yamaha YMF7x3 */
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/linux-6.12.1/drivers/iio/resolver/
Dad2s1210.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2010 Analog Devices Inc.
11 * ----------------------------|------|-------------------------------------------
22 * Encoder resolution | D3:2 | *not implemented*
23 * Resolution | D1:0 | *device tree: assigned-resolution-bits*
34 * ----------------------------------------|----|---------------------------------
49 #include <linux/bits.h>
150 /** Available raw hysteresis values based on resolution. */
152 /* adi,fixed-mode property - only valid when mode_gpios == NULL. */
154 /** The selected resolution */
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/linux-6.12.1/Documentation/input/devices/
Datarikbd.rst12 provides a convenient connection point for a mouse and switch-type joysticks.
13 The ikbd processor also maintains a time-of-day clock with one second
14 resolution.
17 keyswitches, mouse resolution, etc. can be accommodated.
18 The ikbd communicates with the main processor over a high speed bi-directional
41 0xF8-0xFB relative mouse position records (lsbs determined by
43 0xFC time-of-day
55 The mouse port should be capable of supporting a mouse with resolution of
67 ---------------------------
72 settable threshold of motion. Regardless of the threshold, all bits of
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/linux-6.12.1/Documentation/i2c/
Dsmbus-protocol.rst44 Addr (7 bits) I2C 7 bit address. Note that this can be expanded to
46 Comm (8 bits) Command byte, a data byte which often selects a register on
48 Data (8 bits) A plain data byte. DataLow and DataHigh represent the low and
50 Count (8 bits) A data byte containing the length of a block operation.
117 byte. But this time, the data is a complete word (16 bits)::
149 This is the opposite of the Read Word operation. 16 bits
166 16 bits of data to it, and reads 16 bits of data in return::
207 SMBus Block Write - Block Read Process Call
210 SMBus Block Write - Block Read Process Call was introduced in
241 client->irq assigned to a Host Notify IRQ if no one else specified another.
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/linux-6.12.1/Documentation/hwmon/
Dasc7621.rst20 Andigilog has both the PECI and pre-PECI versions of the Heceta-6, as
21 Intel calls them. Heceta-6e has high frequency PWM and Heceta-6p has
23 Heceta-6e part and aSC7621 is the Heceta-6p part. They are both in
27 specification. First enhancement is temperature reading resolution. We
28 have used registers below 20h for vendor-specific functions in addition
29 to those in the Intel-specified vendor range.
32 The fan speed control uses this finer value to produce a "step-less" fan
33 PWM output. These two bytes are "read-locked" to guarantee that once a
34 high or low byte is read, the other byte is locked-in until after the
37 sheet says 10-bits of resolution, although you may find the lower bits
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Dlm85.rst79 - Philip Pokorny <ppokorny@penguincomputing.com>,
80 - Frodo Looijaard <frodol@dds.nl>,
81 - Richard Barrington <rich_b_nz@clear.net.nz>,
82 - Margit Schubert-While <margitsw@t-online.de>,
83 - Justin Thiessen <jthiessen@penguincomputing.com>
86 -----------
92 The LM85 uses the 2-wire interface compatible with the SMBUS 2.0
94 temperatures and five (5) voltages. It has four (4) 16-bit counters for
127 ----------------
133 for 3-wire and 2-wire mode. For this reason, the 2-wire fan modes are not
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/linux-6.12.1/include/linux/
Dscmi_protocol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2018-2021 ARM Ltd.
21 * struct scmi_revision_info - version information structure
30 * @impl_ver: A vendor-specific implementation version.
32 * @sub_vendor_id: A sub-vendor identifier(Null terminated ASCII string)
87 * struct scmi_clk_proto_ops - represents the various operations provided
133 * struct scmi_perf_proto_ops - represents the various operations provided
191 * struct scmi_power_proto_ops - represents the various operations provided
204 #define SCMI_POWER_STATE_ID_MASK (BIT(28) - 1)
217 * struct scmi_sensor_reading - represent a timestamped read
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Dfb.h1 /* SPDX-License-Identifier: GPL-2.0 */
76 __u32 serial; /* Serial Number - Integer */
83 __u16 input; /* display type - see FB_DISP_* */
84 __u16 dpms; /* DPMS support - see FB_DPMS_ */
85 __u16 signal; /* Signal Type - see FB_SIGNAL_* */
88 __u16 gamma; /* Gamma - in fractions of 100 */
90 __u16 misc; /* Misc flags - see FB_MISC_* */
122 const char __user *mask; /* cursor mask bits */
131 /* The resolution of the passed in fb_info about to change */
135 /* only used by mach-pxa/am200epd.c */
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/linux-6.12.1/drivers/iio/temperature/
Dltc2983.c1 // SPDX-License-Identifier: GPL-2.0
3 * Analog Devices LTC2983 Multi-Sensor Digital Temperature Measurement System
60 (((chan - 1) * 4) + LTC2983_CHAN_ASSIGN_START_REG)
62 (((chan - 1) * 4) + LTC2983_TEMP_RES_START_REG)
310 * the number of integer and fractional bits are specified. The resolution
311 * is given by 1/@resolution and tell us the number of fractional bits. For
312 * instance a resolution of 2^-10 means we have 10 fractional bits.
314 static u32 __convert_to_raw(const u64 val, const u32 resolution) in __convert_to_raw() argument
316 u64 __res = val * resolution; in __convert_to_raw()
324 static u32 __convert_to_raw_sign(const u64 val, const u32 resolution) in __convert_to_raw_sign() argument
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/linux-6.12.1/Documentation/watchdog/
Dwatchdog-kernel-api.rst5 Last reviewed: 12-Feb-2013
10 ------------
14 file: Documentation/watchdog/watchdog-api.rst .
24 -------
82 * gov: a pointer to the assigned watchdog device pretimeout governor or NULL.
91 'timeout'. Not used if max_hw_heartbeat_ms is non-zero.
93 in milli-seconds. This value is normally 0; it should only be provided
95 * max_hw_heartbeat_ms: Maximum hardware heartbeat, in milli-seconds.
106 should define ops->restart. Priority can be changed through
109 WDIOF_* status bits).
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/linux-6.12.1/Documentation/admin-guide/RAS/
Dmain.rst1 .. SPDX-License-Identifier: GPL-2.0
37 -------------
51 Self-Monitoring, Analysis and Reporting Technology (SMART).
59 ---------------
72 * **Correctable Error (CE)** - the error detection mechanism detected and
76 * **Uncorrected Error (UE)** - the amount of errors happened above the error
77 correction threshold, and the system was unable to auto-correct.
79 * **Fatal Error** - when an UE error happens on a critical component of the
83 * **Non-fatal Error** - when an UE error happens on an unused component,
91 The mechanism for handling non-fatal errors is usually complex and may
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/linux-6.12.1/drivers/gpu/drm/msm/disp/mdp5/
Dmdp5_ctl.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2015 The Linux Foundation. All rights reserved.
10 * CTL - MDP Control Pool Manager
16 * a specific data path ID - REG_MDP5_CTL_*(<id>, ...)
20 * In certain use cases (high-resolution dual pipe), one single CTL can be
37 /* pending flush_mask bits */
44 /* when do CTL registers need to be flushed? (mask of trigger bits) */
49 /* True if the current CTL has FLUSH bits pending for single FLUSH. */
62 /* to filter out non-present bits in the current hardware config */
77 struct msm_drm_private *priv = ctl_mgr->dev->dev_private; in get_kms()
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/linux-6.12.1/drivers/gpu/drm/vc4/
Dvc4_kms.c1 // SPDX-License-Identifier: GPL-2.0-only
49 struct drm_device *dev = state->dev; in vc4_get_ctm_state()
54 ret = drm_modeset_lock(&vc4->ctm_state_lock, state->acquire_ctx); in vc4_get_ctm_state()
70 state = kmemdup(obj->state, sizeof(*state), GFP_KERNEL); in vc4_ctm_duplicate_state()
74 __drm_atomic_helper_private_obj_duplicate_state(obj, &state->base); in vc4_ctm_duplicate_state()
76 return &state->base; in vc4_ctm_duplicate_state()
96 drm_atomic_private_obj_fini(&vc4->ctm_manager); in vc4_ctm_obj_fini()
103 drm_modeset_lock_init(&vc4->ctm_state_lock); in vc4_ctm_obj_init()
107 return -ENOMEM; in vc4_ctm_obj_init()
109 drm_atomic_private_obj_init(&vc4->base, &vc4->ctm_manager, &ctm_state->base, in vc4_ctm_obj_init()
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/linux-6.12.1/include/xen/interface/io/
Ddisplif.h1 /* SPDX-License-Identifier: MIT */
7 * Copyright (C) 2016-2017 EPAM Systems Inc.
32 * sophisticated use-cases than a framebuffer device can handle. At the
42 * Note: display resolution (XenStore's "resolution" property) defines
43 * visible area of the virtual display. At the same time resolution of
45 * or bigger than the visible area. This is to enable use-cases, where backend
46 * may do some post-processing of the display and frame buffers supplied,
63 * Front->back notifications: when enqueuing a new request, sending a
65 * hold-off mechanism provided by the ring macros). Backends must set
68 * Back->front notifications: when enqueuing a new response, sending a
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/linux-6.12.1/sound/pci/hda/
Dhda_controller.c1 // SPDX-License-Identifier: GPL-2.0-or-later
21 /* for art-tsc conversion */
51 /* release the assigned stream */
61 return &apcm->info->stream[substream->stream]; in to_hda_pcm_stream()
71 if (!hinfo->ops.get_delay) in azx_adjust_codec_delay()
74 codec_frames = hinfo->ops.get_delay(hinfo, apcm->codec, substream); in azx_adjust_codec_delay()
76 substream->runtime->rate); in azx_adjust_codec_delay()
78 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) in azx_adjust_codec_delay()
81 return (nsec > codec_nsecs) ? nsec - codec_nsecs : 0; in azx_adjust_codec_delay()
92 struct azx *chip = apcm->chip; in azx_pcm_close()
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/linux-6.12.1/drivers/iio/adc/
Dstm32-adc.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
12 #include <linux/dma-mapping.h>
16 #include <linux/iio/timer/stm32-lptim-trigger.h>
17 #include <linux/iio/timer/stm32-timer-trigger.h>
26 #include <linux/nvmem-consumer.h>
31 #include "stm32-adc-core.h"
33 /* Number of linear calibration shadow registers / LINCALRDYW control bits */
58 /* extsel - trigger mux selection value */
84 STM32_ADC_INT_CH_NONE = -1,
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/linux-6.12.1/Documentation/sound/designs/
Dmidi-2.0.rst12 - Support of Universal MIDI Packet (UMP)
13 - Support of MIDI 2.0 protocol messages
14 - Transparent conversions between UMP and legacy MIDI 1.0 byte stream
15 - MIDI-CI for property and profile configurations
24 resolution and more controls over the old MIDI 1.0 protocol.
26 MIDI-CI is a high-level protocol that can talk with the MIDI device
31 the encoding/decoding of MIDI protocols on UMP, while MIDI-CI is
32 supported in user-space over the standard SysEx.
65 When a device supports MIDI 2.0, the USB-audio driver probes and uses
69 `midi2_enable=0` option to snd-usb-audio driver module, too.
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/linux-6.12.1/kernel/sched/
Dsched.h1 /* SPDX-License-Identifier: GPL-2.0 */
119 * Asymmetric CPU capacity bits
130 #define cpu_capacity_span(asym_data) to_cpumask((asym_data)->cpus)
133 * Helpers for converting nanosecond timing to jiffy resolution
138 * Increase resolution of nice-level calculations for 64-bit architectures.
139 * The extra resolution improves shares distribution and load balancing of
140 * low-weight task groups (eg. nice +19 on an autogroup), deeper task-group
141 * hierarchies, especially on larger systems. This is not a user-visible change
142 * and does not change the user-interface for setting shares/weights.
144 * We increase resolution only if we have enough bits to allow this increased
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/linux-6.12.1/drivers/hid/
Dhid-nintendo.c1 // SPDX-License-Identifier: GPL-2.0+
3 * HID driver for Nintendo Switch Joy-Cons and Pro Controllers
5 * Copyright (c) 2019-2021 Daniel J. Ogorchock <djogorchock@gmail.com>
12 * https://gitlab.com/pjranki/joycon-linux-kernel (Peter Rankin)
16 * hid-wiimote kernel hid driver
17 * hid-logitech-hidpp driver
18 * hid-sony driver
20 * This driver supports the Nintendo Switch Joy-Cons and Pro Controllers. The
31 #include "hid-ids.h"
120 (JC_CAL_USR_LEFT_DATA_END - JC_CAL_USR_LEFT_DATA_ADDR + 1)
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Dhid-input.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2000-2001 Vojtech Pavlik
4 * Copyright (c) 2006-2010 Jiri Kosina
12 * e-mail - mail your message to <vojtech@ucw.cz>, or by paper mail:
21 #include <linux/hid-debug.h>
23 #include "hid-ids.h"
49 } hid_hat_to_axis[] = {{ 0, 0}, { 0,-1}, { 1,-1}, { 1, 0}, { 1, 1}, { 0, 1}, {-1, 1}, {-1, 0}, {-1…
62 * hid-input will convert this list into priorities:
67 * hid-input will then shift the priority by 8 bits to leave some space
71 * defined in the next 8 bits (defined by 0xff - slot).
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