Searched refs:SOC_RESET_CONTROL_ADDRESS (Results 1 – 10 of 10) sorted by relevance
91 #if !defined(SOC_RESET_CONTROL_ADDRESS)92 #define SOC_RESET_CONTROL_ADDRESS ATH_UNSUPPORTED_REG_OFFSET macro290 .d_SOC_RESET_CONTROL_ADDRESS = SOC_RESET_CONTROL_ADDRESS,
159 #define SOC_RESET_CONTROL_ADDRESS (scn->targetdef->d_SOC_RESET_CONTROL_ADDRESS) macro
161 #define SOC_RESET_CONTROL_ADDRESS (scn->targetdef->d_SOC_RESET_CONTROL_ADDRESS) macro
74 #define SOC_RESET_CONTROL_OFFSET SOC_RESET_CONTROL_ADDRESS
75 #define SOC_RESET_CONTROL_OFFSET SOC_RESET_CONTROL_ADDRESS
78 #define SOC_RESET_CONTROL_OFFSET SOC_RESET_CONTROL_ADDRESS
675 SOC_RESET_CONTROL_ADDRESS)); in hif_pci_device_warm_reset()678 (RTC_SOC_BASE_ADDRESS | SOC_RESET_CONTROL_ADDRESS)), in hif_pci_device_warm_reset()683 SOC_RESET_CONTROL_ADDRESS)); in hif_pci_device_warm_reset()689 SOC_RESET_CONTROL_ADDRESS), val); in hif_pci_device_warm_reset()693 SOC_RESET_CONTROL_ADDRESS)); in hif_pci_device_warm_reset()705 SOC_RESET_CONTROL_ADDRESS)); in hif_pci_device_warm_reset()708 SOC_RESET_CONTROL_ADDRESS), val); in hif_pci_device_warm_reset()712 SOC_RESET_CONTROL_ADDRESS)); in hif_pci_device_warm_reset()
357 #define SOC_RESET_CONTROL_ADDRESS (scn->targetdef->d_SOC_RESET_CONTROL_ADDRESS) macro
447 #define SOC_RESET_CONTROL_ADDRESS \ macro
31 #define SOC_RESET_CONTROL_ADDRESS 0x00000000 macro