Searched refs:SOC_CORE_BASE_ADDRESS (Results 1 – 25 of 28) sorted by relevance
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271 (SOC_CORE_BASE_ADDRESS | in pci_dispatch_interrupt()276 (SOC_CORE_BASE_ADDRESS | in pci_dispatch_interrupt()327 (SOC_CORE_BASE_ADDRESS | in hif_pci_legacy_ce_interrupt_handler()331 (SOC_CORE_BASE_ADDRESS | PCIE_INTR_CLR_ADDRESS), in hif_pci_legacy_ce_interrupt_handler()346 (SOC_CORE_BASE_ADDRESS | in hif_pci_legacy_ce_interrupt_handler()632 (SOC_CORE_BASE_ADDRESS | in hif_pci_device_warm_reset()635 (SOC_CORE_BASE_ADDRESS | PCIE_INTR_CAUSE_ADDRESS), val); in hif_pci_device_warm_reset()638 (SOC_CORE_BASE_ADDRESS | CPU_INTR_ADDRESS)); in hif_pci_device_warm_reset()643 (SOC_CORE_BASE_ADDRESS | in hif_pci_device_warm_reset()646 (SOC_CORE_BASE_ADDRESS | PCIE_INTR_ENABLE_ADDRESS)), 0); in hif_pci_device_warm_reset()[all …]
51 #define FW_EVENT_PENDING_ADDRESS (SOC_CORE_BASE_ADDRESS+SCRATCH_3_ADDRESS)71 #define SCRATCH_BASE_ADDRESS SOC_CORE_BASE_ADDRESS
89 #define SCRATCH_BASE_ADDRESS SOC_CORE_BASE_ADDRESS
90 #define SCRATCH_BASE_ADDRESS SOC_CORE_BASE_ADDRESS
93 #define SCRATCH_BASE_ADDRESS SOC_CORE_BASE_ADDRESS
87 #define SOC_CORE_BASE_ADDRESS MISSING macro
89 #define SOC_CORE_BASE_ADDRESS MISSING macro
91 #define SOC_CORE_BASE_ADDRESS MISSING macro
88 #define SOC_CORE_BASE_ADDRESS MISSING macro
90 #define SOC_CORE_BASE_ADDRESS MISSING macro
86 #define SOC_CORE_BASE_ADDRESS MISSING macro
74 #if !defined(SOC_CORE_BASE_ADDRESS)75 #define SOC_CORE_BASE_ADDRESS ATH_UNSUPPORTED_REG_OFFSET macro255 .d_SOC_CORE_BASE_ADDRESS = SOC_CORE_BASE_ADDRESS,
150 #define SOC_CORE_BASE_ADDRESS (scn->targetdef->d_SOC_CORE_BASE_ADDRESS) macro
36 #define SOC_CORE_BASE_ADDRESS 0x00009000 macro
72 (SOC_CORE_BASE_ADDRESS|CORE_CTRL_ADDRESS)) & 0x7ff) << 21) \