| /linux-6.12.1/sound/soc/mediatek/mt8183/ |
| D | mt8183-afe-clk.c | 54 static const char *aud_clks[CLK_NUM] = { variable
103 afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]); in mt8183_init_clock()
106 __func__, aud_clks[i], in mt8183_init_clock()
123 __func__, aud_clks[CLK_INFRA_SYS_AUDIO], ret); in mt8183_afe_enable_clock()
130 __func__, aud_clks[CLK_MUX_AUDIO], ret); in mt8183_afe_enable_clock()
138 __func__, aud_clks[CLK_MUX_AUDIO], in mt8183_afe_enable_clock()
139 aud_clks[CLK_CLK26M], ret); in mt8183_afe_enable_clock()
146 __func__, aud_clks[CLK_MUX_AUDIOINTBUS], ret); in mt8183_afe_enable_clock()
154 __func__, aud_clks[CLK_MUX_AUDIOINTBUS], in mt8183_afe_enable_clock()
155 aud_clks[CLK_TOP_SYSPLL_D2_D4], ret); in mt8183_afe_enable_clock()
[all …]
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| /linux-6.12.1/sound/soc/mediatek/mt8186/ |
| D | mt8186-afe-clk.c | 16 static const char *aud_clks[CLK_NUM] = { variable
83 __func__, aud_clks[CLK_MUX_AUDIOINTBUS], in mt8186_set_audio_int_bus_parent()
84 aud_clks[clk_id], ret); in mt8186_set_audio_int_bus_parent()
100 __func__, aud_clks[CLK_TOP_MUX_AUD_1], ret); in apll1_mux_setting()
107 __func__, aud_clks[CLK_TOP_MUX_AUD_1], in apll1_mux_setting()
108 aud_clks[CLK_TOP_APLL1_CK], ret); in apll1_mux_setting()
116 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG1], ret); in apll1_mux_setting()
123 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
124 aud_clks[CLK_TOP_APLL1_D8], ret); in apll1_mux_setting()
132 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
[all …]
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| D | mt8186-audsys-clk.c | 50 static const struct afe_gate aud_clks[CLK_AUD_NR_CLK] = { variable
124 for (i = 0; i < ARRAY_SIZE(aud_clks); i++) { in mt8186_audsys_clk_register()
125 const struct afe_gate *gate = &aud_clks[i]; in mt8186_audsys_clk_register()
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| /linux-6.12.1/sound/soc/mediatek/mt8192/ |
| D | mt8192-afe-clk.c | 17 static const char *aud_clks[CLK_NUM] = { variable
73 __func__, aud_clks[CLK_MUX_AUDIOINTBUS], in mt8192_set_audio_int_bus_parent()
74 aud_clks[clk_id], ret); in mt8192_set_audio_int_bus_parent()
89 __func__, aud_clks[CLK_TOP_MUX_AUD_1], ret); in apll1_mux_setting()
96 __func__, aud_clks[CLK_TOP_MUX_AUD_1], in apll1_mux_setting()
97 aud_clks[CLK_TOP_APLL1_CK], ret); in apll1_mux_setting()
105 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG1], ret); in apll1_mux_setting()
112 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
113 aud_clks[CLK_TOP_APLL1_D4], ret); in apll1_mux_setting()
121 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
[all …]
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| /linux-6.12.1/sound/soc/mediatek/mt6797/ |
| D | mt6797-afe-clk.c | 24 static const char *aud_clks[CLK_NUM] = { variable
45 afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]); in mt6797_init_clock()
48 __func__, aud_clks[i], in mt6797_init_clock()
65 __func__, aud_clks[CLK_INFRA_SYS_AUD], ret); in mt6797_afe_enable_clock()
72 __func__, aud_clks[CLK_INFRA_SYS_AUD_26M], ret); in mt6797_afe_enable_clock()
79 __func__, aud_clks[CLK_TOP_MUX_AUD], ret); in mt6797_afe_enable_clock()
87 __func__, aud_clks[CLK_TOP_MUX_AUD], in mt6797_afe_enable_clock()
88 aud_clks[CLK_CLK26M], ret); in mt6797_afe_enable_clock()
95 __func__, aud_clks[CLK_TOP_MUX_AUD_BUS], ret); in mt6797_afe_enable_clock()
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| /linux-6.12.1/drivers/clk/mediatek/ |
| D | clk-mt8516-aud.c | 27 static const struct mtk_gate aud_clks[] = { variable
44 .clks = aud_clks,
45 .num_clks = ARRAY_SIZE(aud_clks),
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| D | clk-mt8167-aud.c | 28 static const struct mtk_gate aud_clks[] = { variable
45 .clks = aud_clks,
46 .num_clks = ARRAY_SIZE(aud_clks),
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| D | clk-mt8192-aud.c | 42 static const struct mtk_gate aud_clks[] = { variable
81 .clks = aud_clks,
82 .num_clks = ARRAY_SIZE(aud_clks),
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| /linux-6.12.1/sound/soc/mediatek/mt8365/ |
| D | mt8365-afe-clk.c | 17 static const char *aud_clks[MT8365_CLK_NUM] = { variable
39 for (i = 0; i < ARRAY_SIZE(aud_clks); i++) { in mt8365_afe_init_audio_clk()
40 afe_priv->clocks[i] = devm_clk_get(afe->dev, aud_clks[i]); in mt8365_afe_init_audio_clk()
43 __func__, aud_clks[i]); in mt8365_afe_init_audio_clk()
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| /linux-6.12.1/sound/soc/mediatek/mt8188/ |
| D | mt8188-audsys-clk.c | 60 static const struct afe_gate aud_clks[CLK_AUD_NR_CLK] = { variable
178 for (i = 0; i < ARRAY_SIZE(aud_clks); i++) { in mt8188_audsys_clk_register()
179 const struct afe_gate *gate = &aud_clks[i]; in mt8188_audsys_clk_register()
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| D | mt8188-afe-clk.c | 18 static const char *aud_clks[MT8188_CLK_NUM] = { variable
417 afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]); in mt8188_afe_init_clock()
420 __func__, aud_clks[i], in mt8188_afe_init_clock()
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| /linux-6.12.1/sound/soc/mediatek/mt8195/ |
| D | mt8195-audsys-clk.c | 60 static const struct afe_gate aud_clks[CLK_AUD_NR_CLK] = { variable
188 for (i = 0; i < ARRAY_SIZE(aud_clks); i++) { in mt8195_audsys_clk_register()
189 const struct afe_gate *gate = &aud_clks[i]; in mt8195_audsys_clk_register()
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| D | mt8195-afe-clk.c | 17 static const char *aud_clks[MT8195_CLK_NUM] = { variable
391 afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]); in mt8195_afe_init_clock()
394 __func__, aud_clks[i], in mt8195_afe_init_clock()
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| /linux-6.12.1/sound/soc/mediatek/mt8173/ |
| D | mt8173-afe-pcm.c | 688 static const char *aud_clks[MT8173_CLK_NUM] = { variable
1036 for (i = 0; i < ARRAY_SIZE(aud_clks); i++) { in mt8173_afe_init_audio_clk()
1037 afe_priv->clocks[i] = devm_clk_get(afe->dev, aud_clks[i]); in mt8173_afe_init_audio_clk()
1040 __func__, aud_clks[i]); in mt8173_afe_init_audio_clk()
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| /linux-6.12.1/sound/soc/mediatek/mt7986/ |
| D | mt7986-afe-pcm.c | 47 static const char *aud_clks[CLK_NUM] = { variable
333 afe_priv->clks[i].id = aud_clks[i]; in mt7986_init_clock()
|