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Searched refs:SCLK_GMAC1_RGMII_SPEED (Results 1 – 21 of 21) sorted by relevance

/linux-6.12.1/arch/arm64/boot/dts/rockchip/
Drk3566-radxa-zero-3e.dts19 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
Drk3568-fastrhino-r68s.dts47 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
Drk3566-radxa-cm3-io.dts96 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
Drk3566-soquartz.dtsi125 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
126 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
Drk3566-roc-pc.dts175 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
176 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
Drk3566-quartz64-b.dts176 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
177 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
Drk3566-quartz64-a.dts268 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
269 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
Drk3568-mecsbc.dts136 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
Drk3566-box-demo.dts242 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
Drk3566-lubancat-1.dts427 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
Drk3566-odroid-m1s.dts179 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
Drk3568-roc-pc.dts200 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
Drk3566-orangepi-3b.dtsi157 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
Drk3566-rock-3c.dts191 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
Drk3568-lubancat-2.dts487 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
Drk3568-evb1-v10.dts205 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
Drk3568-rock-3b.dts202 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
Drk3568-bpi-r2-pro.dts234 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
Drk3568-rock-3a.dts260 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
/linux-6.12.1/include/dt-bindings/clock/
Drk3568-cru.h455 #define SCLK_GMAC1_RGMII_SPEED 391 macro
/linux-6.12.1/drivers/clk/rockchip/
Dclk-rk3568.c987 MUX(SCLK_GMAC1_RGMII_SPEED, "clk_gmac1_rgmii_speed", mux_gmac1_rgmii_speed_p, 0,