1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3/dts-v1/;
4
5#include <dt-bindings/gpio/gpio.h>
6#include <dt-bindings/pinctrl/rockchip.h>
7#include <dt-bindings/soc/rockchip,vop2.h>
8#include "rk3566.dtsi"
9
10/ {
11	model = "Pine64 Quartz64 Model A";
12	compatible = "pine64,quartz64-a", "rockchip,rk3566";
13
14	aliases {
15		ethernet0 = &gmac1;
16		mmc0 = &sdmmc0;
17		mmc1 = &sdhci;
18	};
19
20	chosen: chosen {
21		stdout-path = "serial2:1500000n8";
22	};
23
24	gmac1_clkin: external-gmac1-clock {
25		compatible = "fixed-clock";
26		clock-frequency = <125000000>;
27		clock-output-names = "gmac1_clkin";
28		#clock-cells = <0>;
29	};
30
31	fan: gpio_fan {
32		compatible = "gpio-fan";
33		gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
34		gpio-fan,speed-map =
35				<   0 0>,
36				<4500 1>;
37		pinctrl-names = "default";
38		pinctrl-0 = <&fan_en_h>;
39		#cooling-cells = <2>;
40	};
41
42	hdmi-con {
43		compatible = "hdmi-connector";
44		type = "a";
45
46		port {
47			hdmi_con_in: endpoint {
48				remote-endpoint = <&hdmi_out_con>;
49			};
50		};
51	};
52
53	leds {
54		compatible = "gpio-leds";
55
56		led-work {
57			label = "work-led";
58			default-state = "off";
59			gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
60			pinctrl-names = "default";
61			pinctrl-0 = <&work_led_enable_h>;
62			retain-state-suspended;
63		};
64
65		led-diy {
66			label = "diy-led";
67			default-state = "on";
68			gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
69			linux,default-trigger = "heartbeat";
70			pinctrl-names = "default";
71			pinctrl-0 = <&diy_led_enable_h>;
72			retain-state-suspended;
73		};
74	};
75
76	rk817-sound {
77		compatible = "simple-audio-card";
78		simple-audio-card,format = "i2s";
79		simple-audio-card,name = "Analog RK817";
80		simple-audio-card,mclk-fs = <256>;
81
82		simple-audio-card,cpu {
83			sound-dai = <&i2s1_8ch>;
84		};
85
86		simple-audio-card,codec {
87			sound-dai = <&rk817>;
88		};
89	};
90
91	sdio_pwrseq: sdio-pwrseq {
92		compatible = "mmc-pwrseq-simple";
93		clocks = <&rk817 1>;
94		clock-names = "ext_clock";
95		pinctrl-names = "default";
96		pinctrl-0 = <&wifi_enable_h>;
97		post-power-on-delay-ms = <100>;
98		power-off-delay-us = <5000000>;
99		reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>;
100	};
101
102	spdif_dit: spdif-dit {
103		compatible = "linux,spdif-dit";
104		#sound-dai-cells = <0>;
105	};
106
107	spdif_sound: spdif-sound {
108		compatible = "simple-audio-card";
109		simple-audio-card,name = "SPDIF";
110
111		simple-audio-card,cpu {
112			sound-dai = <&spdif>;
113		};
114
115		simple-audio-card,codec {
116			sound-dai = <&spdif_dit>;
117		};
118	};
119
120	vcc12v_dcin: vcc12v_dcin {
121		compatible = "regulator-fixed";
122		regulator-name = "vcc12v_dcin";
123		regulator-always-on;
124		regulator-boot-on;
125		regulator-min-microvolt = <12000000>;
126		regulator-max-microvolt = <12000000>;
127	};
128
129	/* vbus feeds the rk817 usb input.
130	 * With no battery attached, also feeds vcc_bat+
131	 * via ON/OFF_BAT jumper
132	 */
133	vbus: vbus {
134		compatible = "regulator-fixed";
135		regulator-name = "vbus";
136		regulator-always-on;
137		regulator-boot-on;
138		regulator-min-microvolt = <5000000>;
139		regulator-max-microvolt = <5000000>;
140		vin-supply = <&vcc12v_dcin>;
141	};
142
143	vcc3v3_pcie_p: vcc3v3-pcie-p-regulator {
144		compatible = "regulator-fixed";
145		enable-active-high;
146		gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
147		pinctrl-names = "default";
148		pinctrl-0 = <&pcie_enable_h>;
149		regulator-name = "vcc3v3_pcie_p";
150		regulator-min-microvolt = <3300000>;
151		regulator-max-microvolt = <3300000>;
152		vin-supply = <&vcc_3v3>;
153	};
154
155	vcc5v0_usb: vcc5v0_usb {
156		compatible = "regulator-fixed";
157		regulator-name = "vcc5v0_usb";
158		regulator-always-on;
159		regulator-boot-on;
160		regulator-min-microvolt = <5000000>;
161		regulator-max-microvolt = <5000000>;
162		vin-supply = <&vcc12v_dcin>;
163	};
164
165	/* all four ports are controlled by one gpio
166	 * the host ports are sourced from vcc5v0_usb
167	 * the otg port is sourced from vcc5v0_midu
168	 */
169	vcc5v0_usb20_host: vcc5v0_usb20_host {
170		compatible = "regulator-fixed";
171		enable-active-high;
172		gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
173		pinctrl-names = "default";
174		pinctrl-0 = <&vcc5v0_usb20_host_en>;
175		regulator-name = "vcc5v0_usb20_host";
176		regulator-min-microvolt = <5000000>;
177		regulator-max-microvolt = <5000000>;
178		vin-supply = <&vcc5v0_usb>;
179	};
180
181	vcc5v0_usb20_otg: vcc5v0_usb20_otg {
182		compatible = "regulator-fixed";
183		enable-active-high;
184		gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
185		regulator-name = "vcc5v0_usb20_otg";
186		regulator-min-microvolt = <5000000>;
187		regulator-max-microvolt = <5000000>;
188		vin-supply = <&dcdc_boost>;
189	};
190
191	vcc3v3_sd: vcc3v3_sd {
192		compatible = "regulator-fixed";
193		gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
194		pinctrl-names = "default";
195		pinctrl-0 = <&vcc_sd_h>;
196		regulator-boot-on;
197		regulator-name = "vcc3v3_sd";
198		regulator-min-microvolt = <3300000>;
199		regulator-max-microvolt = <3300000>;
200		vin-supply = <&vcc_3v3>;
201	};
202
203	/* sourced from vbus and vcc_bat+ via rk817 sw5 */
204	vcc_sys: vcc_sys {
205		compatible = "regulator-fixed";
206		regulator-name = "vcc_sys";
207		regulator-always-on;
208		regulator-boot-on;
209		regulator-min-microvolt = <4400000>;
210		regulator-max-microvolt = <4400000>;
211		vin-supply = <&vbus>;
212	};
213
214	/* sourced from vcc_sys, sdio module operates internally at 3.3v */
215	vcc_wl: vcc_wl {
216		compatible = "regulator-fixed";
217		regulator-name = "vcc_wl";
218		regulator-always-on;
219		regulator-boot-on;
220		regulator-min-microvolt = <3300000>;
221		regulator-max-microvolt = <3300000>;
222		vin-supply = <&vcc_sys>;
223	};
224};
225
226&combphy1 {
227	status = "okay";
228};
229
230&combphy2 {
231	status = "okay";
232};
233
234&cpu0 {
235	cpu-supply = <&vdd_cpu>;
236};
237
238&cpu1 {
239	cpu-supply = <&vdd_cpu>;
240};
241
242&cpu2 {
243	cpu-supply = <&vdd_cpu>;
244};
245
246&cpu3 {
247	cpu-supply = <&vdd_cpu>;
248};
249
250&cpu_thermal {
251	trips {
252		cpu_hot: cpu_hot {
253			temperature = <55000>;
254			hysteresis = <2000>;
255			type = "active";
256		};
257	};
258
259	cooling-maps {
260		map1 {
261			trip = <&cpu_hot>;
262			cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
263		};
264	};
265};
266
267&gmac1 {
268	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
269	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
270	clock_in_out = "input";
271	phy-supply = <&vcc_3v3>;
272	phy-mode = "rgmii";
273	pinctrl-names = "default";
274	pinctrl-0 = <&gmac1m0_miim
275		     &gmac1m0_tx_bus2
276		     &gmac1m0_rx_bus2
277		     &gmac1m0_rgmii_clk
278		     &gmac1m0_clkinout
279		     &gmac1m0_rgmii_bus>;
280	snps,reset-gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
281	snps,reset-active-low;
282	/* Reset time is 20ms, 100ms for rtl8211f */
283	snps,reset-delays-us = <0 20000 100000>;
284	tx_delay = <0x30>;
285	rx_delay = <0x10>;
286	phy-handle = <&rgmii_phy1>;
287	status = "okay";
288};
289
290&gpu {
291	mali-supply = <&vdd_gpu>;
292	status = "okay";
293};
294
295&hdmi {
296	avdd-0v9-supply = <&vdda_0v9>;
297	avdd-1v8-supply = <&vcc_1v8>;
298	status = "okay";
299};
300
301&hdmi_in {
302	hdmi_in_vp0: endpoint {
303		remote-endpoint = <&vp0_out_hdmi>;
304	};
305};
306
307&hdmi_out {
308	hdmi_out_con: endpoint {
309		remote-endpoint = <&hdmi_con_in>;
310	};
311};
312
313&hdmi_sound {
314	status = "okay";
315};
316
317&i2c0 {
318	status = "okay";
319
320	vdd_cpu: regulator@1c {
321		compatible = "tcs,tcs4525";
322		reg = <0x1c>;
323		fcs,suspend-voltage-selector = <1>;
324		regulator-name = "vdd_cpu";
325		regulator-min-microvolt = <800000>;
326		regulator-max-microvolt = <1150000>;
327		regulator-ramp-delay = <2300>;
328		regulator-always-on;
329		regulator-boot-on;
330		vin-supply = <&vcc_sys>;
331
332		regulator-state-mem {
333			regulator-off-in-suspend;
334		};
335	};
336
337	rk817: pmic@20 {
338		compatible = "rockchip,rk817";
339		reg = <0x20>;
340		interrupt-parent = <&gpio0>;
341		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
342		assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
343		assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
344		clock-names = "mclk";
345		clocks = <&cru I2S1_MCLKOUT_TX>;
346		clock-output-names = "rk808-clkout1", "rk808-clkout2";
347		#clock-cells = <1>;
348		pinctrl-names = "default";
349		pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>;
350		rockchip,system-power-controller;
351		#sound-dai-cells = <0>;
352		wakeup-source;
353
354		vcc1-supply = <&vcc_sys>;
355		vcc2-supply = <&vcc_sys>;
356		vcc3-supply = <&vcc_sys>;
357		vcc4-supply = <&vcc_sys>;
358		vcc5-supply = <&vcc_sys>;
359		vcc6-supply = <&vcc_sys>;
360		vcc7-supply = <&vcc_sys>;
361		vcc8-supply = <&vcc_sys>;
362		vcc9-supply = <&dcdc_boost>;
363
364		regulators {
365			vdd_logic: DCDC_REG1 {
366				regulator-always-on;
367				regulator-boot-on;
368				regulator-min-microvolt = <500000>;
369				regulator-max-microvolt = <1350000>;
370				regulator-ramp-delay = <6001>;
371				regulator-initial-mode = <0x2>;
372				regulator-name = "vdd_logic";
373				regulator-state-mem {
374					regulator-on-in-suspend;
375					regulator-suspend-microvolt = <900000>;
376				};
377			};
378
379			vdd_gpu: DCDC_REG2 {
380				regulator-always-on;
381				regulator-boot-on;
382				regulator-min-microvolt = <500000>;
383				regulator-max-microvolt = <1350000>;
384				regulator-ramp-delay = <6001>;
385				regulator-initial-mode = <0x2>;
386				regulator-name = "vdd_gpu";
387					regulator-state-mem {
388					regulator-off-in-suspend;
389				};
390			};
391
392			vcc_ddr: DCDC_REG3 {
393				regulator-always-on;
394				regulator-boot-on;
395				regulator-initial-mode = <0x2>;
396				regulator-name = "vcc_ddr";
397				regulator-state-mem {
398					regulator-on-in-suspend;
399				};
400			};
401
402			vcc_3v3: DCDC_REG4 {
403				regulator-always-on;
404				regulator-boot-on;
405				regulator-min-microvolt = <3300000>;
406				regulator-max-microvolt = <3300000>;
407				regulator-initial-mode = <0x2>;
408				regulator-name = "vcc_3v3";
409				regulator-state-mem {
410					regulator-off-in-suspend;
411				};
412			};
413
414			vcca1v8_pmu: LDO_REG1 {
415				regulator-always-on;
416				regulator-boot-on;
417				regulator-min-microvolt = <1800000>;
418				regulator-max-microvolt = <1800000>;
419				regulator-name = "vcca1v8_pmu";
420				regulator-state-mem {
421					regulator-on-in-suspend;
422					regulator-suspend-microvolt = <1800000>;
423				};
424			};
425
426			vdda_0v9: LDO_REG2 {
427				regulator-always-on;
428				regulator-boot-on;
429				regulator-min-microvolt = <900000>;
430				regulator-max-microvolt = <900000>;
431				regulator-name = "vdda_0v9";
432				regulator-state-mem {
433					regulator-off-in-suspend;
434				};
435			};
436
437			vdda0v9_pmu: LDO_REG3 {
438				regulator-always-on;
439				regulator-boot-on;
440				regulator-min-microvolt = <900000>;
441				regulator-max-microvolt = <900000>;
442				regulator-name = "vdda0v9_pmu";
443				regulator-state-mem {
444					regulator-on-in-suspend;
445					regulator-suspend-microvolt = <900000>;
446				};
447			};
448
449			vccio_acodec: LDO_REG4 {
450				regulator-always-on;
451				regulator-boot-on;
452				regulator-min-microvolt = <3300000>;
453				regulator-max-microvolt = <3300000>;
454				regulator-name = "vccio_acodec";
455				regulator-state-mem {
456					regulator-off-in-suspend;
457				};
458			};
459
460			vccio_sd: LDO_REG5 {
461				regulator-always-on;
462				regulator-boot-on;
463				regulator-min-microvolt = <1800000>;
464				regulator-max-microvolt = <3300000>;
465				regulator-name = "vccio_sd";
466				regulator-state-mem {
467					regulator-off-in-suspend;
468				};
469			};
470
471			vcc3v3_pmu: LDO_REG6 {
472				regulator-always-on;
473				regulator-boot-on;
474				regulator-min-microvolt = <3300000>;
475				regulator-max-microvolt = <3300000>;
476				regulator-name = "vcc3v3_pmu";
477				regulator-state-mem {
478					regulator-on-in-suspend;
479					regulator-suspend-microvolt = <3300000>;
480				};
481			};
482
483			vcc_1v8: LDO_REG7 {
484				regulator-always-on;
485				regulator-boot-on;
486				regulator-min-microvolt = <1800000>;
487				regulator-max-microvolt = <1800000>;
488				regulator-name = "vcc_1v8";
489				regulator-state-mem {
490					regulator-off-in-suspend;
491				};
492			};
493
494			vcc1v8_dvp: LDO_REG8 {
495				regulator-always-on;
496				regulator-boot-on;
497				regulator-min-microvolt = <1800000>;
498				regulator-max-microvolt = <1800000>;
499				regulator-name = "vcc1v8_dvp";
500				regulator-state-mem {
501					regulator-off-in-suspend;
502				};
503			};
504
505			vcc2v8_dvp: LDO_REG9 {
506				regulator-always-on;
507				regulator-boot-on;
508				regulator-min-microvolt = <2800000>;
509				regulator-max-microvolt = <2800000>;
510				regulator-name = "vcc2v8_dvp";
511				regulator-state-mem {
512					regulator-off-in-suspend;
513				};
514			};
515
516			dcdc_boost: BOOST {
517				regulator-always-on;
518				regulator-boot-on;
519				regulator-min-microvolt = <5000000>;
520				regulator-max-microvolt = <5000000>;
521				regulator-name = "boost";
522				regulator-state-mem {
523					regulator-off-in-suspend;
524				};
525			};
526
527			otg_switch: OTG_SWITCH {
528				regulator-name = "otg_switch";
529				regulator-state-mem {
530					regulator-off-in-suspend;
531				};
532			};
533		};
534	};
535};
536
537/* i2c3 is exposed on con40
538 * pin 3 - i2c3_sda_m0, pullup to vcc_3v3
539 * pin 5 - i2c3_scl_m0, pullup to vcc_3v3
540 */
541&i2c3 {
542	status = "okay";
543};
544
545&i2s0_8ch {
546	status = "okay";
547};
548
549&i2s1_8ch {
550	pinctrl-names = "default";
551	pinctrl-0 = <&i2s1m0_sclktx
552		     &i2s1m0_lrcktx
553		     &i2s1m0_sdi0
554		     &i2s1m0_sdo0>;
555	rockchip,trcm-sync-tx-only;
556	status = "okay";
557};
558
559&mdio1 {
560	rgmii_phy1: ethernet-phy@0 {
561		compatible = "ethernet-phy-ieee802.3-c22";
562		reg = <0>;
563	};
564};
565
566&pcie2x1 {
567	pinctrl-names = "default";
568	pinctrl-0 = <&pcie_reset_h>;
569	reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
570	vpcie3v3-supply = <&vcc3v3_pcie_p>;
571	status = "okay";
572};
573
574&pinctrl {
575	bt {
576		bt_enable_h: bt-enable-h {
577			rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
578		};
579
580		bt_host_wake_l: bt-host-wake-l {
581			rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
582		};
583
584		bt_wake_l: bt-wake-l {
585			rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
586		};
587	};
588
589	fan {
590		fan_en_h: fan-en-h {
591			rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
592		};
593	};
594
595	leds {
596		work_led_enable_h: work-led-enable-h {
597			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
598		};
599
600		diy_led_enable_h: diy-led-enable-h {
601			rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
602		};
603	};
604
605	pcie {
606		pcie_enable_h: pcie-enable-h {
607			rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
608		};
609
610		pcie_reset_h: pcie-reset-h {
611			rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
612		};
613	};
614
615	pmic {
616		pmic_int_l: pmic-int-l {
617			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
618		};
619	};
620
621	usb2 {
622		vcc5v0_usb20_host_en: vcc5v0-usb20-host-en {
623			rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
624		};
625	};
626
627	sdio-pwrseq {
628		wifi_enable_h: wifi-enable-h {
629			rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
630		};
631	};
632
633	vcc_sd {
634		vcc_sd_h: vcc-sd-h {
635			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
636		};
637	};
638};
639
640&pmu_io_domains {
641	pmuio1-supply = <&vcc3v3_pmu>;
642	pmuio2-supply = <&vcc3v3_pmu>;
643	vccio1-supply = <&vccio_acodec>;
644	vccio2-supply = <&vcc_1v8>;
645	vccio3-supply = <&vccio_sd>;
646	vccio4-supply = <&vcc_1v8>;
647	vccio5-supply = <&vcc_3v3>;
648	vccio6-supply = <&vcc1v8_dvp>;
649	vccio7-supply = <&vcc_3v3>;
650	status = "okay";
651};
652
653&sdhci {
654	bus-width = <8>;
655	mmc-hs200-1_8v;
656	non-removable;
657	vmmc-supply = <&vcc_3v3>;
658	vqmmc-supply = <&vcc_1v8>;
659	status = "okay";
660};
661
662&sdmmc0 {
663	bus-width = <4>;
664	cap-sd-highspeed;
665	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
666	disable-wp;
667	pinctrl-names = "default";
668	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
669	sd-uhs-sdr104;
670	vmmc-supply = <&vcc3v3_sd>;
671	vqmmc-supply = <&vccio_sd>;
672	status = "okay";
673};
674
675&sdmmc1 {
676	bus-width = <4>;
677	cap-sd-highspeed;
678	cap-sdio-irq;
679	keep-power-in-suspend;
680	mmc-pwrseq = <&sdio_pwrseq>;
681	non-removable;
682	pinctrl-names = "default";
683	pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
684	sd-uhs-sdr104;
685	vmmc-supply = <&vcc_wl>;
686	vqmmc-supply = <&vcc_1v8>;
687	status = "okay";
688};
689
690&sfc {
691	pinctrl-0 = <&fspi_pins>;
692	pinctrl-names = "default";
693	#address-cells = <1>;
694	#size-cells = <0>;
695	status = "disabled";
696
697	flash@0 {
698		compatible = "jedec,spi-nor";
699		reg = <0>;
700		spi-max-frequency = <24000000>;
701		spi-rx-bus-width = <4>;
702		spi-tx-bus-width = <1>;
703	};
704};
705
706/* spdif is exposed on con40 pin 18 */
707&spdif {
708	status = "okay";
709};
710
711/* spi1 is exposed on con40
712 * pin 11 - spi1_mosi_m1
713 * pin 13 - spi1_miso_m1
714 * pin 15 - spi1_clk_m1
715 * pin 17 - spi1_cs0_m1
716 */
717&spi1 {
718	pinctrl-names = "default";
719	pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>;
720};
721
722&tsadc {
723	/* tshut mode 0:CRU 1:GPIO */
724	rockchip,hw-tshut-mode = <1>;
725	/* tshut polarity 0:LOW 1:HIGH */
726	rockchip,hw-tshut-polarity = <0>;
727	status = "okay";
728};
729
730/* uart0 is exposed on con40
731 * pin 12 - uart0_tx
732 * pin 14 - uart0_rx
733 */
734&uart0 {
735	pinctrl-names = "default";
736	pinctrl-0 = <&uart0_xfer>;
737	status = "okay";
738};
739
740&uart1 {
741	dma-names = "tx", "rx";
742	pinctrl-names = "default";
743	pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
744	status = "okay";
745	uart-has-rtscts;
746
747	bluetooth {
748		compatible = "brcm,bcm43438-bt";
749		clocks = <&rk817 1>;
750		clock-names = "lpo";
751		host-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
752		device-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
753		shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
754		pinctrl-names = "default";
755		pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
756		vbat-supply = <&vcc_sys>;
757		vddio-supply = <&vcca1v8_pmu>;
758		max-speed = <3000000>;
759	};
760};
761
762/* uart2 is exposed on con40
763 * pin 8 - uart2_tx_m0_debug
764 * pin 10 - uart2_rx_m0_debug
765 */
766&uart2 {
767	status = "okay";
768};
769
770&usb_host0_ehci {
771	status = "okay";
772};
773
774&usb_host0_ohci {
775	status = "okay";
776};
777
778&usb_host1_ehci {
779	status = "okay";
780};
781
782&usb_host1_ohci {
783	status = "okay";
784};
785
786&usb_host0_xhci {
787	dr_mode = "host";
788	status = "okay";
789};
790
791/* usb3 controller is muxed with sata1 */
792&usb_host1_xhci {
793	status = "okay";
794};
795
796&usb2phy0 {
797	status = "okay";
798};
799
800&usb2phy0_host {
801	phy-supply = <&vcc5v0_usb20_host>;
802	status = "okay";
803};
804
805&usb2phy0_otg {
806	phy-supply = <&vcc5v0_usb20_otg>;
807	status = "okay";
808};
809
810&usb2phy1 {
811	status = "okay";
812};
813
814&usb2phy1_host {
815	phy-supply = <&vcc5v0_usb20_host>;
816	status = "okay";
817};
818
819&usb2phy1_otg {
820	phy-supply = <&vcc5v0_usb20_host>;
821	status = "okay";
822};
823
824&vop {
825	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
826	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
827	status = "okay";
828};
829
830&vop_mmu {
831	status = "okay";
832};
833
834&vp0 {
835	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
836		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
837		remote-endpoint = <&hdmi_in_vp0>;
838	};
839};
840