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/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dhisilicon,hi3670-usb3.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/hisilicon,hi3670-usb3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
17 const: hisilicon,hi3670-usb-phy
19 "#phy-cells":
22 hisilicon,pericrg-syscon:
23 $ref: /schemas/types.yaml#/definitions/phandle
24 description: phandle of syscon used to control iso refclk.
[all …]
Dstarfive,jh7110-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/starfive,jh7110-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Minda Chen <minda.chen@starfivetech.com>
14 const: starfive,jh7110-pcie-phy
19 "#phy-cells":
22 starfive,sys-syscon:
23 $ref: /schemas/types.yaml#/definitions/phandle-array
25 - items:
[all …]
Dhisilicon,hi3660-usb3.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/hisilicon,hi3660-usb3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
16 const: hisilicon,hi3660-usb-phy
18 "#phy-cells":
21 hisilicon,pericrg-syscon:
22 $ref: /schemas/types.yaml#/definitions/phandle
23 description: phandle of syscon used to control iso refclk.
[all …]
Dsamsung,mipi-video-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/samsung,mipi-video-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Marek Szyprowski <m.szyprowski@samsung.com>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
15 For samsung,s5pv210-mipi-video-phy compatible PHYs the second cell in the
17 0 - MIPI CSIS 0,
18 1 - MIPI DSIM 0,
[all …]
Dsamsung,exynos5250-sata-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/samsung,exynos5250-sata-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Marek Szyprowski <m.szyprowski@samsung.com>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
16 const: samsung,exynos5250-sata-phy
21 clock-names:
23 - const: sata_phyctrl
[all …]
Ddm816x-phy.txt5 - compatible : should be "ti,dm816x-usb-phy"
6 - reg : offset and length of the PHY register set.
7 - reg-names : name for the phy registers
8 - clocks : phandle to the clock
9 - clock-names : name of the clock
10 - syscon: phandle for the syscon node to access misc registers
11 - #phy-cells : from the generic PHY bindings, must be 1
12 - syscon: phandle for the syscon node to access misc registers
16 usb_phy0: usb-phy@20 {
17 compatible = "ti,dm8168-usb-phy";
[all …]
Dphy-rockchip-usbdp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-rockchip-usbdp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Wang <frank.wang@rock-chips.com>
11 - Zhang Yubing <yubing.zhang@rock-chips.com>
16 - rockchip,rk3588-usbdp-phy
21 "#phy-cells":
24 - PHY_TYPE_USB3
25 - PHY_TYPE_DP
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Dti,omap-usb2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/ti,omap-usb2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kishon Vijay Abraham I <kishon@ti.com>
11 - Roger Quadros <rogerq@kernel.org>
16 - items:
17 - enum:
18 - ti,dra7x-usb2
19 - ti,dra7x-usb2-phy2
[all …]
Dsamsung,exynos-pcie-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/samsung,exynos-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Szyprowski <m.szyprowski@samsung.com>
11 - Jaehoon Chung <jh80.chung@samsung.com>
14 "#phy-cells":
18 const: samsung,exynos5433-pcie-phy
23 samsung,pmu-syscon:
24 $ref: /schemas/types.yaml#/definitions/phandle
[all …]
Dti-phy.txt6 - compatible: Should be one of
7 "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
8 "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
10 "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
12 "ti,control-phy-pcie" - for pcie to support external clock for pcie and to
15 "ti,control-phy-usb2-dra7" - if it has power down register like USB2 PHY on
17 "ti,control-phy-usb2-am437" - if it has power down register like USB2 PHY on
19 - reg : register ranges as listed in the reg-names property
20 - reg-names: "otghs_control" for control-phy-otghs
21 "power", "pcie_pcs" and "control_sma" for control-phy-pcie
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/pci/
Dti,am65-pci-host.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/pci/ti,am65-pci-host.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Kishon Vijay Abraham I <kishon@ti.com>
14 - $ref: /schemas/pci/pci-host-bridge.yaml#
19 - ti,am654-pcie-rc
20 - ti,keystone-pcie
25 reg-names:
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Dti,am65-pci-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/pci/ti,am65-pci-ep.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Kishon Vijay Abraham I <kishon@ti.com>
14 - $ref: pci-ep.yaml#
19 - ti,am654-pcie-ep
24 reg-names:
26 - const: app
[all …]
Dti-pci.txt4 - compatible: Should be "ti,dra7-pcie" for RC (deprecated)
5 Should be "ti,dra7-pcie-ep" for EP (deprecated)
6 Should be "ti,dra746-pcie-rc" for dra74x/dra76 in RC mode
7 Should be "ti,dra746-pcie-ep" for dra74x/dra76 in EP mode
8 Should be "ti,dra726-pcie-rc" for dra72x in RC mode
9 Should be "ti,dra726-pcie-ep" for dra72x in EP mode
10 - phys : list of PHY specifiers (used by generic PHY framework)
11 - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the
13 - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>",
15 - num-lanes as specified in ../snps,dw-pcie.yaml
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/power/reset/
Dkeystone-reset.txt14 - compatible: ti,keystone-reset
16 - ti,syscon-pll: phandle/offset pair. The phandle to syscon used to
20 - ti,syscon-dev: phandle/offset pair. The phandle to syscon used to
26 - ti,soft-reset: Boolean option indicating soft reset.
29 - ti,wdt-list: WDT list that can cause SoC reset. It's not related
40 pllctrl: pll-controller@2310000 {
41 compatible = "ti,keystone-pllctrl", "syscon";
45 devctrl: device-state-control@2620000 {
46 compatible = "ti,keystone-devctrl", "syscon";
50 rstctrl: reset-controller {
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/reset/
Dhisilicon,hi3660-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/hisilicon,hi3660-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wei Xu <xuwei5@hisilicon.com>
15 The reset controller registers are part of the system-ctl block on
21 - items:
22 - const: hisilicon,hi3660-reset
23 - items:
24 - const: hisilicon,hi3670-reset
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/arm/mediatek/
Dmediatek,mmsys.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matthias Brugger <matthias.bgg@gmail.com>
18 pattern: "^syscon@[0-9a-f]+$"
22 - items:
23 - enum:
24 - mediatek,mt2701-mmsys
25 - mediatek,mt2712-mmsys
26 - mediatek,mt6765-mmsys
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/ufs/
Dsprd,ums9620-ufs.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ufs/sprd,ums9620-ufs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Zhe Wang <zhe.wang1@unisoc.com>
13 - $ref: ufs-common.yaml
17 const: sprd,ums9620-ufs
25 clock-names:
27 - const: controller_eb
28 - const: cfg_eb
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/net/
Dti,icssg-prueth.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ti,icssg-prueth.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Md Danish Anwar <danishanwar@ti.com>
13 Ethernet based on the Programmable Real-Time Unit and Industrial
19 - ti,am642-icssg-prueth # for AM64x SoC family
20 - ti,am654-icssg-prueth # for AM65x SoC family
21 - ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0
24 $ref: /schemas/types.yaml#/definitions/phandle
[all …]
Dstm32-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/stm32-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandre Torgue <alexandre.torgue@foss.st.com>
12 - Christophe Roullier <christophe.roullier@foss.st.com>
23 - st,stm32-dwmac
24 - st,stm32mp1-dwmac
25 - st,stm32mp13-dwmac
26 - st,stm32mp25-dwmac
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/arm/bcm/
Dbrcm,brcmstb.txt2 -----------------------------------------------
3 Boards with Broadcom Brahma15 ARM-based BCMxxxx (generally BCM7xxx variants)
7 - compatible: "brcm,bcm<chip_id>", "brcm,brcmstb"
11 #address-cells = <2>;
12 #size-cells = <2>;
16 Further, syscon nodes that map platform-specific registers used for general
19 - compatible: "brcm,bcm<chip_id>-sun-top-ctrl", "syscon"
20 - compatible: "brcm,bcm<chip_id>-cpu-biu-ctrl",
21 "brcm,brcmstb-cpu-biu-ctrl",
22 "syscon"
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/media/cec/
Dsamsung,s5p-cec.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/media/cec/samsung,s5p-cec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Marek Szyprowski <m.szyprowski@samsung.com>
14 - $ref: cec-common.yaml#
18 const: samsung,s5p-cec
23 clock-names:
25 - const: hdmicec
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/remoteproc/
Dst,stm32-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/st,stm32-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Fabien Dessenne <fabien.dessenne@foss.st.com>
15 - Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
19 const: st,stm32mp1-m4
31 reset-names:
33 - const: mcu_rst
34 - const: hold_boot
[all …]
Dfsl,imx-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX Co-Processor
10 This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs.
13 - Peng Fan <peng.fan@nxp.com>
18 - fsl,imx6sx-cm4
19 - fsl,imx7d-cm4
20 - fsl,imx7ulp-cm4
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/watchdog/
Dts4800-wdt.txt4 - compatible: must be "technologic,ts4800-wdt"
5 - syscon: phandle / integer array that points to the syscon node which
6 describes the FPGA's syscon registers.
7 - phandle to FPGA's syscon
8 - offset to the watchdog register
11 - timeout-sec: contains the watchdog timeout in seconds.
15 syscon: syscon@b0010000 {
16 compatible = "syscon", "simple-mfd";
18 reg-io-width = <2>;
21 compatible = "technologic,ts4800-wdt";
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/iio/adc/
Dsamsung,exynos-adc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/samsung,exynos-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - enum:
16 - samsung,exynos-adc-v1 # Exynos5250
17 - samsung,exynos-adc-v2
18 - samsung,exynos3250-adc
19 - samsung,exynos4212-adc # Exynos4212 and Exynos4412
[all …]

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