Home
last modified time | relevance | path

Searched +full:spi +full:- +full:nand (Results 1 – 25 of 385) sorted by relevance

12345678910>>...16

/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dmarvell,kirkwood-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6180-pinctrl",
8 "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl",
9 "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl",
10 "marvell,98dx4122-pinctrl", "marvell,98dx1135-pinctrl"
11 - reg: register specifier of MPP registers
14 It also support the 88f6281-based variant in the 98dx412x Bobcat SoCs.
24 mpp0 0 gpio, nand(io2), spi(cs)
25 mpp1 1 gpo, nand(io3), spi(mosi)
26 mpp2 2 gpo, nand(io4), spi(sck)
[all …]
Dlantiq,pinctrl-xway.txt4 - compatible: "lantiq,<chip>-pinctrl", where <chip> is:
10 - reg: Should contain the physical address and length of the gpio/pinmux
13 Please refer to pinctrl-bindings.txt in this directory for details of the
21 pull-up and open-drain
36 Required subnode-properties:
37 - lantiq,groups : An array of strings. Each string contains the name of a group.
39 - lantiq,function: A string containing the name of the function to mux to the
51 spi, asc, cgu, jtag, exin, stp, gpt, mdio, ephy, dfe
56 ebu wait, nand ale, nand cs1, nand cle, spi_di, spi_do, spi_clk, spi_cs1,
62 spi, asc, cgu, jtag, exin, stp, gpt, nmi, pci, ebu, dfe
[all …]
/linux-6.12.1/include/linux/mtd/
Dspinand.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2016-2017 Micron Technology, Inc.
15 #include <linux/mtd/nand.h>
16 #include <linux/spi/spi.h>
17 #include <linux/spi/spi-mem.h>
20 * Standard SPI NAND flash operations
144 * Standard SPI NAND flash commands
197 * struct spinand_id - SPI NAND id structure
214 * struct spinand_devid - SPI NAND device id structure
222 * read_id opcode + 1-byte address.
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/spi/
Dmediatek,spi-mtk-snfi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-snfi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI-NAND flash controller for MediaTek ARM SoCs
10 - Chuanhong Guo <gch981213@gmail.com>
13 The Mediatek SPI-NAND flash controller is an extended version of
14 the Mediatek NAND flash controller. It can perform standard SPI
15 instructions with one continuous write and one read for up-to 0xa0
16 bytes. It also supports typical SPI-NAND page cache operations
[all …]
Dmxicy,mx25f0a-spi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/mxicy,mx25f0a-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Macronix SPI controller
10 - Miquel Raynal <miquel.raynal@bootlin.com>
13 - $ref: spi-controller.yaml#
17 const: mxicy,mx25f0a-spi
23 reg-names:
25 - const: regs
[all …]
/linux-6.12.1/drivers/mtd/nand/spi/
Dcore.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016-2017 Micron Technology, Inc.
10 #define pr_fmt(fmt) "spi-nand: " fmt
20 #include <linux/spi/spi.h>
21 #include <linux/spi/spi-mem.h>
26 spinand->scratchbuf); in spinand_read_reg_op()
29 ret = spi_mem_exec_op(spinand->spimem, &op); in spinand_read_reg_op()
33 *val = *spinand->scratchbuf; in spinand_read_reg_op()
40 spinand->scratchbuf); in spinand_write_reg_op()
42 *spinand->scratchbuf = val; in spinand_write_reg_op()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/mtd/
Dmxicy,nand-ecc-engine.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/mxicy,nand-ecc-engine.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Macronix NAND ECC engine
10 - Miquel Raynal <miquel.raynal@bootlin.com>
14 const: mxicy,nand-ecc-engine-rev3
26 - compatible
27 - reg
32 - |
[all …]
Dspi-nand.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/spi-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI-NAND flash
10 - Miquel Raynal <miquel.raynal@bootlin.com>
13 - $ref: nand-chip.yaml#
14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
18 const: spi-nand
21 description: Encode the chip-select line on the SPI bus
[all …]
Dnand-chip.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/nand-chip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NAND Chip Common Properties
10 - Miquel Raynal <miquel.raynal@bootlin.com>
13 - $ref: mtd.yaml#
16 This file covers the generic description of a NAND chip. It implies that the
17 bus interface should not be taken into account: both raw NAND devices and
18 SPI-NAND devices are concerned by this description.
[all …]
/linux-6.12.1/drivers/pinctrl/
Dpinctrl-xway.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/pinctrl/pinmux-xway.c
4 * based on linux/drivers/pinctrl/pinmux-pxa910.c
21 #include "pinctrl-lantiq.h"
110 /* --------- ase related code --------- */
122 MFP_XWAY(GPIO7, GPIO, SPI, MII, JTAG),
123 MFP_XWAY(GPIO8, GPIO, SPI, MII, JTAG),
124 MFP_XWAY(GPIO9, GPIO, SPI, MII, JTAG),
125 MFP_XWAY(GPIO10, GPIO, SPI, MII, JTAG),
129 MFP_XWAY(GPIO14, GPIO, EBU, SPI, CGU),
[all …]
/linux-6.12.1/arch/powerpc/boot/dts/fsl/
Dmpc8536ds.dtsi2 * MPC8536DS Device Tree Source stub (no addresses or top-level ranges)
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
46 label = "ramdisk-nor";
51 label = "diagnostic-nor";
52 read-only;
57 label = "dink-nor";
[all …]
Dp1024rdb.dtsi2 * P1024 RDB Device Tree Source stub (no addresses or top-level ranges)
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
48 label = "NOR Vitesse-7385 Firmware";
49 read-only;
72 /* 512KB for u-boot Bootloader Image */
73 /* 512KB for u-boot Environment Variables */
[all …]
Dp2020rdb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2009-2012 Freescale Semiconductor Inc.
8 /include/ "p2020si-pre.dtsi"
31 /* NOR and NAND Flashes */
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
48 label = "NOR (RO) Vitesse-7385 Firmware";
[all …]
Dp2020rdb-pc.dtsi2 * P2020 RDB-PC Device Tree Source stub (no addresses or top-level ranges)
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
48 label = "NOR Vitesse-7385 Firmware";
49 read-only;
72 /* 512KB for u-boot Bootloader Image */
73 /* 512KB for u-boot Environment Variables */
[all …]
Dp1021rdb-pc.dtsi2 * P1021 RDB Device Tree Source stub (no addresses or top-level ranges)
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
48 label = "NOR Vitesse-7385 Firmware";
49 read-only;
75 read-only;
80 /* 512KB for u-boot Bootloader Image */
[all …]
Dp1022ds.dtsi2 * P1022 DS Device Tree Source stub (no addresses or top-level ranges)
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
46 label = "ramdisk-nor";
47 read-only;
52 label = "diagnostic-nor";
53 read-only;
[all …]
Dp1020rdb-pd.dts2 * P1020 RDB-PD Device Tree Source (32-bit address map)
35 /include/ "p1020si-pre.dtsi"
37 model = "fsl,P1020RDB-PD";
38 compatible = "fsl,P1020RDB-PD";
47 /* NOR, NAND flash, L2 switch and CPLD */
54 #address-cells = <1>;
55 #size-cells = <1>;
56 compatible = "cfi-flash";
58 bank-width = <2>;
59 device-width = <1>;
[all …]
Dp1021mds.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /include/ "p1021si-pre.dtsi"
25 /* NAND Flash, BCSR, PMC0/1*/
31 nand@0,0 {
32 #address-cells = <1>;
33 #size-cells = <1>;
34 compatible = "fsl,p1021-fcm-nand",
35 "fsl,elbc-fcm-nand";
40 /* 1MB for u-boot Bootloader Image */
42 label = "NAND (RO) U-Boot Image";
[all …]
Dc293pcie.dts35 /include/ "c293si-pre.dtsi"
45 ifc: memory-controller@fffe1e000 {
75 #address-cells = <1>;
76 #size-cells = <1>;
77 compatible = "cfi-flash";
79 bank-width = <2>;
80 device-width = <1>;
107 /* 512KB for u-boot Bootloader Image and evn */
109 label = "NOR U-Boot Image";
110 read-only;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/broadcom/northstar2/
Dns2-svk.dts33 /dts-v1/;
39 compatible = "brcm,ns2-svk", "brcm,ns2";
49 stdout-path = "serial0:115200n8";
113 spi-max-frequency = <5000000>;
114 spi-cpha;
115 spi-cpol;
117 pl022,slave-tx-disable = <0>;
118 pl022,com-mode = <0>;
119 pl022,rx-level-trig = <1>;
120 pl022,tx-level-trig = <1>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/microchip/
Dat91-sama5d3_ksz9477_evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
5 /dts-v1/;
9 model = "EVB-KSZ9477";
10 compatible = "microchip,sama5d3-ksz9477-evb", "atmel,sama5d36",
14 stdout-path = &dbgu;
17 reg_3v3: regulator-3v3 {
18 compatible = "regulator-fixed";
19 regulator-name = "3v3";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
[all …]
/linux-6.12.1/drivers/spi/
Dspi-mxic.c1 // SPDX-License-Identifier: GPL-2.0
15 #include <linux/mtd/nand.h>
16 #include <linux/mtd/nand-ecc-mxic.h>
19 #include <linux/spi/spi.h>
20 #include <linux/spi/spi-mem.h>
74 #define OP_CMD_BYTES(x) (((x) - 1) << 13)
195 ret = clk_prepare_enable(mxic->send_clk); in mxic_spi_clk_enable()
199 ret = clk_prepare_enable(mxic->send_dly_clk); in mxic_spi_clk_enable()
206 clk_disable_unprepare(mxic->send_clk); in mxic_spi_clk_enable()
213 clk_disable_unprepare(mxic->send_clk); in mxic_spi_clk_disable()
[all …]
/linux-6.12.1/arch/arm/boot/dts/marvell/
Darmada-375-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-88F6720)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include "armada-375.dtsi"
18 compatible = "marvell,a375-db", "marvell,armada375";
21 stdout-path = "serial0:115200n8";
57 pinctrl-0 = <&spi0_pins>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/marvell/
Darmada-7040-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include "armada-7040.dtsi"
13 compatible = "marvell,armada7040-db", "marvell,armada7040",
14 "marvell,armada-ap806-quad", "marvell,armada-ap806";
17 stdout-path = "serial0:115200n8";
31 cp0_exp_usb3_0_current_regulator: gpio-regulator {
32 compatible = "regulator-gpio";
33 regulator-name = "cp0-usb3-0-current-regulator";
34 regulator-type = "current";
[all …]
/linux-6.12.1/arch/arm/boot/dts/nxp/vf/
Dvf610-bk4.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
15 stdout-path = &uart1;
23 audio_ext: oscillator-audio {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <24576000>;
29 enet_ext: oscillator-ethernet {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
[all …]

12345678910>>...16