Home
last modified time | relevance | path

Searched full:soc_clocks (Results 1 – 12 of 12) sorted by relevance

/linux-6.12.1/arch/arm/boot/dts/marvell/
Dmmp2.dtsi48 clocks = <&soc_clocks MMP2_CLK_GPU_3D>,
49 <&soc_clocks MMP2_CLK_GPU_BUS>;
51 power-domains = <&soc_clocks MMP2_POWER_DOMAIN_GPU>;
144 clocks = <&soc_clocks MMP2_CLK_USB>;
154 clocks = <&soc_clocks MMP2_CLK_SDH0>;
163 clocks = <&soc_clocks MMP2_CLK_SDH1>;
172 clocks = <&soc_clocks MMP2_CLK_SDH2>;
181 clocks = <&soc_clocks MMP2_CLK_SDH3>;
191 clocks = <&soc_clocks MMP2_CLK_CCIC0>;
202 clocks = <&soc_clocks MMP2_CLK_CCIC1>;
[all …]
Dmmp3.dtsi198 clocks = <&soc_clocks MMP2_CLK_USB>;
216 clocks = <&soc_clocks MMP2_CLK_USBHSIC0>;
237 clocks = <&soc_clocks MMP2_CLK_USBHSIC1>;
250 clocks = <&soc_clocks MMP2_CLK_SDH0>;
259 clocks = <&soc_clocks MMP2_CLK_SDH1>;
268 clocks = <&soc_clocks MMP2_CLK_SDH2>;
277 clocks = <&soc_clocks MMP2_CLK_SDH3>;
286 clocks = <&soc_clocks MMP3_CLK_SDH4>;
298 clocks = <&soc_clocks MMP2_CLK_CCIC0>;
300 power-domains = <&soc_clocks MMP3_POWER_DOMAIN_CAMERA>;
[all …]
Dpxa168.dtsi56 clocks = <&soc_clocks PXA168_CLK_TIMER>;
57 resets = <&soc_clocks PXA168_CLK_TIMER>;
65 clocks = <&soc_clocks PXA168_CLK_UART0>;
66 resets = <&soc_clocks PXA168_CLK_UART0>;
75 clocks = <&soc_clocks PXA168_CLK_UART1>;
76 resets = <&soc_clocks PXA168_CLK_UART1>;
85 clocks = <&soc_clocks PXA168_CLK_UART2>;
86 resets = <&soc_clocks PXA168_CLK_UART2>;
98 clocks = <&soc_clocks PXA168_CLK_GPIO>;
99 resets = <&soc_clocks PXA168_CLK_GPIO>;
[all …]
Dpxa910.dtsi75 clocks = <&soc_clocks PXA910_CLK_UART0>;
76 resets = <&soc_clocks PXA910_CLK_UART0>;
85 clocks = <&soc_clocks PXA910_CLK_UART1>;
86 resets = <&soc_clocks PXA910_CLK_UART1>;
95 clocks = <&soc_clocks PXA910_CLK_UART2>;
96 resets = <&soc_clocks PXA910_CLK_UART2>;
109 clocks = <&soc_clocks PXA910_CLK_GPIO>;
110 resets = <&soc_clocks PXA910_CLK_GPIO>;
138 clocks = <&soc_clocks PXA910_CLK_TWSI0>;
139 resets = <&soc_clocks PXA910_CLK_TWSI0>;
[all …]
Dmmp2-olpc-xo-1-75.dts31 clocks = <&soc_clocks MMP2_CLK_DISP0_LCDC>,
32 <&soc_clocks MMP2_CLK_DISP0>;
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dmarvell,mmp2-audio-clock.yaml69 clocks = <&soc_clocks MMP2_CLK_AUDIO>,
70 <&soc_clocks MMP2_CLK_VCTCXO>,
71 <&soc_clocks MMP2_CLK_I2S0>,
72 <&soc_clocks MMP2_CLK_I2S1>;
73 power-domains = <&soc_clocks MMP2_POWER_DOMAIN_AUDIO>;
/linux-6.12.1/Documentation/devicetree/bindings/media/
Dmarvell,mmp2-ccic.yaml78 clocks = <&soc_clocks MMP2_CLK_CCIC0>;
82 power-domains = <&soc_clocks MMP3_POWER_DOMAIN_CAMERA>;
/linux-6.12.1/Documentation/devicetree/bindings/gpio/
Dmrvl-gpio.yaml149 clocks = <&soc_clocks PXA910_CLK_GPIO>;
150 resets = <&soc_clocks PXA910_CLK_GPIO>;
/linux-6.12.1/Documentation/devicetree/bindings/usb/
Dmarvell,pxau2o-ehci.yaml56 clocks = <&soc_clocks MMP2_CLK_USB>;
/linux-6.12.1/Documentation/devicetree/bindings/i2c/
Di2c-pxa.yaml68 clocks = <&soc_clocks MMP2_CLK_TWSI1>;
/linux-6.12.1/Documentation/devicetree/bindings/spi/
Dmarvell,mmp2-ssp.yaml81 clocks = <&soc_clocks MMP2_CLK_SSP0>;
/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dmarvell,mmp-sspa.yaml92 clocks = <&soc_clocks 127>,